Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/smp.c | |
3 | * | |
4 | * Copyright (C) 2002 ARM Limited, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
c97d4869 | 10 | #include <linux/module.h> |
1da177e4 LT |
11 | #include <linux/delay.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/spinlock.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/cache.h> | |
17 | #include <linux/profile.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/mm.h> | |
4e950f6f | 20 | #include <linux/err.h> |
1da177e4 LT |
21 | #include <linux/cpu.h> |
22 | #include <linux/smp.h> | |
23 | #include <linux/seq_file.h> | |
c97d4869 | 24 | #include <linux/irq.h> |
1da177e4 LT |
25 | |
26 | #include <asm/atomic.h> | |
27 | #include <asm/cacheflush.h> | |
28 | #include <asm/cpu.h> | |
e65f38ed RK |
29 | #include <asm/mmu_context.h> |
30 | #include <asm/pgtable.h> | |
31 | #include <asm/pgalloc.h> | |
1da177e4 LT |
32 | #include <asm/processor.h> |
33 | #include <asm/tlbflush.h> | |
34 | #include <asm/ptrace.h> | |
35 | ||
36 | /* | |
37 | * bitmask of present and online CPUs. | |
38 | * The present bitmask indicates that the CPU is physically present. | |
39 | * The online bitmask indicates that the CPU is up and running. | |
40 | */ | |
d12734d1 | 41 | cpumask_t cpu_possible_map; |
e16b38f7 | 42 | EXPORT_SYMBOL(cpu_possible_map); |
1da177e4 | 43 | cpumask_t cpu_online_map; |
e16b38f7 | 44 | EXPORT_SYMBOL(cpu_online_map); |
1da177e4 | 45 | |
e65f38ed RK |
46 | /* |
47 | * as from 2.5, kernels no longer have an init_tasks structure | |
48 | * so we need some other way of telling a new secondary core | |
49 | * where to place its SVC stack | |
50 | */ | |
51 | struct secondary_data secondary_data; | |
52 | ||
1da177e4 LT |
53 | /* |
54 | * structures for inter-processor calls | |
55 | * - A collection of single bit ipi messages. | |
56 | */ | |
57 | struct ipi_data { | |
58 | spinlock_t lock; | |
59 | unsigned long ipi_count; | |
60 | unsigned long bits; | |
61 | }; | |
62 | ||
63 | static DEFINE_PER_CPU(struct ipi_data, ipi_data) = { | |
64 | .lock = SPIN_LOCK_UNLOCKED, | |
65 | }; | |
66 | ||
67 | enum ipi_msg_type { | |
68 | IPI_TIMER, | |
69 | IPI_RESCHEDULE, | |
70 | IPI_CALL_FUNC, | |
f6dd9fa5 | 71 | IPI_CALL_FUNC_SINGLE, |
1da177e4 LT |
72 | IPI_CPU_STOP, |
73 | }; | |
74 | ||
bd6f68af | 75 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 | 76 | { |
71f512e8 RK |
77 | struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); |
78 | struct task_struct *idle = ci->idle; | |
e65f38ed RK |
79 | pgd_t *pgd; |
80 | pmd_t *pmd; | |
1da177e4 LT |
81 | int ret; |
82 | ||
83 | /* | |
71f512e8 RK |
84 | * Spawn a new process manually, if not already done. |
85 | * Grab a pointer to its task struct so we can mess with it | |
1da177e4 | 86 | */ |
71f512e8 RK |
87 | if (!idle) { |
88 | idle = fork_idle(cpu); | |
89 | if (IS_ERR(idle)) { | |
90 | printk(KERN_ERR "CPU%u: fork() failed\n", cpu); | |
91 | return PTR_ERR(idle); | |
92 | } | |
93 | ci->idle = idle; | |
1da177e4 LT |
94 | } |
95 | ||
e65f38ed RK |
96 | /* |
97 | * Allocate initial page tables to allow the new CPU to | |
98 | * enable the MMU safely. This essentially means a set | |
99 | * of our "standard" page tables, with the addition of | |
100 | * a 1:1 mapping for the physical address of the kernel. | |
101 | */ | |
102 | pgd = pgd_alloc(&init_mm); | |
058ddee5 | 103 | pmd = pmd_offset(pgd + pgd_index(PHYS_OFFSET), PHYS_OFFSET); |
e65f38ed RK |
104 | *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) | |
105 | PMD_TYPE_SECT | PMD_SECT_AP_WRITE); | |
106 | ||
107 | /* | |
108 | * We need to tell the secondary core where to find | |
109 | * its stack and the page tables. | |
110 | */ | |
32d39a93 | 111 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
e65f38ed RK |
112 | secondary_data.pgdir = virt_to_phys(pgd); |
113 | wmb(); | |
114 | ||
1da177e4 LT |
115 | /* |
116 | * Now bring the CPU into our world. | |
117 | */ | |
118 | ret = boot_secondary(cpu, idle); | |
e65f38ed RK |
119 | if (ret == 0) { |
120 | unsigned long timeout; | |
121 | ||
122 | /* | |
123 | * CPU was successfully started, wait for it | |
124 | * to come online or time out. | |
125 | */ | |
126 | timeout = jiffies + HZ; | |
127 | while (time_before(jiffies, timeout)) { | |
128 | if (cpu_online(cpu)) | |
129 | break; | |
130 | ||
131 | udelay(10); | |
132 | barrier(); | |
133 | } | |
134 | ||
135 | if (!cpu_online(cpu)) | |
136 | ret = -EIO; | |
137 | } | |
138 | ||
5d43045b | 139 | secondary_data.stack = NULL; |
e65f38ed RK |
140 | secondary_data.pgdir = 0; |
141 | ||
058ddee5 | 142 | *pmd = __pmd(0); |
5e541973 | 143 | pgd_free(&init_mm, pgd); |
e65f38ed | 144 | |
1da177e4 | 145 | if (ret) { |
0908db22 RK |
146 | printk(KERN_CRIT "CPU%u: processor failed to boot\n", cpu); |
147 | ||
1da177e4 LT |
148 | /* |
149 | * FIXME: We need to clean up the new idle thread. --rmk | |
150 | */ | |
151 | } | |
152 | ||
153 | return ret; | |
154 | } | |
155 | ||
a054a811 RK |
156 | #ifdef CONFIG_HOTPLUG_CPU |
157 | /* | |
158 | * __cpu_disable runs on the processor to be shutdown. | |
159 | */ | |
160 | int __cpuexit __cpu_disable(void) | |
161 | { | |
162 | unsigned int cpu = smp_processor_id(); | |
163 | struct task_struct *p; | |
164 | int ret; | |
165 | ||
166 | ret = mach_cpu_disable(cpu); | |
167 | if (ret) | |
168 | return ret; | |
169 | ||
170 | /* | |
171 | * Take this CPU offline. Once we clear this, we can't return, | |
172 | * and we must not schedule until we're ready to give up the cpu. | |
173 | */ | |
174 | cpu_clear(cpu, cpu_online_map); | |
175 | ||
176 | /* | |
177 | * OK - migrate IRQs away from this CPU | |
178 | */ | |
179 | migrate_irqs(); | |
180 | ||
37ee16ae RK |
181 | /* |
182 | * Stop the local timer for this CPU. | |
183 | */ | |
184 | local_timer_stop(cpu); | |
185 | ||
a054a811 RK |
186 | /* |
187 | * Flush user cache and TLB mappings, and then remove this CPU | |
188 | * from the vm mask set of all processes. | |
189 | */ | |
190 | flush_cache_all(); | |
191 | local_flush_tlb_all(); | |
192 | ||
193 | read_lock(&tasklist_lock); | |
194 | for_each_process(p) { | |
195 | if (p->mm) | |
196 | cpu_clear(cpu, p->mm->cpu_vm_mask); | |
197 | } | |
198 | read_unlock(&tasklist_lock); | |
199 | ||
200 | return 0; | |
201 | } | |
202 | ||
203 | /* | |
204 | * called on the thread which is asking for a CPU to be shutdown - | |
205 | * waits until shutdown has completed, or it is timed out. | |
206 | */ | |
207 | void __cpuexit __cpu_die(unsigned int cpu) | |
208 | { | |
209 | if (!platform_cpu_kill(cpu)) | |
210 | printk("CPU%u: unable to kill\n", cpu); | |
211 | } | |
212 | ||
213 | /* | |
214 | * Called from the idle thread for the CPU which has been shutdown. | |
215 | * | |
216 | * Note that we disable IRQs here, but do not re-enable them | |
217 | * before returning to the caller. This is also the behaviour | |
218 | * of the other hotplug-cpu capable cores, so presumably coming | |
219 | * out of idle fixes this. | |
220 | */ | |
221 | void __cpuexit cpu_die(void) | |
222 | { | |
223 | unsigned int cpu = smp_processor_id(); | |
224 | ||
225 | local_irq_disable(); | |
226 | idle_task_exit(); | |
227 | ||
228 | /* | |
229 | * actual CPU shutdown procedure is at least platform (if not | |
230 | * CPU) specific | |
231 | */ | |
232 | platform_cpu_die(cpu); | |
233 | ||
234 | /* | |
235 | * Do not return to the idle loop - jump back to the secondary | |
236 | * cpu initialisation. There's some initialisation which needs | |
237 | * to be repeated to undo the effects of taking the CPU offline. | |
238 | */ | |
239 | __asm__("mov sp, %0\n" | |
240 | " b secondary_start_kernel" | |
241 | : | |
32d39a93 | 242 | : "r" (task_stack_page(current) + THREAD_SIZE - 8)); |
a054a811 RK |
243 | } |
244 | #endif /* CONFIG_HOTPLUG_CPU */ | |
245 | ||
e65f38ed RK |
246 | /* |
247 | * This is the secondary CPU boot entry. We're using this CPUs | |
248 | * idle thread stack, but a set of temporary page tables. | |
249 | */ | |
bd6f68af | 250 | asmlinkage void __cpuinit secondary_start_kernel(void) |
e65f38ed RK |
251 | { |
252 | struct mm_struct *mm = &init_mm; | |
da2660d2 | 253 | unsigned int cpu = smp_processor_id(); |
e65f38ed RK |
254 | |
255 | printk("CPU%u: Booted secondary processor\n", cpu); | |
256 | ||
257 | /* | |
258 | * All kernel threads share the same mm context; grab a | |
259 | * reference and switch to it. | |
260 | */ | |
261 | atomic_inc(&mm->mm_users); | |
262 | atomic_inc(&mm->mm_count); | |
263 | current->active_mm = mm; | |
264 | cpu_set(cpu, mm->cpu_vm_mask); | |
265 | cpu_switch_mm(mm->pgd, mm); | |
266 | enter_lazy_tlb(mm, current); | |
505d7b19 | 267 | local_flush_tlb_all(); |
e65f38ed RK |
268 | |
269 | cpu_init(); | |
5bfb5d69 | 270 | preempt_disable(); |
e65f38ed RK |
271 | |
272 | /* | |
273 | * Give the platform a chance to do its own initialisation. | |
274 | */ | |
275 | platform_secondary_init(cpu); | |
276 | ||
277 | /* | |
278 | * Enable local interrupts. | |
279 | */ | |
280 | local_irq_enable(); | |
281 | local_fiq_enable(); | |
282 | ||
a8655e83 CM |
283 | /* |
284 | * Setup local timer for this CPU. | |
285 | */ | |
286 | local_timer_setup(cpu); | |
287 | ||
e65f38ed RK |
288 | calibrate_delay(); |
289 | ||
290 | smp_store_cpu_info(cpu); | |
291 | ||
292 | /* | |
293 | * OK, now it's safe to let the boot CPU continue | |
294 | */ | |
295 | cpu_set(cpu, cpu_online_map); | |
296 | ||
297 | /* | |
298 | * OK, it's off to the idle thread for us | |
299 | */ | |
300 | cpu_idle(); | |
301 | } | |
302 | ||
1da177e4 LT |
303 | /* |
304 | * Called by both boot and secondaries to move global data into | |
305 | * per-processor storage. | |
306 | */ | |
bd6f68af | 307 | void __cpuinit smp_store_cpu_info(unsigned int cpuid) |
1da177e4 LT |
308 | { |
309 | struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); | |
310 | ||
311 | cpu_info->loops_per_jiffy = loops_per_jiffy; | |
312 | } | |
313 | ||
314 | void __init smp_cpus_done(unsigned int max_cpus) | |
315 | { | |
316 | int cpu; | |
317 | unsigned long bogosum = 0; | |
318 | ||
319 | for_each_online_cpu(cpu) | |
320 | bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy; | |
321 | ||
322 | printk(KERN_INFO "SMP: Total of %d processors activated " | |
323 | "(%lu.%02lu BogoMIPS).\n", | |
324 | num_online_cpus(), | |
325 | bogosum / (500000/HZ), | |
326 | (bogosum / (5000/HZ)) % 100); | |
327 | } | |
328 | ||
329 | void __init smp_prepare_boot_cpu(void) | |
330 | { | |
331 | unsigned int cpu = smp_processor_id(); | |
332 | ||
71f512e8 | 333 | per_cpu(cpu_data, cpu).idle = current; |
1da177e4 LT |
334 | } |
335 | ||
336 | static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg) | |
337 | { | |
338 | unsigned long flags; | |
339 | unsigned int cpu; | |
340 | ||
341 | local_irq_save(flags); | |
342 | ||
343 | for_each_cpu_mask(cpu, callmap) { | |
344 | struct ipi_data *ipi = &per_cpu(ipi_data, cpu); | |
345 | ||
346 | spin_lock(&ipi->lock); | |
347 | ipi->bits |= 1 << msg; | |
348 | spin_unlock(&ipi->lock); | |
349 | } | |
350 | ||
351 | /* | |
352 | * Call the platform specific cross-CPU call function. | |
353 | */ | |
354 | smp_cross_call(callmap); | |
355 | ||
356 | local_irq_restore(flags); | |
357 | } | |
358 | ||
f6dd9fa5 | 359 | void arch_send_call_function_ipi(cpumask_t mask) |
1da177e4 | 360 | { |
f6dd9fa5 | 361 | send_ipi_message(mask, IPI_CALL_FUNC); |
1da177e4 LT |
362 | } |
363 | ||
f6dd9fa5 | 364 | void arch_send_call_function_single_ipi(int cpu) |
3e459990 | 365 | { |
f6dd9fa5 | 366 | send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE); |
3e459990 | 367 | } |
3e459990 | 368 | |
1da177e4 LT |
369 | void show_ipi_list(struct seq_file *p) |
370 | { | |
371 | unsigned int cpu; | |
372 | ||
373 | seq_puts(p, "IPI:"); | |
374 | ||
e11b2236 | 375 | for_each_present_cpu(cpu) |
1da177e4 LT |
376 | seq_printf(p, " %10lu", per_cpu(ipi_data, cpu).ipi_count); |
377 | ||
378 | seq_putc(p, '\n'); | |
379 | } | |
380 | ||
37ee16ae RK |
381 | void show_local_irqs(struct seq_file *p) |
382 | { | |
383 | unsigned int cpu; | |
384 | ||
385 | seq_printf(p, "LOC: "); | |
386 | ||
387 | for_each_present_cpu(cpu) | |
388 | seq_printf(p, "%10u ", irq_stat[cpu].local_timer_irqs); | |
389 | ||
390 | seq_putc(p, '\n'); | |
391 | } | |
392 | ||
c97d4869 | 393 | static void ipi_timer(void) |
1da177e4 | 394 | { |
1da177e4 | 395 | irq_enter(); |
3e459990 | 396 | local_timer_interrupt(); |
1da177e4 LT |
397 | irq_exit(); |
398 | } | |
399 | ||
37ee16ae | 400 | #ifdef CONFIG_LOCAL_TIMERS |
b9811d7f | 401 | asmlinkage void __exception do_local_timer(struct pt_regs *regs) |
37ee16ae | 402 | { |
c97d4869 | 403 | struct pt_regs *old_regs = set_irq_regs(regs); |
37ee16ae RK |
404 | int cpu = smp_processor_id(); |
405 | ||
406 | if (local_timer_ack()) { | |
407 | irq_stat[cpu].local_timer_irqs++; | |
c97d4869 | 408 | ipi_timer(); |
37ee16ae | 409 | } |
c97d4869 RK |
410 | |
411 | set_irq_regs(old_regs); | |
37ee16ae RK |
412 | } |
413 | #endif | |
414 | ||
1da177e4 LT |
415 | static DEFINE_SPINLOCK(stop_lock); |
416 | ||
417 | /* | |
418 | * ipi_cpu_stop - handle IPI from smp_send_stop() | |
419 | */ | |
420 | static void ipi_cpu_stop(unsigned int cpu) | |
421 | { | |
422 | spin_lock(&stop_lock); | |
423 | printk(KERN_CRIT "CPU%u: stopping\n", cpu); | |
424 | dump_stack(); | |
425 | spin_unlock(&stop_lock); | |
426 | ||
427 | cpu_clear(cpu, cpu_online_map); | |
428 | ||
429 | local_fiq_disable(); | |
430 | local_irq_disable(); | |
431 | ||
432 | while (1) | |
433 | cpu_relax(); | |
434 | } | |
435 | ||
436 | /* | |
437 | * Main handler for inter-processor interrupts | |
438 | * | |
439 | * For ARM, the ipimask now only identifies a single | |
440 | * category of IPI (Bit 1 IPIs have been replaced by a | |
441 | * different mechanism): | |
442 | * | |
443 | * Bit 0 - Inter-processor function call | |
444 | */ | |
b9811d7f | 445 | asmlinkage void __exception do_IPI(struct pt_regs *regs) |
1da177e4 LT |
446 | { |
447 | unsigned int cpu = smp_processor_id(); | |
448 | struct ipi_data *ipi = &per_cpu(ipi_data, cpu); | |
c97d4869 | 449 | struct pt_regs *old_regs = set_irq_regs(regs); |
1da177e4 LT |
450 | |
451 | ipi->ipi_count++; | |
452 | ||
453 | for (;;) { | |
454 | unsigned long msgs; | |
455 | ||
456 | spin_lock(&ipi->lock); | |
457 | msgs = ipi->bits; | |
458 | ipi->bits = 0; | |
459 | spin_unlock(&ipi->lock); | |
460 | ||
461 | if (!msgs) | |
462 | break; | |
463 | ||
464 | do { | |
465 | unsigned nextmsg; | |
466 | ||
467 | nextmsg = msgs & -msgs; | |
468 | msgs &= ~nextmsg; | |
469 | nextmsg = ffz(~nextmsg); | |
470 | ||
471 | switch (nextmsg) { | |
472 | case IPI_TIMER: | |
c97d4869 | 473 | ipi_timer(); |
1da177e4 LT |
474 | break; |
475 | ||
476 | case IPI_RESCHEDULE: | |
477 | /* | |
478 | * nothing more to do - eveything is | |
479 | * done on the interrupt return path | |
480 | */ | |
481 | break; | |
482 | ||
483 | case IPI_CALL_FUNC: | |
f6dd9fa5 JA |
484 | generic_smp_call_function_interrupt(); |
485 | break; | |
486 | ||
487 | case IPI_CALL_FUNC_SINGLE: | |
488 | generic_smp_call_function_single_interrupt(); | |
1da177e4 LT |
489 | break; |
490 | ||
491 | case IPI_CPU_STOP: | |
492 | ipi_cpu_stop(cpu); | |
493 | break; | |
494 | ||
495 | default: | |
496 | printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n", | |
497 | cpu, nextmsg); | |
498 | break; | |
499 | } | |
500 | } while (msgs); | |
501 | } | |
c97d4869 RK |
502 | |
503 | set_irq_regs(old_regs); | |
1da177e4 LT |
504 | } |
505 | ||
506 | void smp_send_reschedule(int cpu) | |
507 | { | |
508 | send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE); | |
509 | } | |
510 | ||
511 | void smp_send_timer(void) | |
512 | { | |
513 | cpumask_t mask = cpu_online_map; | |
514 | cpu_clear(smp_processor_id(), mask); | |
515 | send_ipi_message(mask, IPI_TIMER); | |
516 | } | |
517 | ||
3e459990 CM |
518 | void smp_timer_broadcast(cpumask_t mask) |
519 | { | |
520 | send_ipi_message(mask, IPI_TIMER); | |
521 | } | |
522 | ||
1da177e4 LT |
523 | void smp_send_stop(void) |
524 | { | |
525 | cpumask_t mask = cpu_online_map; | |
526 | cpu_clear(smp_processor_id(), mask); | |
527 | send_ipi_message(mask, IPI_CPU_STOP); | |
528 | } | |
529 | ||
530 | /* | |
531 | * not supported here | |
532 | */ | |
5048bcba | 533 | int setup_profiling_timer(unsigned int multiplier) |
1da177e4 LT |
534 | { |
535 | return -EINVAL; | |
536 | } | |
4b0ef3b1 RK |
537 | |
538 | static int | |
f6dd9fa5 | 539 | on_each_cpu_mask(void (*func)(void *), void *info, int wait, cpumask_t mask) |
4b0ef3b1 RK |
540 | { |
541 | int ret = 0; | |
542 | ||
543 | preempt_disable(); | |
544 | ||
f6dd9fa5 | 545 | ret = smp_call_function_mask(mask, func, info, wait); |
4b0ef3b1 RK |
546 | if (cpu_isset(smp_processor_id(), mask)) |
547 | func(info); | |
548 | ||
549 | preempt_enable(); | |
550 | ||
551 | return ret; | |
552 | } | |
553 | ||
554 | /**********************************************************************/ | |
555 | ||
556 | /* | |
557 | * TLB operations | |
558 | */ | |
559 | struct tlb_args { | |
560 | struct vm_area_struct *ta_vma; | |
561 | unsigned long ta_start; | |
562 | unsigned long ta_end; | |
563 | }; | |
564 | ||
565 | static inline void ipi_flush_tlb_all(void *ignored) | |
566 | { | |
567 | local_flush_tlb_all(); | |
568 | } | |
569 | ||
570 | static inline void ipi_flush_tlb_mm(void *arg) | |
571 | { | |
572 | struct mm_struct *mm = (struct mm_struct *)arg; | |
573 | ||
574 | local_flush_tlb_mm(mm); | |
575 | } | |
576 | ||
577 | static inline void ipi_flush_tlb_page(void *arg) | |
578 | { | |
579 | struct tlb_args *ta = (struct tlb_args *)arg; | |
580 | ||
581 | local_flush_tlb_page(ta->ta_vma, ta->ta_start); | |
582 | } | |
583 | ||
584 | static inline void ipi_flush_tlb_kernel_page(void *arg) | |
585 | { | |
586 | struct tlb_args *ta = (struct tlb_args *)arg; | |
587 | ||
588 | local_flush_tlb_kernel_page(ta->ta_start); | |
589 | } | |
590 | ||
591 | static inline void ipi_flush_tlb_range(void *arg) | |
592 | { | |
593 | struct tlb_args *ta = (struct tlb_args *)arg; | |
594 | ||
595 | local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end); | |
596 | } | |
597 | ||
598 | static inline void ipi_flush_tlb_kernel_range(void *arg) | |
599 | { | |
600 | struct tlb_args *ta = (struct tlb_args *)arg; | |
601 | ||
602 | local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end); | |
603 | } | |
604 | ||
605 | void flush_tlb_all(void) | |
606 | { | |
15c8b6c1 | 607 | on_each_cpu(ipi_flush_tlb_all, NULL, 1); |
4b0ef3b1 RK |
608 | } |
609 | ||
610 | void flush_tlb_mm(struct mm_struct *mm) | |
611 | { | |
612 | cpumask_t mask = mm->cpu_vm_mask; | |
613 | ||
f6dd9fa5 | 614 | on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mask); |
4b0ef3b1 RK |
615 | } |
616 | ||
617 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) | |
618 | { | |
619 | cpumask_t mask = vma->vm_mm->cpu_vm_mask; | |
620 | struct tlb_args ta; | |
621 | ||
622 | ta.ta_vma = vma; | |
623 | ta.ta_start = uaddr; | |
624 | ||
f6dd9fa5 | 625 | on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mask); |
4b0ef3b1 RK |
626 | } |
627 | ||
628 | void flush_tlb_kernel_page(unsigned long kaddr) | |
629 | { | |
630 | struct tlb_args ta; | |
631 | ||
632 | ta.ta_start = kaddr; | |
633 | ||
15c8b6c1 | 634 | on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1); |
4b0ef3b1 RK |
635 | } |
636 | ||
637 | void flush_tlb_range(struct vm_area_struct *vma, | |
638 | unsigned long start, unsigned long end) | |
639 | { | |
640 | cpumask_t mask = vma->vm_mm->cpu_vm_mask; | |
641 | struct tlb_args ta; | |
642 | ||
643 | ta.ta_vma = vma; | |
644 | ta.ta_start = start; | |
645 | ta.ta_end = end; | |
646 | ||
f6dd9fa5 | 647 | on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mask); |
4b0ef3b1 RK |
648 | } |
649 | ||
650 | void flush_tlb_kernel_range(unsigned long start, unsigned long end) | |
651 | { | |
652 | struct tlb_args ta; | |
653 | ||
654 | ta.ta_start = start; | |
655 | ta.ta_end = end; | |
656 | ||
15c8b6c1 | 657 | on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1); |
4b0ef3b1 | 658 | } |