Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/smp.c | |
3 | * | |
4 | * Copyright (C) 2002 ARM Limited, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
c97d4869 | 10 | #include <linux/module.h> |
1da177e4 LT |
11 | #include <linux/delay.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/spinlock.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/cache.h> | |
17 | #include <linux/profile.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/mm.h> | |
4e950f6f | 20 | #include <linux/err.h> |
1da177e4 LT |
21 | #include <linux/cpu.h> |
22 | #include <linux/smp.h> | |
23 | #include <linux/seq_file.h> | |
c97d4869 | 24 | #include <linux/irq.h> |
bc28248e RK |
25 | #include <linux/percpu.h> |
26 | #include <linux/clockchips.h> | |
1da177e4 LT |
27 | |
28 | #include <asm/atomic.h> | |
29 | #include <asm/cacheflush.h> | |
30 | #include <asm/cpu.h> | |
42578c82 | 31 | #include <asm/cputype.h> |
e65f38ed RK |
32 | #include <asm/mmu_context.h> |
33 | #include <asm/pgtable.h> | |
34 | #include <asm/pgalloc.h> | |
1da177e4 LT |
35 | #include <asm/processor.h> |
36 | #include <asm/tlbflush.h> | |
37 | #include <asm/ptrace.h> | |
bc28248e | 38 | #include <asm/localtimer.h> |
e616c591 | 39 | #include <asm/smp_plat.h> |
1da177e4 | 40 | |
e65f38ed RK |
41 | /* |
42 | * as from 2.5, kernels no longer have an init_tasks structure | |
43 | * so we need some other way of telling a new secondary core | |
44 | * where to place its SVC stack | |
45 | */ | |
46 | struct secondary_data secondary_data; | |
47 | ||
1da177e4 LT |
48 | /* |
49 | * structures for inter-processor calls | |
50 | * - A collection of single bit ipi messages. | |
51 | */ | |
52 | struct ipi_data { | |
53 | spinlock_t lock; | |
54 | unsigned long ipi_count; | |
55 | unsigned long bits; | |
56 | }; | |
57 | ||
58 | static DEFINE_PER_CPU(struct ipi_data, ipi_data) = { | |
59 | .lock = SPIN_LOCK_UNLOCKED, | |
60 | }; | |
61 | ||
62 | enum ipi_msg_type { | |
63 | IPI_TIMER, | |
64 | IPI_RESCHEDULE, | |
65 | IPI_CALL_FUNC, | |
f6dd9fa5 | 66 | IPI_CALL_FUNC_SINGLE, |
1da177e4 LT |
67 | IPI_CPU_STOP, |
68 | }; | |
69 | ||
bd6f68af | 70 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 | 71 | { |
71f512e8 RK |
72 | struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); |
73 | struct task_struct *idle = ci->idle; | |
e65f38ed RK |
74 | pgd_t *pgd; |
75 | pmd_t *pmd; | |
1da177e4 LT |
76 | int ret; |
77 | ||
78 | /* | |
71f512e8 RK |
79 | * Spawn a new process manually, if not already done. |
80 | * Grab a pointer to its task struct so we can mess with it | |
1da177e4 | 81 | */ |
71f512e8 RK |
82 | if (!idle) { |
83 | idle = fork_idle(cpu); | |
84 | if (IS_ERR(idle)) { | |
85 | printk(KERN_ERR "CPU%u: fork() failed\n", cpu); | |
86 | return PTR_ERR(idle); | |
87 | } | |
88 | ci->idle = idle; | |
1da177e4 LT |
89 | } |
90 | ||
e65f38ed RK |
91 | /* |
92 | * Allocate initial page tables to allow the new CPU to | |
93 | * enable the MMU safely. This essentially means a set | |
94 | * of our "standard" page tables, with the addition of | |
95 | * a 1:1 mapping for the physical address of the kernel. | |
96 | */ | |
97 | pgd = pgd_alloc(&init_mm); | |
058ddee5 | 98 | pmd = pmd_offset(pgd + pgd_index(PHYS_OFFSET), PHYS_OFFSET); |
e65f38ed RK |
99 | *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) | |
100 | PMD_TYPE_SECT | PMD_SECT_AP_WRITE); | |
e9fc7823 | 101 | flush_pmd_entry(pmd); |
e65f38ed RK |
102 | |
103 | /* | |
104 | * We need to tell the secondary core where to find | |
105 | * its stack and the page tables. | |
106 | */ | |
32d39a93 | 107 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
e65f38ed RK |
108 | secondary_data.pgdir = virt_to_phys(pgd); |
109 | wmb(); | |
110 | ||
1da177e4 LT |
111 | /* |
112 | * Now bring the CPU into our world. | |
113 | */ | |
114 | ret = boot_secondary(cpu, idle); | |
e65f38ed RK |
115 | if (ret == 0) { |
116 | unsigned long timeout; | |
117 | ||
118 | /* | |
119 | * CPU was successfully started, wait for it | |
120 | * to come online or time out. | |
121 | */ | |
122 | timeout = jiffies + HZ; | |
123 | while (time_before(jiffies, timeout)) { | |
124 | if (cpu_online(cpu)) | |
125 | break; | |
126 | ||
127 | udelay(10); | |
128 | barrier(); | |
129 | } | |
130 | ||
131 | if (!cpu_online(cpu)) | |
132 | ret = -EIO; | |
133 | } | |
134 | ||
5d43045b | 135 | secondary_data.stack = NULL; |
e65f38ed RK |
136 | secondary_data.pgdir = 0; |
137 | ||
058ddee5 | 138 | *pmd = __pmd(0); |
e9fc7823 | 139 | clean_pmd_entry(pmd); |
5e541973 | 140 | pgd_free(&init_mm, pgd); |
e65f38ed | 141 | |
1da177e4 | 142 | if (ret) { |
0908db22 RK |
143 | printk(KERN_CRIT "CPU%u: processor failed to boot\n", cpu); |
144 | ||
1da177e4 LT |
145 | /* |
146 | * FIXME: We need to clean up the new idle thread. --rmk | |
147 | */ | |
148 | } | |
149 | ||
150 | return ret; | |
151 | } | |
152 | ||
a054a811 RK |
153 | #ifdef CONFIG_HOTPLUG_CPU |
154 | /* | |
155 | * __cpu_disable runs on the processor to be shutdown. | |
156 | */ | |
90140c30 | 157 | int __cpu_disable(void) |
a054a811 RK |
158 | { |
159 | unsigned int cpu = smp_processor_id(); | |
160 | struct task_struct *p; | |
161 | int ret; | |
162 | ||
163 | ret = mach_cpu_disable(cpu); | |
164 | if (ret) | |
165 | return ret; | |
166 | ||
167 | /* | |
168 | * Take this CPU offline. Once we clear this, we can't return, | |
169 | * and we must not schedule until we're ready to give up the cpu. | |
170 | */ | |
e03cdade | 171 | set_cpu_online(cpu, false); |
a054a811 RK |
172 | |
173 | /* | |
174 | * OK - migrate IRQs away from this CPU | |
175 | */ | |
176 | migrate_irqs(); | |
177 | ||
37ee16ae RK |
178 | /* |
179 | * Stop the local timer for this CPU. | |
180 | */ | |
ebac6546 | 181 | local_timer_stop(); |
37ee16ae | 182 | |
a054a811 RK |
183 | /* |
184 | * Flush user cache and TLB mappings, and then remove this CPU | |
185 | * from the vm mask set of all processes. | |
186 | */ | |
187 | flush_cache_all(); | |
188 | local_flush_tlb_all(); | |
189 | ||
190 | read_lock(&tasklist_lock); | |
191 | for_each_process(p) { | |
192 | if (p->mm) | |
56f8ba83 | 193 | cpumask_clear_cpu(cpu, mm_cpumask(p->mm)); |
a054a811 RK |
194 | } |
195 | read_unlock(&tasklist_lock); | |
196 | ||
197 | return 0; | |
198 | } | |
199 | ||
200 | /* | |
201 | * called on the thread which is asking for a CPU to be shutdown - | |
202 | * waits until shutdown has completed, or it is timed out. | |
203 | */ | |
90140c30 | 204 | void __cpu_die(unsigned int cpu) |
a054a811 RK |
205 | { |
206 | if (!platform_cpu_kill(cpu)) | |
207 | printk("CPU%u: unable to kill\n", cpu); | |
208 | } | |
209 | ||
210 | /* | |
211 | * Called from the idle thread for the CPU which has been shutdown. | |
212 | * | |
213 | * Note that we disable IRQs here, but do not re-enable them | |
214 | * before returning to the caller. This is also the behaviour | |
215 | * of the other hotplug-cpu capable cores, so presumably coming | |
216 | * out of idle fixes this. | |
217 | */ | |
90140c30 | 218 | void __ref cpu_die(void) |
a054a811 RK |
219 | { |
220 | unsigned int cpu = smp_processor_id(); | |
221 | ||
222 | local_irq_disable(); | |
223 | idle_task_exit(); | |
224 | ||
225 | /* | |
226 | * actual CPU shutdown procedure is at least platform (if not | |
227 | * CPU) specific | |
228 | */ | |
229 | platform_cpu_die(cpu); | |
230 | ||
231 | /* | |
232 | * Do not return to the idle loop - jump back to the secondary | |
233 | * cpu initialisation. There's some initialisation which needs | |
234 | * to be repeated to undo the effects of taking the CPU offline. | |
235 | */ | |
236 | __asm__("mov sp, %0\n" | |
237 | " b secondary_start_kernel" | |
238 | : | |
32d39a93 | 239 | : "r" (task_stack_page(current) + THREAD_SIZE - 8)); |
a054a811 RK |
240 | } |
241 | #endif /* CONFIG_HOTPLUG_CPU */ | |
242 | ||
e65f38ed RK |
243 | /* |
244 | * This is the secondary CPU boot entry. We're using this CPUs | |
245 | * idle thread stack, but a set of temporary page tables. | |
246 | */ | |
bd6f68af | 247 | asmlinkage void __cpuinit secondary_start_kernel(void) |
e65f38ed RK |
248 | { |
249 | struct mm_struct *mm = &init_mm; | |
da2660d2 | 250 | unsigned int cpu = smp_processor_id(); |
e65f38ed RK |
251 | |
252 | printk("CPU%u: Booted secondary processor\n", cpu); | |
253 | ||
254 | /* | |
255 | * All kernel threads share the same mm context; grab a | |
256 | * reference and switch to it. | |
257 | */ | |
258 | atomic_inc(&mm->mm_users); | |
259 | atomic_inc(&mm->mm_count); | |
260 | current->active_mm = mm; | |
56f8ba83 | 261 | cpumask_set_cpu(cpu, mm_cpumask(mm)); |
e65f38ed RK |
262 | cpu_switch_mm(mm->pgd, mm); |
263 | enter_lazy_tlb(mm, current); | |
505d7b19 | 264 | local_flush_tlb_all(); |
e65f38ed RK |
265 | |
266 | cpu_init(); | |
5bfb5d69 | 267 | preempt_disable(); |
e65f38ed RK |
268 | |
269 | /* | |
270 | * Give the platform a chance to do its own initialisation. | |
271 | */ | |
272 | platform_secondary_init(cpu); | |
273 | ||
274 | /* | |
275 | * Enable local interrupts. | |
276 | */ | |
e545a614 | 277 | notify_cpu_starting(cpu); |
e65f38ed RK |
278 | local_irq_enable(); |
279 | local_fiq_enable(); | |
280 | ||
a8655e83 | 281 | /* |
bc28248e | 282 | * Setup the percpu timer for this CPU. |
a8655e83 | 283 | */ |
bc28248e | 284 | percpu_timer_setup(); |
a8655e83 | 285 | |
e65f38ed RK |
286 | calibrate_delay(); |
287 | ||
288 | smp_store_cpu_info(cpu); | |
289 | ||
290 | /* | |
291 | * OK, now it's safe to let the boot CPU continue | |
292 | */ | |
e03cdade | 293 | set_cpu_online(cpu, true); |
e65f38ed RK |
294 | |
295 | /* | |
296 | * OK, it's off to the idle thread for us | |
297 | */ | |
298 | cpu_idle(); | |
299 | } | |
300 | ||
1da177e4 LT |
301 | /* |
302 | * Called by both boot and secondaries to move global data into | |
303 | * per-processor storage. | |
304 | */ | |
bd6f68af | 305 | void __cpuinit smp_store_cpu_info(unsigned int cpuid) |
1da177e4 LT |
306 | { |
307 | struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); | |
308 | ||
309 | cpu_info->loops_per_jiffy = loops_per_jiffy; | |
310 | } | |
311 | ||
312 | void __init smp_cpus_done(unsigned int max_cpus) | |
313 | { | |
314 | int cpu; | |
315 | unsigned long bogosum = 0; | |
316 | ||
317 | for_each_online_cpu(cpu) | |
318 | bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy; | |
319 | ||
320 | printk(KERN_INFO "SMP: Total of %d processors activated " | |
321 | "(%lu.%02lu BogoMIPS).\n", | |
322 | num_online_cpus(), | |
323 | bogosum / (500000/HZ), | |
324 | (bogosum / (5000/HZ)) % 100); | |
325 | } | |
326 | ||
327 | void __init smp_prepare_boot_cpu(void) | |
328 | { | |
329 | unsigned int cpu = smp_processor_id(); | |
330 | ||
71f512e8 | 331 | per_cpu(cpu_data, cpu).idle = current; |
1da177e4 LT |
332 | } |
333 | ||
82668104 | 334 | static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg) |
1da177e4 LT |
335 | { |
336 | unsigned long flags; | |
337 | unsigned int cpu; | |
338 | ||
339 | local_irq_save(flags); | |
340 | ||
82668104 | 341 | for_each_cpu(cpu, mask) { |
1da177e4 LT |
342 | struct ipi_data *ipi = &per_cpu(ipi_data, cpu); |
343 | ||
344 | spin_lock(&ipi->lock); | |
345 | ipi->bits |= 1 << msg; | |
346 | spin_unlock(&ipi->lock); | |
347 | } | |
348 | ||
349 | /* | |
350 | * Call the platform specific cross-CPU call function. | |
351 | */ | |
82668104 | 352 | smp_cross_call(mask); |
1da177e4 LT |
353 | |
354 | local_irq_restore(flags); | |
355 | } | |
356 | ||
82668104 | 357 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
1da177e4 | 358 | { |
f6dd9fa5 | 359 | send_ipi_message(mask, IPI_CALL_FUNC); |
1da177e4 LT |
360 | } |
361 | ||
f6dd9fa5 | 362 | void arch_send_call_function_single_ipi(int cpu) |
3e459990 | 363 | { |
82668104 | 364 | send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); |
3e459990 | 365 | } |
3e459990 | 366 | |
1da177e4 LT |
367 | void show_ipi_list(struct seq_file *p) |
368 | { | |
369 | unsigned int cpu; | |
370 | ||
371 | seq_puts(p, "IPI:"); | |
372 | ||
e11b2236 | 373 | for_each_present_cpu(cpu) |
1da177e4 LT |
374 | seq_printf(p, " %10lu", per_cpu(ipi_data, cpu).ipi_count); |
375 | ||
376 | seq_putc(p, '\n'); | |
377 | } | |
378 | ||
37ee16ae RK |
379 | void show_local_irqs(struct seq_file *p) |
380 | { | |
381 | unsigned int cpu; | |
382 | ||
383 | seq_printf(p, "LOC: "); | |
384 | ||
385 | for_each_present_cpu(cpu) | |
386 | seq_printf(p, "%10u ", irq_stat[cpu].local_timer_irqs); | |
387 | ||
388 | seq_putc(p, '\n'); | |
389 | } | |
390 | ||
bc28248e RK |
391 | /* |
392 | * Timer (local or broadcast) support | |
393 | */ | |
394 | static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent); | |
395 | ||
c97d4869 | 396 | static void ipi_timer(void) |
1da177e4 | 397 | { |
bc28248e | 398 | struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent); |
1da177e4 | 399 | irq_enter(); |
bc28248e | 400 | evt->event_handler(evt); |
1da177e4 LT |
401 | irq_exit(); |
402 | } | |
403 | ||
37ee16ae | 404 | #ifdef CONFIG_LOCAL_TIMERS |
b9811d7f | 405 | asmlinkage void __exception do_local_timer(struct pt_regs *regs) |
37ee16ae | 406 | { |
c97d4869 | 407 | struct pt_regs *old_regs = set_irq_regs(regs); |
37ee16ae RK |
408 | int cpu = smp_processor_id(); |
409 | ||
410 | if (local_timer_ack()) { | |
411 | irq_stat[cpu].local_timer_irqs++; | |
c97d4869 | 412 | ipi_timer(); |
37ee16ae | 413 | } |
c97d4869 RK |
414 | |
415 | set_irq_regs(old_regs); | |
37ee16ae RK |
416 | } |
417 | #endif | |
418 | ||
bc28248e RK |
419 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
420 | static void smp_timer_broadcast(const struct cpumask *mask) | |
421 | { | |
422 | send_ipi_message(mask, IPI_TIMER); | |
423 | } | |
424 | ||
425 | static void broadcast_timer_set_mode(enum clock_event_mode mode, | |
426 | struct clock_event_device *evt) | |
427 | { | |
428 | } | |
429 | ||
430 | static void local_timer_setup(struct clock_event_device *evt) | |
431 | { | |
432 | evt->name = "dummy_timer"; | |
433 | evt->features = CLOCK_EVT_FEAT_ONESHOT | | |
434 | CLOCK_EVT_FEAT_PERIODIC | | |
435 | CLOCK_EVT_FEAT_DUMMY; | |
436 | evt->rating = 400; | |
437 | evt->mult = 1; | |
438 | evt->set_mode = broadcast_timer_set_mode; | |
439 | evt->broadcast = smp_timer_broadcast; | |
440 | ||
441 | clockevents_register_device(evt); | |
442 | } | |
443 | #endif | |
444 | ||
445 | void __cpuinit percpu_timer_setup(void) | |
446 | { | |
447 | unsigned int cpu = smp_processor_id(); | |
448 | struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); | |
449 | ||
450 | evt->cpumask = cpumask_of(cpu); | |
451 | ||
452 | local_timer_setup(evt); | |
453 | } | |
454 | ||
1da177e4 LT |
455 | static DEFINE_SPINLOCK(stop_lock); |
456 | ||
457 | /* | |
458 | * ipi_cpu_stop - handle IPI from smp_send_stop() | |
459 | */ | |
460 | static void ipi_cpu_stop(unsigned int cpu) | |
461 | { | |
462 | spin_lock(&stop_lock); | |
463 | printk(KERN_CRIT "CPU%u: stopping\n", cpu); | |
464 | dump_stack(); | |
465 | spin_unlock(&stop_lock); | |
466 | ||
e03cdade | 467 | set_cpu_online(cpu, false); |
1da177e4 LT |
468 | |
469 | local_fiq_disable(); | |
470 | local_irq_disable(); | |
471 | ||
472 | while (1) | |
473 | cpu_relax(); | |
474 | } | |
475 | ||
476 | /* | |
477 | * Main handler for inter-processor interrupts | |
478 | * | |
479 | * For ARM, the ipimask now only identifies a single | |
480 | * category of IPI (Bit 1 IPIs have been replaced by a | |
481 | * different mechanism): | |
482 | * | |
483 | * Bit 0 - Inter-processor function call | |
484 | */ | |
b9811d7f | 485 | asmlinkage void __exception do_IPI(struct pt_regs *regs) |
1da177e4 LT |
486 | { |
487 | unsigned int cpu = smp_processor_id(); | |
488 | struct ipi_data *ipi = &per_cpu(ipi_data, cpu); | |
c97d4869 | 489 | struct pt_regs *old_regs = set_irq_regs(regs); |
1da177e4 LT |
490 | |
491 | ipi->ipi_count++; | |
492 | ||
493 | for (;;) { | |
494 | unsigned long msgs; | |
495 | ||
496 | spin_lock(&ipi->lock); | |
497 | msgs = ipi->bits; | |
498 | ipi->bits = 0; | |
499 | spin_unlock(&ipi->lock); | |
500 | ||
501 | if (!msgs) | |
502 | break; | |
503 | ||
504 | do { | |
505 | unsigned nextmsg; | |
506 | ||
507 | nextmsg = msgs & -msgs; | |
508 | msgs &= ~nextmsg; | |
509 | nextmsg = ffz(~nextmsg); | |
510 | ||
511 | switch (nextmsg) { | |
512 | case IPI_TIMER: | |
c97d4869 | 513 | ipi_timer(); |
1da177e4 LT |
514 | break; |
515 | ||
516 | case IPI_RESCHEDULE: | |
517 | /* | |
518 | * nothing more to do - eveything is | |
519 | * done on the interrupt return path | |
520 | */ | |
521 | break; | |
522 | ||
523 | case IPI_CALL_FUNC: | |
f6dd9fa5 JA |
524 | generic_smp_call_function_interrupt(); |
525 | break; | |
526 | ||
527 | case IPI_CALL_FUNC_SINGLE: | |
528 | generic_smp_call_function_single_interrupt(); | |
1da177e4 LT |
529 | break; |
530 | ||
531 | case IPI_CPU_STOP: | |
532 | ipi_cpu_stop(cpu); | |
533 | break; | |
534 | ||
535 | default: | |
536 | printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n", | |
537 | cpu, nextmsg); | |
538 | break; | |
539 | } | |
540 | } while (msgs); | |
541 | } | |
c97d4869 RK |
542 | |
543 | set_irq_regs(old_regs); | |
1da177e4 LT |
544 | } |
545 | ||
546 | void smp_send_reschedule(int cpu) | |
547 | { | |
82668104 | 548 | send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE); |
1da177e4 LT |
549 | } |
550 | ||
1da177e4 LT |
551 | void smp_send_stop(void) |
552 | { | |
553 | cpumask_t mask = cpu_online_map; | |
554 | cpu_clear(smp_processor_id(), mask); | |
82668104 | 555 | send_ipi_message(&mask, IPI_CPU_STOP); |
1da177e4 LT |
556 | } |
557 | ||
558 | /* | |
559 | * not supported here | |
560 | */ | |
5048bcba | 561 | int setup_profiling_timer(unsigned int multiplier) |
1da177e4 LT |
562 | { |
563 | return -EINVAL; | |
564 | } | |
4b0ef3b1 | 565 | |
82668104 RK |
566 | static void |
567 | on_each_cpu_mask(void (*func)(void *), void *info, int wait, | |
568 | const struct cpumask *mask) | |
4b0ef3b1 | 569 | { |
4b0ef3b1 RK |
570 | preempt_disable(); |
571 | ||
82668104 RK |
572 | smp_call_function_many(mask, func, info, wait); |
573 | if (cpumask_test_cpu(smp_processor_id(), mask)) | |
4b0ef3b1 RK |
574 | func(info); |
575 | ||
576 | preempt_enable(); | |
4b0ef3b1 RK |
577 | } |
578 | ||
579 | /**********************************************************************/ | |
580 | ||
581 | /* | |
582 | * TLB operations | |
583 | */ | |
584 | struct tlb_args { | |
585 | struct vm_area_struct *ta_vma; | |
586 | unsigned long ta_start; | |
587 | unsigned long ta_end; | |
588 | }; | |
589 | ||
590 | static inline void ipi_flush_tlb_all(void *ignored) | |
591 | { | |
592 | local_flush_tlb_all(); | |
593 | } | |
594 | ||
595 | static inline void ipi_flush_tlb_mm(void *arg) | |
596 | { | |
597 | struct mm_struct *mm = (struct mm_struct *)arg; | |
598 | ||
599 | local_flush_tlb_mm(mm); | |
600 | } | |
601 | ||
602 | static inline void ipi_flush_tlb_page(void *arg) | |
603 | { | |
604 | struct tlb_args *ta = (struct tlb_args *)arg; | |
605 | ||
606 | local_flush_tlb_page(ta->ta_vma, ta->ta_start); | |
607 | } | |
608 | ||
609 | static inline void ipi_flush_tlb_kernel_page(void *arg) | |
610 | { | |
611 | struct tlb_args *ta = (struct tlb_args *)arg; | |
612 | ||
613 | local_flush_tlb_kernel_page(ta->ta_start); | |
614 | } | |
615 | ||
616 | static inline void ipi_flush_tlb_range(void *arg) | |
617 | { | |
618 | struct tlb_args *ta = (struct tlb_args *)arg; | |
619 | ||
620 | local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end); | |
621 | } | |
622 | ||
623 | static inline void ipi_flush_tlb_kernel_range(void *arg) | |
624 | { | |
625 | struct tlb_args *ta = (struct tlb_args *)arg; | |
626 | ||
627 | local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end); | |
628 | } | |
629 | ||
630 | void flush_tlb_all(void) | |
631 | { | |
faa7bc51 CM |
632 | if (tlb_ops_need_broadcast()) |
633 | on_each_cpu(ipi_flush_tlb_all, NULL, 1); | |
634 | else | |
635 | local_flush_tlb_all(); | |
4b0ef3b1 RK |
636 | } |
637 | ||
638 | void flush_tlb_mm(struct mm_struct *mm) | |
639 | { | |
faa7bc51 | 640 | if (tlb_ops_need_broadcast()) |
56f8ba83 | 641 | on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mm_cpumask(mm)); |
faa7bc51 CM |
642 | else |
643 | local_flush_tlb_mm(mm); | |
4b0ef3b1 RK |
644 | } |
645 | ||
646 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) | |
647 | { | |
faa7bc51 CM |
648 | if (tlb_ops_need_broadcast()) { |
649 | struct tlb_args ta; | |
650 | ta.ta_vma = vma; | |
651 | ta.ta_start = uaddr; | |
56f8ba83 | 652 | on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mm_cpumask(vma->vm_mm)); |
faa7bc51 CM |
653 | } else |
654 | local_flush_tlb_page(vma, uaddr); | |
4b0ef3b1 RK |
655 | } |
656 | ||
657 | void flush_tlb_kernel_page(unsigned long kaddr) | |
658 | { | |
faa7bc51 CM |
659 | if (tlb_ops_need_broadcast()) { |
660 | struct tlb_args ta; | |
661 | ta.ta_start = kaddr; | |
662 | on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1); | |
663 | } else | |
664 | local_flush_tlb_kernel_page(kaddr); | |
4b0ef3b1 RK |
665 | } |
666 | ||
667 | void flush_tlb_range(struct vm_area_struct *vma, | |
668 | unsigned long start, unsigned long end) | |
669 | { | |
faa7bc51 CM |
670 | if (tlb_ops_need_broadcast()) { |
671 | struct tlb_args ta; | |
672 | ta.ta_vma = vma; | |
673 | ta.ta_start = start; | |
674 | ta.ta_end = end; | |
56f8ba83 | 675 | on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mm_cpumask(vma->vm_mm)); |
faa7bc51 CM |
676 | } else |
677 | local_flush_tlb_range(vma, start, end); | |
4b0ef3b1 RK |
678 | } |
679 | ||
680 | void flush_tlb_kernel_range(unsigned long start, unsigned long end) | |
681 | { | |
faa7bc51 CM |
682 | if (tlb_ops_need_broadcast()) { |
683 | struct tlb_args ta; | |
684 | ta.ta_start = start; | |
685 | ta.ta_end = end; | |
686 | on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1); | |
687 | } else | |
688 | local_flush_tlb_kernel_range(start, end); | |
4b0ef3b1 | 689 | } |