Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/smp.c | |
3 | * | |
4 | * Copyright (C) 2002 ARM Limited, All Rights Reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
c97d4869 | 10 | #include <linux/module.h> |
1da177e4 LT |
11 | #include <linux/delay.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/spinlock.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/cache.h> | |
17 | #include <linux/profile.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/mm.h> | |
4e950f6f | 20 | #include <linux/err.h> |
1da177e4 | 21 | #include <linux/cpu.h> |
1da177e4 | 22 | #include <linux/seq_file.h> |
c97d4869 | 23 | #include <linux/irq.h> |
bc28248e RK |
24 | #include <linux/percpu.h> |
25 | #include <linux/clockchips.h> | |
3c030bea | 26 | #include <linux/completion.h> |
1da177e4 | 27 | |
60063497 | 28 | #include <linux/atomic.h> |
abcee5fb | 29 | #include <asm/smp.h> |
1da177e4 LT |
30 | #include <asm/cacheflush.h> |
31 | #include <asm/cpu.h> | |
42578c82 | 32 | #include <asm/cputype.h> |
5a567d78 | 33 | #include <asm/exception.h> |
8903826d | 34 | #include <asm/idmap.h> |
c9018aab | 35 | #include <asm/topology.h> |
e65f38ed RK |
36 | #include <asm/mmu_context.h> |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/pgalloc.h> | |
1da177e4 | 39 | #include <asm/processor.h> |
37b05b63 | 40 | #include <asm/sections.h> |
1da177e4 LT |
41 | #include <asm/tlbflush.h> |
42 | #include <asm/ptrace.h> | |
bc28248e | 43 | #include <asm/localtimer.h> |
d6257288 | 44 | #include <asm/smp_plat.h> |
abcee5fb | 45 | #include <asm/mach/arch.h> |
1da177e4 | 46 | |
e65f38ed RK |
47 | /* |
48 | * as from 2.5, kernels no longer have an init_tasks structure | |
49 | * so we need some other way of telling a new secondary core | |
50 | * where to place its SVC stack | |
51 | */ | |
52 | struct secondary_data secondary_data; | |
53 | ||
28e8e29c MZ |
54 | /* |
55 | * control for which core is the next to come out of the secondary | |
56 | * boot "holding pen" | |
57 | */ | |
58 | volatile int __cpuinitdata pen_release = -1; | |
59 | ||
1da177e4 | 60 | enum ipi_msg_type { |
24480d98 | 61 | IPI_TIMER = 2, |
1da177e4 LT |
62 | IPI_RESCHEDULE, |
63 | IPI_CALL_FUNC, | |
f6dd9fa5 | 64 | IPI_CALL_FUNC_SINGLE, |
1da177e4 LT |
65 | IPI_CPU_STOP, |
66 | }; | |
67 | ||
149c2415 RK |
68 | static DECLARE_COMPLETION(cpu_running); |
69 | ||
abcee5fb MZ |
70 | static struct smp_operations smp_ops; |
71 | ||
72 | void __init smp_set_ops(struct smp_operations *ops) | |
73 | { | |
74 | if (ops) | |
75 | smp_ops = *ops; | |
76 | }; | |
77 | ||
84ec6d57 | 78 | int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle) |
1da177e4 | 79 | { |
1da177e4 LT |
80 | int ret; |
81 | ||
e65f38ed RK |
82 | /* |
83 | * We need to tell the secondary core where to find | |
84 | * its stack and the page tables. | |
85 | */ | |
32d39a93 | 86 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
4e8ee7de | 87 | secondary_data.pgdir = virt_to_phys(idmap_pgd); |
d427958a | 88 | secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir); |
1027247f RK |
89 | __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); |
90 | outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); | |
e65f38ed | 91 | |
1da177e4 LT |
92 | /* |
93 | * Now bring the CPU into our world. | |
94 | */ | |
95 | ret = boot_secondary(cpu, idle); | |
e65f38ed | 96 | if (ret == 0) { |
e65f38ed RK |
97 | /* |
98 | * CPU was successfully started, wait for it | |
99 | * to come online or time out. | |
100 | */ | |
149c2415 RK |
101 | wait_for_completion_timeout(&cpu_running, |
102 | msecs_to_jiffies(1000)); | |
e65f38ed | 103 | |
58613cd1 RK |
104 | if (!cpu_online(cpu)) { |
105 | pr_crit("CPU%u: failed to come online\n", cpu); | |
e65f38ed | 106 | ret = -EIO; |
58613cd1 RK |
107 | } |
108 | } else { | |
109 | pr_err("CPU%u: failed to boot: %d\n", cpu, ret); | |
e65f38ed RK |
110 | } |
111 | ||
5d43045b | 112 | secondary_data.stack = NULL; |
e65f38ed RK |
113 | secondary_data.pgdir = 0; |
114 | ||
1da177e4 LT |
115 | return ret; |
116 | } | |
117 | ||
abcee5fb | 118 | /* platform specific SMP operations */ |
ac6c7998 | 119 | void __init smp_init_cpus(void) |
abcee5fb MZ |
120 | { |
121 | if (smp_ops.smp_init_cpus) | |
122 | smp_ops.smp_init_cpus(); | |
123 | } | |
124 | ||
ac6c7998 | 125 | static void __init platform_smp_prepare_cpus(unsigned int max_cpus) |
abcee5fb MZ |
126 | { |
127 | if (smp_ops.smp_prepare_cpus) | |
128 | smp_ops.smp_prepare_cpus(max_cpus); | |
129 | } | |
130 | ||
ac6c7998 | 131 | static void __cpuinit platform_secondary_init(unsigned int cpu) |
abcee5fb MZ |
132 | { |
133 | if (smp_ops.smp_secondary_init) | |
134 | smp_ops.smp_secondary_init(cpu); | |
135 | } | |
136 | ||
ac6c7998 | 137 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) |
abcee5fb MZ |
138 | { |
139 | if (smp_ops.smp_boot_secondary) | |
140 | return smp_ops.smp_boot_secondary(cpu, idle); | |
141 | return -ENOSYS; | |
142 | } | |
143 | ||
a054a811 | 144 | #ifdef CONFIG_HOTPLUG_CPU |
10034aab RK |
145 | static void percpu_timer_stop(void); |
146 | ||
ac6c7998 | 147 | static int platform_cpu_kill(unsigned int cpu) |
abcee5fb MZ |
148 | { |
149 | if (smp_ops.cpu_kill) | |
150 | return smp_ops.cpu_kill(cpu); | |
151 | return 1; | |
152 | } | |
153 | ||
ac6c7998 | 154 | static void platform_cpu_die(unsigned int cpu) |
abcee5fb MZ |
155 | { |
156 | if (smp_ops.cpu_die) | |
157 | smp_ops.cpu_die(cpu); | |
158 | } | |
159 | ||
ac6c7998 | 160 | static int platform_cpu_disable(unsigned int cpu) |
abcee5fb MZ |
161 | { |
162 | if (smp_ops.cpu_disable) | |
163 | return smp_ops.cpu_disable(cpu); | |
164 | ||
165 | /* | |
166 | * By default, allow disabling all CPUs except the first one, | |
167 | * since this is special on a lot of platforms, e.g. because | |
168 | * of clock tick interrupts. | |
169 | */ | |
170 | return cpu == 0 ? -EPERM : 0; | |
171 | } | |
a054a811 RK |
172 | /* |
173 | * __cpu_disable runs on the processor to be shutdown. | |
174 | */ | |
ac6c7998 | 175 | int __cpuinit __cpu_disable(void) |
a054a811 RK |
176 | { |
177 | unsigned int cpu = smp_processor_id(); | |
a054a811 RK |
178 | int ret; |
179 | ||
8e2a43f5 | 180 | ret = platform_cpu_disable(cpu); |
a054a811 RK |
181 | if (ret) |
182 | return ret; | |
183 | ||
184 | /* | |
185 | * Take this CPU offline. Once we clear this, we can't return, | |
186 | * and we must not schedule until we're ready to give up the cpu. | |
187 | */ | |
e03cdade | 188 | set_cpu_online(cpu, false); |
a054a811 RK |
189 | |
190 | /* | |
191 | * OK - migrate IRQs away from this CPU | |
192 | */ | |
193 | migrate_irqs(); | |
194 | ||
37ee16ae RK |
195 | /* |
196 | * Stop the local timer for this CPU. | |
197 | */ | |
10034aab | 198 | percpu_timer_stop(); |
37ee16ae | 199 | |
a054a811 RK |
200 | /* |
201 | * Flush user cache and TLB mappings, and then remove this CPU | |
202 | * from the vm mask set of all processes. | |
203 | */ | |
204 | flush_cache_all(); | |
205 | local_flush_tlb_all(); | |
206 | ||
3eaa73bd | 207 | clear_tasks_mm_cpumask(cpu); |
a054a811 RK |
208 | |
209 | return 0; | |
210 | } | |
211 | ||
3c030bea RK |
212 | static DECLARE_COMPLETION(cpu_died); |
213 | ||
a054a811 RK |
214 | /* |
215 | * called on the thread which is asking for a CPU to be shutdown - | |
216 | * waits until shutdown has completed, or it is timed out. | |
217 | */ | |
ac6c7998 | 218 | void __cpuinit __cpu_die(unsigned int cpu) |
a054a811 | 219 | { |
3c030bea RK |
220 | if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) { |
221 | pr_err("CPU%u: cpu didn't die\n", cpu); | |
222 | return; | |
223 | } | |
224 | printk(KERN_NOTICE "CPU%u: shutdown\n", cpu); | |
225 | ||
a054a811 RK |
226 | if (!platform_cpu_kill(cpu)) |
227 | printk("CPU%u: unable to kill\n", cpu); | |
228 | } | |
229 | ||
230 | /* | |
231 | * Called from the idle thread for the CPU which has been shutdown. | |
232 | * | |
233 | * Note that we disable IRQs here, but do not re-enable them | |
234 | * before returning to the caller. This is also the behaviour | |
235 | * of the other hotplug-cpu capable cores, so presumably coming | |
236 | * out of idle fixes this. | |
237 | */ | |
90140c30 | 238 | void __ref cpu_die(void) |
a054a811 RK |
239 | { |
240 | unsigned int cpu = smp_processor_id(); | |
241 | ||
a054a811 RK |
242 | idle_task_exit(); |
243 | ||
f36d3401 RK |
244 | local_irq_disable(); |
245 | mb(); | |
246 | ||
3c030bea | 247 | /* Tell __cpu_die() that this CPU is now safe to dispose of */ |
ff081e05 | 248 | RCU_NONIDLE(complete(&cpu_died)); |
3c030bea | 249 | |
a054a811 RK |
250 | /* |
251 | * actual CPU shutdown procedure is at least platform (if not | |
3c030bea | 252 | * CPU) specific. |
a054a811 RK |
253 | */ |
254 | platform_cpu_die(cpu); | |
255 | ||
256 | /* | |
257 | * Do not return to the idle loop - jump back to the secondary | |
258 | * cpu initialisation. There's some initialisation which needs | |
259 | * to be repeated to undo the effects of taking the CPU offline. | |
260 | */ | |
261 | __asm__("mov sp, %0\n" | |
faabfa08 | 262 | " mov fp, #0\n" |
a054a811 RK |
263 | " b secondary_start_kernel" |
264 | : | |
32d39a93 | 265 | : "r" (task_stack_page(current) + THREAD_SIZE - 8)); |
a054a811 RK |
266 | } |
267 | #endif /* CONFIG_HOTPLUG_CPU */ | |
268 | ||
05c74a6c RK |
269 | /* |
270 | * Called by both boot and secondaries to move global data into | |
271 | * per-processor storage. | |
272 | */ | |
273 | static void __cpuinit smp_store_cpu_info(unsigned int cpuid) | |
274 | { | |
275 | struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); | |
276 | ||
277 | cpu_info->loops_per_jiffy = loops_per_jiffy; | |
c9018aab VG |
278 | |
279 | store_cpu_topology(cpuid); | |
05c74a6c RK |
280 | } |
281 | ||
d4578592 MZ |
282 | static void percpu_timer_setup(void); |
283 | ||
e65f38ed RK |
284 | /* |
285 | * This is the secondary CPU boot entry. We're using this CPUs | |
286 | * idle thread stack, but a set of temporary page tables. | |
287 | */ | |
bd6f68af | 288 | asmlinkage void __cpuinit secondary_start_kernel(void) |
e65f38ed RK |
289 | { |
290 | struct mm_struct *mm = &init_mm; | |
da2660d2 | 291 | unsigned int cpu = smp_processor_id(); |
e65f38ed | 292 | |
e65f38ed RK |
293 | /* |
294 | * All kernel threads share the same mm context; grab a | |
295 | * reference and switch to it. | |
296 | */ | |
e65f38ed RK |
297 | atomic_inc(&mm->mm_count); |
298 | current->active_mm = mm; | |
56f8ba83 | 299 | cpumask_set_cpu(cpu, mm_cpumask(mm)); |
e65f38ed RK |
300 | cpu_switch_mm(mm->pgd, mm); |
301 | enter_lazy_tlb(mm, current); | |
505d7b19 | 302 | local_flush_tlb_all(); |
e65f38ed | 303 | |
fde165b2 CC |
304 | printk("CPU%u: Booted secondary processor\n", cpu); |
305 | ||
e65f38ed | 306 | cpu_init(); |
5bfb5d69 | 307 | preempt_disable(); |
2c0136db | 308 | trace_hardirqs_off(); |
e65f38ed RK |
309 | |
310 | /* | |
311 | * Give the platform a chance to do its own initialisation. | |
312 | */ | |
313 | platform_secondary_init(cpu); | |
314 | ||
e545a614 | 315 | notify_cpu_starting(cpu); |
a8655e83 | 316 | |
e65f38ed RK |
317 | calibrate_delay(); |
318 | ||
319 | smp_store_cpu_info(cpu); | |
320 | ||
321 | /* | |
573619d1 RK |
322 | * OK, now it's safe to let the boot CPU continue. Wait for |
323 | * the CPU migration code to notice that the CPU is online | |
149c2415 | 324 | * before we continue - which happens after __cpu_up returns. |
e65f38ed | 325 | */ |
e03cdade | 326 | set_cpu_online(cpu, true); |
149c2415 | 327 | complete(&cpu_running); |
eb047454 TG |
328 | |
329 | /* | |
330 | * Setup the percpu timer for this CPU. | |
331 | */ | |
332 | percpu_timer_setup(); | |
333 | ||
eb047454 TG |
334 | local_irq_enable(); |
335 | local_fiq_enable(); | |
336 | ||
e65f38ed RK |
337 | /* |
338 | * OK, it's off to the idle thread for us | |
339 | */ | |
340 | cpu_idle(); | |
341 | } | |
342 | ||
1da177e4 LT |
343 | void __init smp_cpus_done(unsigned int max_cpus) |
344 | { | |
345 | int cpu; | |
346 | unsigned long bogosum = 0; | |
347 | ||
348 | for_each_online_cpu(cpu) | |
349 | bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy; | |
350 | ||
351 | printk(KERN_INFO "SMP: Total of %d processors activated " | |
352 | "(%lu.%02lu BogoMIPS).\n", | |
353 | num_online_cpus(), | |
354 | bogosum / (500000/HZ), | |
355 | (bogosum / (5000/HZ)) % 100); | |
356 | } | |
357 | ||
358 | void __init smp_prepare_boot_cpu(void) | |
359 | { | |
1da177e4 LT |
360 | } |
361 | ||
05c74a6c | 362 | void __init smp_prepare_cpus(unsigned int max_cpus) |
1da177e4 | 363 | { |
05c74a6c | 364 | unsigned int ncores = num_possible_cpus(); |
1da177e4 | 365 | |
c9018aab VG |
366 | init_cpu_topology(); |
367 | ||
05c74a6c | 368 | smp_store_cpu_info(smp_processor_id()); |
1da177e4 LT |
369 | |
370 | /* | |
05c74a6c | 371 | * are we trying to boot more cores than exist? |
1da177e4 | 372 | */ |
05c74a6c RK |
373 | if (max_cpus > ncores) |
374 | max_cpus = ncores; | |
7fa22bd5 | 375 | if (ncores > 1 && max_cpus) { |
05c74a6c RK |
376 | /* |
377 | * Enable the local timer or broadcast device for the | |
378 | * boot CPU, but only if we have more than one CPU. | |
379 | */ | |
380 | percpu_timer_setup(); | |
1da177e4 | 381 | |
7fa22bd5 SB |
382 | /* |
383 | * Initialise the present map, which describes the set of CPUs | |
384 | * actually populated at the present time. A platform should | |
385 | * re-initialize the map in platform_smp_prepare_cpus() if | |
386 | * present != possible (e.g. physical hotplug). | |
387 | */ | |
0b5f9c00 | 388 | init_cpu_present(cpu_possible_mask); |
7fa22bd5 | 389 | |
05c74a6c RK |
390 | /* |
391 | * Initialise the SCU if there are more than one CPU | |
392 | * and let them know where to start. | |
393 | */ | |
394 | platform_smp_prepare_cpus(max_cpus); | |
395 | } | |
1da177e4 LT |
396 | } |
397 | ||
0f7b332f RK |
398 | static void (*smp_cross_call)(const struct cpumask *, unsigned int); |
399 | ||
400 | void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int)) | |
401 | { | |
402 | smp_cross_call = fn; | |
403 | } | |
404 | ||
82668104 | 405 | void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
1da177e4 | 406 | { |
e3fbb087 | 407 | smp_cross_call(mask, IPI_CALL_FUNC); |
1da177e4 LT |
408 | } |
409 | ||
f6dd9fa5 | 410 | void arch_send_call_function_single_ipi(int cpu) |
3e459990 | 411 | { |
e3fbb087 | 412 | smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE); |
3e459990 | 413 | } |
3e459990 | 414 | |
4a88abd7 RK |
415 | static const char *ipi_types[NR_IPI] = { |
416 | #define S(x,s) [x - IPI_TIMER] = s | |
417 | S(IPI_TIMER, "Timer broadcast interrupts"), | |
418 | S(IPI_RESCHEDULE, "Rescheduling interrupts"), | |
419 | S(IPI_CALL_FUNC, "Function call interrupts"), | |
420 | S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"), | |
421 | S(IPI_CPU_STOP, "CPU stop interrupts"), | |
422 | }; | |
423 | ||
f13cd417 | 424 | void show_ipi_list(struct seq_file *p, int prec) |
1da177e4 | 425 | { |
4a88abd7 | 426 | unsigned int cpu, i; |
1da177e4 | 427 | |
4a88abd7 RK |
428 | for (i = 0; i < NR_IPI; i++) { |
429 | seq_printf(p, "%*s%u: ", prec - 1, "IPI", i); | |
1da177e4 | 430 | |
4a88abd7 RK |
431 | for_each_present_cpu(cpu) |
432 | seq_printf(p, "%10u ", | |
433 | __get_irq_stat(cpu, ipi_irqs[i])); | |
1da177e4 | 434 | |
4a88abd7 RK |
435 | seq_printf(p, " %s\n", ipi_types[i]); |
436 | } | |
1da177e4 LT |
437 | } |
438 | ||
b54992fe | 439 | u64 smp_irq_stat_cpu(unsigned int cpu) |
37ee16ae | 440 | { |
b54992fe RK |
441 | u64 sum = 0; |
442 | int i; | |
37ee16ae | 443 | |
b54992fe RK |
444 | for (i = 0; i < NR_IPI; i++) |
445 | sum += __get_irq_stat(cpu, ipi_irqs[i]); | |
37ee16ae | 446 | |
b54992fe | 447 | return sum; |
37ee16ae RK |
448 | } |
449 | ||
bc28248e RK |
450 | /* |
451 | * Timer (local or broadcast) support | |
452 | */ | |
453 | static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent); | |
454 | ||
c97d4869 | 455 | static void ipi_timer(void) |
1da177e4 | 456 | { |
bc28248e | 457 | struct clock_event_device *evt = &__get_cpu_var(percpu_clockevent); |
bc28248e | 458 | evt->event_handler(evt); |
1da177e4 LT |
459 | } |
460 | ||
bc28248e RK |
461 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
462 | static void smp_timer_broadcast(const struct cpumask *mask) | |
463 | { | |
e3fbb087 | 464 | smp_cross_call(mask, IPI_TIMER); |
bc28248e | 465 | } |
5388a6b2 RK |
466 | #else |
467 | #define smp_timer_broadcast NULL | |
468 | #endif | |
bc28248e RK |
469 | |
470 | static void broadcast_timer_set_mode(enum clock_event_mode mode, | |
471 | struct clock_event_device *evt) | |
472 | { | |
473 | } | |
474 | ||
a8d2518c | 475 | static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt) |
bc28248e RK |
476 | { |
477 | evt->name = "dummy_timer"; | |
478 | evt->features = CLOCK_EVT_FEAT_ONESHOT | | |
479 | CLOCK_EVT_FEAT_PERIODIC | | |
480 | CLOCK_EVT_FEAT_DUMMY; | |
481 | evt->rating = 400; | |
482 | evt->mult = 1; | |
483 | evt->set_mode = broadcast_timer_set_mode; | |
bc28248e RK |
484 | |
485 | clockevents_register_device(evt); | |
486 | } | |
bc28248e | 487 | |
0ef330e1 MZ |
488 | static struct local_timer_ops *lt_ops; |
489 | ||
490 | #ifdef CONFIG_LOCAL_TIMERS | |
491 | int local_timer_register(struct local_timer_ops *ops) | |
492 | { | |
bfa05f4f MZ |
493 | if (!is_smp() || !setup_max_cpus) |
494 | return -ENXIO; | |
495 | ||
0ef330e1 MZ |
496 | if (lt_ops) |
497 | return -EBUSY; | |
498 | ||
499 | lt_ops = ops; | |
500 | return 0; | |
501 | } | |
502 | #endif | |
503 | ||
d4578592 | 504 | static void __cpuinit percpu_timer_setup(void) |
bc28248e RK |
505 | { |
506 | unsigned int cpu = smp_processor_id(); | |
507 | struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); | |
508 | ||
509 | evt->cpumask = cpumask_of(cpu); | |
5388a6b2 | 510 | evt->broadcast = smp_timer_broadcast; |
bc28248e | 511 | |
d4578592 | 512 | if (!lt_ops || lt_ops->setup(evt)) |
af90f10d | 513 | broadcast_timer_setup(evt); |
bc28248e RK |
514 | } |
515 | ||
10034aab RK |
516 | #ifdef CONFIG_HOTPLUG_CPU |
517 | /* | |
518 | * The generic clock events code purposely does not stop the local timer | |
519 | * on CPU_DEAD/CPU_DEAD_FROZEN hotplug events, so we have to do it | |
520 | * manually here. | |
521 | */ | |
522 | static void percpu_timer_stop(void) | |
523 | { | |
524 | unsigned int cpu = smp_processor_id(); | |
525 | struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); | |
526 | ||
d4578592 MZ |
527 | if (lt_ops) |
528 | lt_ops->stop(evt); | |
10034aab RK |
529 | } |
530 | #endif | |
531 | ||
bd31b859 | 532 | static DEFINE_RAW_SPINLOCK(stop_lock); |
1da177e4 LT |
533 | |
534 | /* | |
535 | * ipi_cpu_stop - handle IPI from smp_send_stop() | |
536 | */ | |
537 | static void ipi_cpu_stop(unsigned int cpu) | |
538 | { | |
3d3f78d7 RK |
539 | if (system_state == SYSTEM_BOOTING || |
540 | system_state == SYSTEM_RUNNING) { | |
bd31b859 | 541 | raw_spin_lock(&stop_lock); |
3d3f78d7 RK |
542 | printk(KERN_CRIT "CPU%u: stopping\n", cpu); |
543 | dump_stack(); | |
bd31b859 | 544 | raw_spin_unlock(&stop_lock); |
3d3f78d7 | 545 | } |
1da177e4 | 546 | |
e03cdade | 547 | set_cpu_online(cpu, false); |
1da177e4 LT |
548 | |
549 | local_fiq_disable(); | |
550 | local_irq_disable(); | |
551 | ||
552 | while (1) | |
553 | cpu_relax(); | |
554 | } | |
555 | ||
556 | /* | |
557 | * Main handler for inter-processor interrupts | |
1da177e4 | 558 | */ |
4073723a | 559 | asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs) |
0b5a1b95 SG |
560 | { |
561 | handle_IPI(ipinr, regs); | |
562 | } | |
563 | ||
564 | void handle_IPI(int ipinr, struct pt_regs *regs) | |
1da177e4 LT |
565 | { |
566 | unsigned int cpu = smp_processor_id(); | |
c97d4869 | 567 | struct pt_regs *old_regs = set_irq_regs(regs); |
1da177e4 | 568 | |
4a88abd7 RK |
569 | if (ipinr >= IPI_TIMER && ipinr < IPI_TIMER + NR_IPI) |
570 | __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_TIMER]); | |
1da177e4 | 571 | |
24480d98 RK |
572 | switch (ipinr) { |
573 | case IPI_TIMER: | |
7deabca0 | 574 | irq_enter(); |
24480d98 | 575 | ipi_timer(); |
7deabca0 | 576 | irq_exit(); |
24480d98 | 577 | break; |
1da177e4 | 578 | |
24480d98 | 579 | case IPI_RESCHEDULE: |
184748cc | 580 | scheduler_ipi(); |
24480d98 | 581 | break; |
1da177e4 | 582 | |
24480d98 | 583 | case IPI_CALL_FUNC: |
7deabca0 | 584 | irq_enter(); |
24480d98 | 585 | generic_smp_call_function_interrupt(); |
7deabca0 | 586 | irq_exit(); |
24480d98 | 587 | break; |
f6dd9fa5 | 588 | |
24480d98 | 589 | case IPI_CALL_FUNC_SINGLE: |
7deabca0 | 590 | irq_enter(); |
24480d98 | 591 | generic_smp_call_function_single_interrupt(); |
7deabca0 | 592 | irq_exit(); |
24480d98 | 593 | break; |
1da177e4 | 594 | |
24480d98 | 595 | case IPI_CPU_STOP: |
7deabca0 | 596 | irq_enter(); |
24480d98 | 597 | ipi_cpu_stop(cpu); |
7deabca0 | 598 | irq_exit(); |
24480d98 | 599 | break; |
1da177e4 | 600 | |
24480d98 RK |
601 | default: |
602 | printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n", | |
603 | cpu, ipinr); | |
604 | break; | |
1da177e4 | 605 | } |
c97d4869 | 606 | set_irq_regs(old_regs); |
1da177e4 LT |
607 | } |
608 | ||
609 | void smp_send_reschedule(int cpu) | |
610 | { | |
e3fbb087 | 611 | smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE); |
1da177e4 LT |
612 | } |
613 | ||
6fa99b7f WD |
614 | #ifdef CONFIG_HOTPLUG_CPU |
615 | static void smp_kill_cpus(cpumask_t *mask) | |
616 | { | |
617 | unsigned int cpu; | |
618 | for_each_cpu(cpu, mask) | |
619 | platform_cpu_kill(cpu); | |
620 | } | |
621 | #else | |
622 | static void smp_kill_cpus(cpumask_t *mask) { } | |
623 | #endif | |
624 | ||
1da177e4 LT |
625 | void smp_send_stop(void) |
626 | { | |
28e18293 | 627 | unsigned long timeout; |
6fa99b7f | 628 | struct cpumask mask; |
1da177e4 | 629 | |
6fa99b7f WD |
630 | cpumask_copy(&mask, cpu_online_mask); |
631 | cpumask_clear_cpu(smp_processor_id(), &mask); | |
c5dff4ff JMC |
632 | if (!cpumask_empty(&mask)) |
633 | smp_cross_call(&mask, IPI_CPU_STOP); | |
4b0ef3b1 | 634 | |
28e18293 RK |
635 | /* Wait up to one second for other CPUs to stop */ |
636 | timeout = USEC_PER_SEC; | |
637 | while (num_online_cpus() > 1 && timeout--) | |
638 | udelay(1); | |
4b0ef3b1 | 639 | |
28e18293 RK |
640 | if (num_online_cpus() > 1) |
641 | pr_warning("SMP: failed to stop secondary CPUs\n"); | |
6fa99b7f WD |
642 | |
643 | smp_kill_cpus(&mask); | |
4b0ef3b1 RK |
644 | } |
645 | ||
4b0ef3b1 | 646 | /* |
1da177e4 | 647 | * not supported here |
4b0ef3b1 | 648 | */ |
5048bcba | 649 | int setup_profiling_timer(unsigned int multiplier) |
4b0ef3b1 | 650 | { |
1da177e4 | 651 | return -EINVAL; |
4b0ef3b1 | 652 | } |