[deliverable/linux.git] / arch / arm / kernel / smp_twd.c

/*
 *  linux/arch/arm/kernel/smp_twd.c
 *
 *  Copyright (C) 2002 ARM Ltd.
 *  All Rights Reserved
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/cpu.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/smp.h>
#include <linux/jiffies.h>
#include <linux/clockchips.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>

#include <asm/smp_plat.h>
#include <asm/smp_twd.h>

/* set up by the platform code */
static void __iomem *twd_base;

static struct clk *twd_clk;
static unsigned long twd_timer_rate;
static DEFINE_PER_CPU(bool, percpu_setup_called);

static struct clock_event_device __percpu *twd_evt;
static int twd_ppi;

static void twd_set_mode(enum clock_event_mode mode,
			struct clock_event_device *clk)
{
	unsigned long ctrl;

	switch (mode) {
	case CLOCK_EVT_MODE_PERIODIC:
		ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
			| TWD_TIMER_CONTROL_PERIODIC;
		writel_relaxed(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
			twd_base + TWD_TIMER_LOAD);
		break;
	case CLOCK_EVT_MODE_ONESHOT:
		/* period set, and timer enabled in 'next_event' hook */
		ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
		break;
	case CLOCK_EVT_MODE_UNUSED:
	case CLOCK_EVT_MODE_SHUTDOWN:
	default:
		ctrl = 0;
	}

	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
}

static int twd_set_next_event(unsigned long evt,
			struct clock_event_device *unused)
{
	unsigned long ctrl = readl_relaxed(twd_base + TWD_TIMER_CONTROL);

	ctrl |= TWD_TIMER_CONTROL_ENABLE;

	writel_relaxed(evt, twd_base + TWD_TIMER_COUNTER);
	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);

	return 0;
}

/*
 * local_timer_ack: checks for a local timer interrupt.
 *
 * If a local timer interrupt has occurred, acknowledge and return 1.
 * Otherwise, return 0.
 */
static int twd_timer_ack(void)
{
	if (readl_relaxed(twd_base + TWD_TIMER_INTSTAT)) {
		writel_relaxed(1, twd_base + TWD_TIMER_INTSTAT);
		return 1;
	}

	return 0;
}

static void twd_timer_stop(void)
{
	struct clock_event_device *clk = __this_cpu_ptr(twd_evt);

	twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
	disable_percpu_irq(clk->irq);
}

#ifdef CONFIG_COMMON_CLK

/*
 * Updates clockevent frequency when the cpu frequency changes.
 * Called on the cpu that is changing frequency with interrupts disabled.
 */
static void twd_update_frequency(void *new_rate)
{
	twd_timer_rate = *((unsigned long *) new_rate);

	clockevents_update_freq(__this_cpu_ptr(twd_evt), twd_timer_rate);
}

static int twd_rate_change(struct notifier_block *nb,
	unsigned long flags, void *data)
{
	struct clk_notifier_data *cnd = data;

	/*
	 * The twd clock events must be reprogrammed to account for the new
	 * frequency.  The timer is local to a cpu, so cross-call to the
	 * changing cpu.
	 */
	if (flags == POST_RATE_CHANGE)
		on_each_cpu(twd_update_frequency,
				  (void *)&cnd->new_rate, 1);

	return NOTIFY_OK;
}

static struct notifier_block twd_clk_nb = {
	.notifier_call = twd_rate_change,
};

static int twd_clk_init(void)
{
	if (twd_evt && __this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
		return clk_notifier_register(twd_clk, &twd_clk_nb);

	return 0;
}
core_initcall(twd_clk_init);

#elif defined (CONFIG_CPU_FREQ)

#include <linux/cpufreq.h>

/*
 * Updates clockevent frequency when the cpu frequency changes.
 * Called on the cpu that is changing frequency with interrupts disabled.
 */
static void twd_update_frequency(void *data)
{
	twd_timer_rate = clk_get_rate(twd_clk);

	clockevents_update_freq(__this_cpu_ptr(twd_evt), twd_timer_rate);
}

static int twd_cpufreq_transition(struct notifier_block *nb,
	unsigned long state, void *data)
{
	struct cpufreq_freqs *freqs = data;

	/*
	 * The twd clock events must be reprogrammed to account for the new
	 * frequency.  The timer is local to a cpu, so cross-call to the
	 * changing cpu.
	 */
	if (state == CPUFREQ_POSTCHANGE)
		smp_call_function_single(freqs->cpu, twd_update_frequency,
			NULL, 1);

	return NOTIFY_OK;
}

static struct notifier_block twd_cpufreq_nb = {
	.notifier_call = twd_cpufreq_transition,
};

static int twd_cpufreq_init(void)
{
	if (twd_evt && __this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
		return cpufreq_register_notifier(&twd_cpufreq_nb,
			CPUFREQ_TRANSITION_NOTIFIER);

	return 0;
}
core_initcall(twd_cpufreq_init);

#endif

static void twd_calibrate_rate(void)
{
	unsigned long count;
	u64 waitjiffies;

	/*
	 * If this is the first time round, we need to work out how fast
	 * the timer ticks
	 */
	if (twd_timer_rate == 0) {
		printk(KERN_INFO "Calibrating local timer... ");

		/* Wait for a tick to start */
		waitjiffies = get_jiffies_64() + 1;

		while (get_jiffies_64() < waitjiffies)
			udelay(10);

		/* OK, now the tick has started, let's get the timer going */
		waitjiffies += 5;

				 /* enable, no interrupt or reload */
		writel_relaxed(0x1, twd_base + TWD_TIMER_CONTROL);

				 /* maximum value */
		writel_relaxed(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);

		while (get_jiffies_64() < waitjiffies)
			udelay(10);

		count = readl_relaxed(twd_base + TWD_TIMER_COUNTER);

		twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);

		printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
			(twd_timer_rate / 10000) % 100);
	}
}

static irqreturn_t twd_handler(int irq, void *dev_id)
{
	struct clock_event_device *evt = dev_id;

	if (twd_timer_ack()) {
		evt->event_handler(evt);
		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static void twd_get_clock(struct device_node *np)
{
	int err;

	if (np)
		twd_clk = of_clk_get(np, 0);
	else
		twd_clk = clk_get_sys("smp_twd", NULL);

	if (IS_ERR(twd_clk)) {
		pr_err("smp_twd: clock not found %d\n", (int) PTR_ERR(twd_clk));
		return;
	}

	err = clk_prepare_enable(twd_clk);
	if (err) {
		pr_err("smp_twd: clock failed to prepare+enable: %d\n", err);
		clk_put(twd_clk);
		return;
	}

	twd_timer_rate = clk_get_rate(twd_clk);
}

/*
 * Setup the local clock events for a CPU.
 */
static void twd_timer_setup(void)
{
	struct clock_event_device *clk = __this_cpu_ptr(twd_evt);
	int cpu = smp_processor_id();

	/*
	 * If the basic setup for this CPU has been done before don't
	 * bother with the below.
	 */
	if (per_cpu(percpu_setup_called, cpu)) {
		writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);
		clockevents_register_device(clk);
		enable_percpu_irq(clk->irq, 0);
		return;
	}
	per_cpu(percpu_setup_called, cpu) = true;

	twd_calibrate_rate();

	/*
	 * The following is done once per CPU the first time .setup() is
	 * called.
	 */
	writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);

	clk->name = "local_timer";
	clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
			CLOCK_EVT_FEAT_C3STOP;
	clk->rating = 350;
	clk->set_mode = twd_set_mode;
	clk->set_next_event = twd_set_next_event;
	clk->irq = twd_ppi;
	clk->cpumask = cpumask_of(cpu);

	clockevents_config_and_register(clk, twd_timer_rate,
					0xf, 0xffffffff);
	enable_percpu_irq(clk->irq, 0);
}

static int twd_timer_cpu_notify(struct notifier_block *self,
				unsigned long action, void *hcpu)
{
	switch (action & ~CPU_TASKS_FROZEN) {
	case CPU_STARTING:
		twd_timer_setup();
		break;
	case CPU_DYING:
		twd_timer_stop();
		break;
	}

	return NOTIFY_OK;
}

static struct notifier_block twd_timer_cpu_nb = {
	.notifier_call = twd_timer_cpu_notify,
};

static int __init twd_local_timer_common_register(struct device_node *np)
{
	int err;

	twd_evt = alloc_percpu(struct clock_event_device);
	if (!twd_evt) {
		err = -ENOMEM;
		goto out_free;
	}

	err = request_percpu_irq(twd_ppi, twd_handler, "twd", twd_evt);
	if (err) {
		pr_err("twd: can't register interrupt %d (%d)\n", twd_ppi, err);
		goto out_free;
	}

	err = register_cpu_notifier(&twd_timer_cpu_nb);
	if (err)
		goto out_irq;

	twd_get_clock(np);

	/*
	 * Immediately configure the timer on the boot CPU, unless we need
	 * jiffies to be incrementing to calibrate the rate in which case
	 * setup the timer in late_time_init.
	 */
	if (twd_timer_rate)
		twd_timer_setup();
	else
		late_time_init = twd_timer_setup;

	return 0;

out_irq:
	free_percpu_irq(twd_ppi, twd_evt);
out_free:
	iounmap(twd_base);
	twd_base = NULL;
	free_percpu(twd_evt);

	return err;
}

int __init twd_local_timer_register(struct twd_local_timer *tlt)
{
	if (twd_base || twd_evt)
		return -EBUSY;

	twd_ppi	= tlt->res[1].start;

	twd_base = ioremap(tlt->res[0].start, resource_size(&tlt->res[0]));
	if (!twd_base)
		return -ENOMEM;

	return twd_local_timer_common_register(NULL);
}

#ifdef CONFIG_OF
static void __init twd_local_timer_of_register(struct device_node *np)
{
	int err;

	if (!is_smp() || !setup_max_cpus)
		return;

	twd_ppi = irq_of_parse_and_map(np, 0);
	if (!twd_ppi) {
		err = -EINVAL;
		goto out;
	}

	twd_base = of_iomap(np, 0);
	if (!twd_base) {
		err = -ENOMEM;
		goto out;
	}

	err = twd_local_timer_common_register(np);

out:
	WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
}
CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
#endif
Commit	Line	Data
f32f4ce2 RK	1	/*
	2	* linux/arch/arm/kernel/smp_twd.c
	3	*
	4	* Copyright (C) 2002 ARM Ltd.
	5	* All Rights Reserved
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11	#include <linux/init.h>
	12	#include <linux/kernel.h>
5def51b0	13	#include <linux/clk.h>
a894fcc2	14	#include <linux/cpu.h>
f32f4ce2 RK	15	#include <linux/delay.h>
f32f4ce2 RK	16	#include <linux/device.h>
5def51b0	17	#include <linux/err.h>
f32f4ce2 RK	18	#include <linux/smp.h>
	19	#include <linux/jiffies.h>
	20	#include <linux/clockchips.h>
92485104	21	#include <linux/interrupt.h>
f32f4ce2	22	#include <linux/io.h>
d8e03643 MZ	23	#include <linux/of_irq.h>
d8e03643 MZ	24	#include <linux/of_address.h>
f32f4ce2	25
904464b9	26	#include <asm/smp_plat.h>
f32f4ce2	27	#include <asm/smp_twd.h>
f32f4ce2	28
f32f4ce2	29	/* set up by the platform code */
92485104	30	static void __iomem *twd_base;
f32f4ce2	31
5def51b0	32	static struct clk *twd_clk;
f32f4ce2	33	static unsigned long twd_timer_rate;
a68becd1	34	static DEFINE_PER_CPU(bool, percpu_setup_called);
f32f4ce2	35
a894fcc2	36	static struct clock_event_device __percpu *twd_evt;
81e46f7b	37	static int twd_ppi;
28af690a	38
f32f4ce2 RK	39	static void twd_set_mode(enum clock_event_mode mode,
	40	struct clock_event_device *clk)
	41	{
	42	unsigned long ctrl;
	43
4c5158d4	44	switch (mode) {
f32f4ce2	45	case CLOCK_EVT_MODE_PERIODIC:
f32f4ce2 RK	46	ctrl = TWD_TIMER_CONTROL_ENABLE \| TWD_TIMER_CONTROL_IT_ENABLE
f32f4ce2 RK	47	\| TWD_TIMER_CONTROL_PERIODIC;
2e874ea3	48	writel_relaxed(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
ad17a26e	49	twd_base + TWD_TIMER_LOAD);
f32f4ce2 RK	50	break;
	51	case CLOCK_EVT_MODE_ONESHOT:
	52	/* period set, and timer enabled in 'next_event' hook */
	53	ctrl = TWD_TIMER_CONTROL_IT_ENABLE \| TWD_TIMER_CONTROL_ONESHOT;
	54	break;
	55	case CLOCK_EVT_MODE_UNUSED:
	56	case CLOCK_EVT_MODE_SHUTDOWN:
	57	default:
	58	ctrl = 0;
	59	}
	60
2e874ea3	61	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
f32f4ce2 RK	62	}
	63
	64	static int twd_set_next_event(unsigned long evt,
	65	struct clock_event_device *unused)
	66	{
2e874ea3	67	unsigned long ctrl = readl_relaxed(twd_base + TWD_TIMER_CONTROL);
f32f4ce2	68
4c5158d4 RK	69	ctrl \|= TWD_TIMER_CONTROL_ENABLE;
4c5158d4 RK	70
2e874ea3 BD	71	writel_relaxed(evt, twd_base + TWD_TIMER_COUNTER);
2e874ea3 BD	72	writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
f32f4ce2 RK	73
	74	return 0;
	75	}
	76
	77	/*
	78	* local_timer_ack: checks for a local timer interrupt.
	79	*
	80	* If a local timer interrupt has occurred, acknowledge and return 1.
	81	* Otherwise, return 0.
	82	*/
92485104	83	static int twd_timer_ack(void)
f32f4ce2	84	{
2e874ea3 BD	85	if (readl_relaxed(twd_base + TWD_TIMER_INTSTAT)) {
2e874ea3 BD	86	writel_relaxed(1, twd_base + TWD_TIMER_INTSTAT);
f32f4ce2 RK	87	return 1;
	88	}
	89
	90	return 0;
	91	}
	92
a894fcc2	93	static void twd_timer_stop(void)
28af690a	94	{
a894fcc2 SB	95	struct clock_event_device *clk = __this_cpu_ptr(twd_evt);
a894fcc2 SB	96
28af690a MZ	97	twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
	98	disable_percpu_irq(clk->irq);
	99	}
	100
2b25d9f6 MT	101	#ifdef CONFIG_COMMON_CLK
	102
	103	/*
	104	* Updates clockevent frequency when the cpu frequency changes.
	105	* Called on the cpu that is changing frequency with interrupts disabled.
	106	*/
	107	static void twd_update_frequency(void *new_rate)
	108	{
	109	twd_timer_rate = ((unsigned long ) new_rate);
	110
a894fcc2	111	clockevents_update_freq(__this_cpu_ptr(twd_evt), twd_timer_rate);
2b25d9f6 MT	112	}
	113
	114	static int twd_rate_change(struct notifier_block *nb,
	115	unsigned long flags, void *data)
	116	{
	117	struct clk_notifier_data *cnd = data;
	118
	119	/*
	120	* The twd clock events must be reprogrammed to account for the new
	121	* frequency. The timer is local to a cpu, so cross-call to the
	122	* changing cpu.
	123	*/
	124	if (flags == POST_RATE_CHANGE)
cbbe6f82	125	on_each_cpu(twd_update_frequency,
2b25d9f6 MT	126	(void *)&cnd->new_rate, 1);
	127
	128	return NOTIFY_OK;
	129	}
	130
	131	static struct notifier_block twd_clk_nb = {
	132	.notifier_call = twd_rate_change,
	133	};
	134
	135	static int twd_clk_init(void)
	136	{
a894fcc2	137	if (twd_evt && __this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
2b25d9f6 MT	138	return clk_notifier_register(twd_clk, &twd_clk_nb);
	139
	140	return 0;
	141	}
	142	core_initcall(twd_clk_init);
	143
	144	#elif defined (CONFIG_CPU_FREQ)
	145
	146	#include <linux/cpufreq.h>
4fd7f9b1 LW	147
	148	/*
	149	* Updates clockevent frequency when the cpu frequency changes.
	150	* Called on the cpu that is changing frequency with interrupts disabled.
	151	*/
	152	static void twd_update_frequency(void *data)
	153	{
	154	twd_timer_rate = clk_get_rate(twd_clk);
	155
a894fcc2	156	clockevents_update_freq(__this_cpu_ptr(twd_evt), twd_timer_rate);
4fd7f9b1 LW	157	}
	158
	159	static int twd_cpufreq_transition(struct notifier_block *nb,
	160	unsigned long state, void *data)
	161	{
	162	struct cpufreq_freqs *freqs = data;
	163
	164	/*
	165	* The twd clock events must be reprogrammed to account for the new
	166	* frequency. The timer is local to a cpu, so cross-call to the
	167	* changing cpu.
	168	*/
0b443ead	169	if (state == CPUFREQ_POSTCHANGE)
4fd7f9b1	170	smp_call_function_single(freqs->cpu, twd_update_frequency,
3cd88f99	171	NULL, 1);
4fd7f9b1 LW	172
	173	return NOTIFY_OK;
	174	}
	175
	176	static struct notifier_block twd_cpufreq_nb = {
	177	.notifier_call = twd_cpufreq_transition,
	178	};
	179
	180	static int twd_cpufreq_init(void)
	181	{
a894fcc2	182	if (twd_evt && __this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
4fd7f9b1 LW	183	return cpufreq_register_notifier(&twd_cpufreq_nb,
	184	CPUFREQ_TRANSITION_NOTIFIER);
	185
	186	return 0;
	187	}
	188	core_initcall(twd_cpufreq_init);
	189
	190	#endif
	191
8bd26e3a	192	static void twd_calibrate_rate(void)
f32f4ce2	193	{
03399c1c	194	unsigned long count;
f32f4ce2 RK	195	u64 waitjiffies;
	196
	197	/*
	198	* If this is the first time round, we need to work out how fast
	199	* the timer ticks
	200	*/
	201	if (twd_timer_rate == 0) {
4c5158d4	202	printk(KERN_INFO "Calibrating local timer... ");
f32f4ce2 RK	203
	204	/* Wait for a tick to start */
	205	waitjiffies = get_jiffies_64() + 1;
	206
	207	while (get_jiffies_64() < waitjiffies)
	208	udelay(10);
	209
	210	/* OK, now the tick has started, let's get the timer going */
	211	waitjiffies += 5;
	212
	213	/* enable, no interrupt or reload */
2e874ea3	214	writel_relaxed(0x1, twd_base + TWD_TIMER_CONTROL);
f32f4ce2 RK	215
f32f4ce2 RK	216	/* maximum value */
2e874ea3	217	writel_relaxed(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
f32f4ce2 RK	218
	219	while (get_jiffies_64() < waitjiffies)
	220	udelay(10);
	221
2e874ea3	222	count = readl_relaxed(twd_base + TWD_TIMER_COUNTER);
f32f4ce2 RK	223
	224	twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
	225
	226	printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
90c5ffe5	227	(twd_timer_rate / 10000) % 100);
f32f4ce2	228	}
f32f4ce2 RK	229	}
f32f4ce2 RK	230
28af690a MZ	231	static irqreturn_t twd_handler(int irq, void *dev_id)
28af690a MZ	232	{
a894fcc2	233	struct clock_event_device *evt = dev_id;
28af690a MZ	234
	235	if (twd_timer_ack()) {
	236	evt->event_handler(evt);
	237	return IRQ_HANDLED;
	238	}
	239
	240	return IRQ_NONE;
	241	}
	242
bd603455	243	static void twd_get_clock(struct device_node *np)
5def51b0	244	{
5def51b0 LW	245	int err;
5def51b0 LW	246
bd603455 RH	247	if (np)
	248	twd_clk = of_clk_get(np, 0);
	249	else
	250	twd_clk = clk_get_sys("smp_twd", NULL);
	251
	252	if (IS_ERR(twd_clk)) {
	253	pr_err("smp_twd: clock not found %d\n", (int) PTR_ERR(twd_clk));
	254	return;
5def51b0 LW	255	}
5def51b0 LW	256
bd603455	257	err = clk_prepare_enable(twd_clk);
5def51b0	258	if (err) {
2577cf24	259	pr_err("smp_twd: clock failed to prepare+enable: %d\n", err);
bd603455 RH	260	clk_put(twd_clk);
bd603455 RH	261	return;
5def51b0 LW	262	}
5def51b0 LW	263
bd603455	264	twd_timer_rate = clk_get_rate(twd_clk);
5def51b0 LW	265	}
5def51b0 LW	266
f32f4ce2 RK	267	/*
	268	* Setup the local clock events for a CPU.
	269	*/
47dcd356	270	static void twd_timer_setup(void)
f32f4ce2	271	{
a894fcc2	272	struct clock_event_device *clk = __this_cpu_ptr(twd_evt);
a68becd1	273	int cpu = smp_processor_id();
28af690a	274
a68becd1 LW	275	/*
	276	* If the basic setup for this CPU has been done before don't
	277	* bother with the below.
	278	*/
	279	if (per_cpu(percpu_setup_called, cpu)) {
2e874ea3	280	writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);
a894fcc2	281	clockevents_register_device(clk);
a68becd1	282	enable_percpu_irq(clk->irq, 0);
a894fcc2	283	return;
a68becd1 LW	284	}
a68becd1 LW	285	per_cpu(percpu_setup_called, cpu) = true;
28af690a	286
bd603455	287	twd_calibrate_rate();
f32f4ce2	288
a68becd1 LW	289	/*
	290	* The following is done once per CPU the first time .setup() is
	291	* called.
	292	*/
2e874ea3	293	writel_relaxed(0, twd_base + TWD_TIMER_CONTROL);
c214455f	294
4c5158d4	295	clk->name = "local_timer";
5388a6b2 RK	296	clk->features = CLOCK_EVT_FEAT_PERIODIC \| CLOCK_EVT_FEAT_ONESHOT \|
5388a6b2 RK	297	CLOCK_EVT_FEAT_C3STOP;
4c5158d4 RK	298	clk->rating = 350;
	299	clk->set_mode = twd_set_mode;
	300	clk->set_next_event = twd_set_next_event;
92485104	301	clk->irq = twd_ppi;
a894fcc2	302	clk->cpumask = cpumask_of(cpu);
28af690a	303
54d15b1d LW	304	clockevents_config_and_register(clk, twd_timer_rate,
54d15b1d LW	305	0xf, 0xffffffff);
28af690a	306	enable_percpu_irq(clk->irq, 0);
a894fcc2	307	}
81e46f7b	308
47dcd356 OJ	309	static int twd_timer_cpu_notify(struct notifier_block *self,
47dcd356 OJ	310	unsigned long action, void *hcpu)
a894fcc2 SB	311	{
	312	switch (action & ~CPU_TASKS_FROZEN) {
	313	case CPU_STARTING:
	314	twd_timer_setup();
	315	break;
	316	case CPU_DYING:
	317	twd_timer_stop();
	318	break;
	319	}
	320
	321	return NOTIFY_OK;
81e46f7b MZ	322	}
81e46f7b MZ	323
47dcd356	324	static struct notifier_block twd_timer_cpu_nb = {
a894fcc2	325	.notifier_call = twd_timer_cpu_notify,
81e46f7b MZ	326	};
81e46f7b MZ	327
bd603455	328	static int __init twd_local_timer_common_register(struct device_node *np)
81e46f7b MZ	329	{
	330	int err;
	331
a894fcc2	332	twd_evt = alloc_percpu(struct clock_event_device);
d8e03643	333	if (!twd_evt) {
81e46f7b	334	err = -ENOMEM;
d8e03643	335	goto out_free;
81e46f7b MZ	336	}
	337
	338	err = request_percpu_irq(twd_ppi, twd_handler, "twd", twd_evt);
	339	if (err) {
	340	pr_err("twd: can't register interrupt %d (%d)\n", twd_ppi, err);
d8e03643	341	goto out_free;
81e46f7b MZ	342	}
81e46f7b MZ	343
a894fcc2	344	err = register_cpu_notifier(&twd_timer_cpu_nb);
81e46f7b	345	if (err)
d8e03643	346	goto out_irq;
81e46f7b	347
bd603455 RH	348	twd_get_clock(np);
bd603455 RH	349
a894fcc2 SB	350	/*
	351	* Immediately configure the timer on the boot CPU, unless we need
	352	* jiffies to be incrementing to calibrate the rate in which case
	353	* setup the timer in late_time_init.
	354	*/
	355	if (twd_timer_rate)
	356	twd_timer_setup();
	357	else
	358	late_time_init = twd_timer_setup;
	359
81e46f7b MZ	360	return 0;
81e46f7b MZ	361
d8e03643 MZ	362	out_irq:
	363	free_percpu_irq(twd_ppi, twd_evt);
	364	out_free:
81e46f7b	365	iounmap(twd_base);
d8e03643	366	twd_base = NULL;
81e46f7b	367	free_percpu(twd_evt);
d8e03643	368
81e46f7b	369	return err;
f32f4ce2	370	}
d8e03643 MZ	371
	372	int __init twd_local_timer_register(struct twd_local_timer *tlt)
	373	{
	374	if (twd_base \|\| twd_evt)
	375	return -EBUSY;
	376
	377	twd_ppi = tlt->res[1].start;
	378
	379	twd_base = ioremap(tlt->res[0].start, resource_size(&tlt->res[0]));
	380	if (!twd_base)
	381	return -ENOMEM;
	382
bd603455	383	return twd_local_timer_common_register(NULL);
d8e03643 MZ	384	}
	385
	386	#ifdef CONFIG_OF
da4a686a	387	static void __init twd_local_timer_of_register(struct device_node *np)
d8e03643	388	{
d8e03643 MZ	389	int err;
d8e03643 MZ	390
904464b9 SG	391	if (!is_smp() \|\| !setup_max_cpus)
	392	return;
	393
d8e03643 MZ	394	twd_ppi = irq_of_parse_and_map(np, 0);
	395	if (!twd_ppi) {
	396	err = -EINVAL;
	397	goto out;
	398	}
	399
	400	twd_base = of_iomap(np, 0);
	401	if (!twd_base) {
	402	err = -ENOMEM;
	403	goto out;
	404	}
	405
bd603455	406	err = twd_local_timer_common_register(np);
d8e03643 MZ	407
	408	out:
	409	WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
	410	}
da4a686a RH	411	CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
	412	CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
	413	CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
d8e03643	414	#endif