[deliverable/linux.git] / arch / arm / kernel / smp_twd.c

/*
 *  linux/arch/arm/kernel/smp_twd.c
 *
 *  Copyright (C) 2002 ARM Ltd.
 *  All Rights Reserved
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/smp.h>
#include <linux/jiffies.h>
#include <linux/clockchips.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>

#include <asm/smp_twd.h>
#include <asm/localtimer.h>
#include <asm/hardware/gic.h>

/* set up by the platform code */
static void __iomem *twd_base;

static struct clk *twd_clk;
static unsigned long twd_timer_rate;

static struct clock_event_device __percpu **twd_evt;
static int twd_ppi;

static void twd_set_mode(enum clock_event_mode mode,
			struct clock_event_device *clk)
{
	unsigned long ctrl;

	switch (mode) {
	case CLOCK_EVT_MODE_PERIODIC:
		/* timer load already set up */
		ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
			| TWD_TIMER_CONTROL_PERIODIC;
		__raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD);
		break;
	case CLOCK_EVT_MODE_ONESHOT:
		/* period set, and timer enabled in 'next_event' hook */
		ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
		break;
	case CLOCK_EVT_MODE_UNUSED:
	case CLOCK_EVT_MODE_SHUTDOWN:
	default:
		ctrl = 0;
	}

	__raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
}

static int twd_set_next_event(unsigned long evt,
			struct clock_event_device *unused)
{
	unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);

	ctrl |= TWD_TIMER_CONTROL_ENABLE;

	__raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
	__raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);

	return 0;
}

/*
 * local_timer_ack: checks for a local timer interrupt.
 *
 * If a local timer interrupt has occurred, acknowledge and return 1.
 * Otherwise, return 0.
 */
static int twd_timer_ack(void)
{
	if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
		__raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
		return 1;
	}

	return 0;
}

static void twd_timer_stop(struct clock_event_device *clk)
{
	twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
	disable_percpu_irq(clk->irq);
}

#ifdef CONFIG_COMMON_CLK

/*
 * Updates clockevent frequency when the cpu frequency changes.
 * Called on the cpu that is changing frequency with interrupts disabled.
 */
static void twd_update_frequency(void *new_rate)
{
	twd_timer_rate = *((unsigned long *) new_rate);

	clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
}

static int twd_rate_change(struct notifier_block *nb,
	unsigned long flags, void *data)
{
	struct clk_notifier_data *cnd = data;

	/*
	 * The twd clock events must be reprogrammed to account for the new
	 * frequency.  The timer is local to a cpu, so cross-call to the
	 * changing cpu.
	 */
	if (flags == POST_RATE_CHANGE)
		smp_call_function(twd_update_frequency,
				  (void *)&cnd->new_rate, 1);

	return NOTIFY_OK;
}

static struct notifier_block twd_clk_nb = {
	.notifier_call = twd_rate_change,
};

static int twd_clk_init(void)
{
	if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
		return clk_notifier_register(twd_clk, &twd_clk_nb);

	return 0;
}
core_initcall(twd_clk_init);

#elif defined (CONFIG_CPU_FREQ)

#include <linux/cpufreq.h>

/*
 * Updates clockevent frequency when the cpu frequency changes.
 * Called on the cpu that is changing frequency with interrupts disabled.
 */
static void twd_update_frequency(void *data)
{
	twd_timer_rate = clk_get_rate(twd_clk);

	clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
}

static int twd_cpufreq_transition(struct notifier_block *nb,
	unsigned long state, void *data)
{
	struct cpufreq_freqs *freqs = data;

	/*
	 * The twd clock events must be reprogrammed to account for the new
	 * frequency.  The timer is local to a cpu, so cross-call to the
	 * changing cpu.
	 */
	if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE)
		smp_call_function_single(freqs->cpu, twd_update_frequency,
			NULL, 1);

	return NOTIFY_OK;
}

static struct notifier_block twd_cpufreq_nb = {
	.notifier_call = twd_cpufreq_transition,
};

static int twd_cpufreq_init(void)
{
	if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
		return cpufreq_register_notifier(&twd_cpufreq_nb,
			CPUFREQ_TRANSITION_NOTIFIER);

	return 0;
}
core_initcall(twd_cpufreq_init);

#endif

static void __cpuinit twd_calibrate_rate(void)
{
	unsigned long count;
	u64 waitjiffies;

	/*
	 * If this is the first time round, we need to work out how fast
	 * the timer ticks
	 */
	if (twd_timer_rate == 0) {
		printk(KERN_INFO "Calibrating local timer... ");

		/* Wait for a tick to start */
		waitjiffies = get_jiffies_64() + 1;

		while (get_jiffies_64() < waitjiffies)
			udelay(10);

		/* OK, now the tick has started, let's get the timer going */
		waitjiffies += 5;

				 /* enable, no interrupt or reload */
		__raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);

				 /* maximum value */
		__raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);

		while (get_jiffies_64() < waitjiffies)
			udelay(10);

		count = __raw_readl(twd_base + TWD_TIMER_COUNTER);

		twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);

		printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
			(twd_timer_rate / 10000) % 100);
	}
}

static irqreturn_t twd_handler(int irq, void *dev_id)
{
	struct clock_event_device *evt = *(struct clock_event_device **)dev_id;

	if (twd_timer_ack()) {
		evt->event_handler(evt);
		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static struct clk *twd_get_clock(void)
{
	struct clk *clk;
	int err;

	clk = clk_get_sys("smp_twd", NULL);
	if (IS_ERR(clk)) {
		pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk));
		return clk;
	}

	err = clk_prepare(clk);
	if (err) {
		pr_err("smp_twd: clock failed to prepare: %d\n", err);
		clk_put(clk);
		return ERR_PTR(err);
	}

	err = clk_enable(clk);
	if (err) {
		pr_err("smp_twd: clock failed to enable: %d\n", err);
		clk_unprepare(clk);
		clk_put(clk);
		return ERR_PTR(err);
	}

	return clk;
}

/*
 * Setup the local clock events for a CPU.
 */
static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
{
	struct clock_event_device **this_cpu_clk;

	if (!twd_clk)
		twd_clk = twd_get_clock();

	if (!IS_ERR_OR_NULL(twd_clk))
		twd_timer_rate = clk_get_rate(twd_clk);
	else
		twd_calibrate_rate();

	__raw_writel(0, twd_base + TWD_TIMER_CONTROL);

	clk->name = "local_timer";
	clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
			CLOCK_EVT_FEAT_C3STOP;
	clk->rating = 350;
	clk->set_mode = twd_set_mode;
	clk->set_next_event = twd_set_next_event;
	clk->irq = twd_ppi;

	this_cpu_clk = __this_cpu_ptr(twd_evt);
	*this_cpu_clk = clk;

	clockevents_config_and_register(clk, twd_timer_rate,
					0xf, 0xffffffff);
	enable_percpu_irq(clk->irq, 0);

	return 0;
}

static struct local_timer_ops twd_lt_ops __cpuinitdata = {
	.setup	= twd_timer_setup,
	.stop	= twd_timer_stop,
};

static int __init twd_local_timer_common_register(void)
{
	int err;

	twd_evt = alloc_percpu(struct clock_event_device *);
	if (!twd_evt) {
		err = -ENOMEM;
		goto out_free;
	}

	err = request_percpu_irq(twd_ppi, twd_handler, "twd", twd_evt);
	if (err) {
		pr_err("twd: can't register interrupt %d (%d)\n", twd_ppi, err);
		goto out_free;
	}

	err = local_timer_register(&twd_lt_ops);
	if (err)
		goto out_irq;

	return 0;

out_irq:
	free_percpu_irq(twd_ppi, twd_evt);
out_free:
	iounmap(twd_base);
	twd_base = NULL;
	free_percpu(twd_evt);

	return err;
}

int __init twd_local_timer_register(struct twd_local_timer *tlt)
{
	if (twd_base || twd_evt)
		return -EBUSY;

	twd_ppi	= tlt->res[1].start;

	twd_base = ioremap(tlt->res[0].start, resource_size(&tlt->res[0]));
	if (!twd_base)
		return -ENOMEM;

	return twd_local_timer_common_register();
}

#ifdef CONFIG_OF
const static struct of_device_id twd_of_match[] __initconst = {
	{ .compatible = "arm,cortex-a9-twd-timer",	},
	{ .compatible = "arm,cortex-a5-twd-timer",	},
	{ .compatible = "arm,arm11mp-twd-timer",	},
	{ },
};

void __init twd_local_timer_of_register(void)
{
	struct device_node *np;
	int err;

	np = of_find_matching_node(NULL, twd_of_match);
	if (!np) {
		err = -ENODEV;
		goto out;
	}

	twd_ppi = irq_of_parse_and_map(np, 0);
	if (!twd_ppi) {
		err = -EINVAL;
		goto out;
	}

	twd_base = of_iomap(np, 0);
	if (!twd_base) {
		err = -ENOMEM;
		goto out;
	}

	err = twd_local_timer_common_register();

out:
	WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
}
#endif
Commit	Line	Data
f32f4ce2 RK	1	/*
	2	* linux/arch/arm/kernel/smp_twd.c
	3	*
	4	* Copyright (C) 2002 ARM Ltd.
	5	* All Rights Reserved
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11	#include <linux/init.h>
	12	#include <linux/kernel.h>
5def51b0	13	#include <linux/clk.h>
f32f4ce2 RK	14	#include <linux/delay.h>
f32f4ce2 RK	15	#include <linux/device.h>
5def51b0	16	#include <linux/err.h>
f32f4ce2 RK	17	#include <linux/smp.h>
	18	#include <linux/jiffies.h>
	19	#include <linux/clockchips.h>
92485104	20	#include <linux/interrupt.h>
f32f4ce2	21	#include <linux/io.h>
d8e03643 MZ	22	#include <linux/of_irq.h>
d8e03643 MZ	23	#include <linux/of_address.h>
f32f4ce2 RK	24
f32f4ce2 RK	25	#include <asm/smp_twd.h>
28af690a	26	#include <asm/localtimer.h>
f32f4ce2 RK	27	#include <asm/hardware/gic.h>
f32f4ce2 RK	28
f32f4ce2	29	/* set up by the platform code */
92485104	30	static void __iomem *twd_base;
f32f4ce2	31
5def51b0	32	static struct clk *twd_clk;
f32f4ce2 RK	33	static unsigned long twd_timer_rate;
f32f4ce2 RK	34
28af690a	35	static struct clock_event_device __percpu **twd_evt;
81e46f7b	36	static int twd_ppi;
28af690a	37
f32f4ce2 RK	38	static void twd_set_mode(enum clock_event_mode mode,
	39	struct clock_event_device *clk)
	40	{
	41	unsigned long ctrl;
	42
4c5158d4	43	switch (mode) {
f32f4ce2 RK	44	case CLOCK_EVT_MODE_PERIODIC:
	45	/* timer load already set up */
	46	ctrl = TWD_TIMER_CONTROL_ENABLE \| TWD_TIMER_CONTROL_IT_ENABLE
	47	\| TWD_TIMER_CONTROL_PERIODIC;
03399c1c	48	__raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD);
f32f4ce2 RK	49	break;
	50	case CLOCK_EVT_MODE_ONESHOT:
	51	/* period set, and timer enabled in 'next_event' hook */
	52	ctrl = TWD_TIMER_CONTROL_IT_ENABLE \| TWD_TIMER_CONTROL_ONESHOT;
	53	break;
	54	case CLOCK_EVT_MODE_UNUSED:
	55	case CLOCK_EVT_MODE_SHUTDOWN:
	56	default:
	57	ctrl = 0;
	58	}
	59
	60	__raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
	61	}
	62
	63	static int twd_set_next_event(unsigned long evt,
	64	struct clock_event_device *unused)
	65	{
	66	unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
	67
4c5158d4 RK	68	ctrl \|= TWD_TIMER_CONTROL_ENABLE;
4c5158d4 RK	69
f32f4ce2	70	__raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
4c5158d4	71	__raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
f32f4ce2 RK	72
	73	return 0;
	74	}
	75
	76	/*
	77	* local_timer_ack: checks for a local timer interrupt.
	78	*
	79	* If a local timer interrupt has occurred, acknowledge and return 1.
	80	* Otherwise, return 0.
	81	*/
92485104	82	static int twd_timer_ack(void)
f32f4ce2 RK	83	{
	84	if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
	85	__raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
	86	return 1;
	87	}
	88
	89	return 0;
	90	}
	91
abde710c	92	static void twd_timer_stop(struct clock_event_device *clk)
28af690a MZ	93	{
	94	twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
	95	disable_percpu_irq(clk->irq);
	96	}
	97
2b25d9f6 MT	98	#ifdef CONFIG_COMMON_CLK
	99
	100	/*
	101	* Updates clockevent frequency when the cpu frequency changes.
	102	* Called on the cpu that is changing frequency with interrupts disabled.
	103	*/
	104	static void twd_update_frequency(void *new_rate)
	105	{
	106	twd_timer_rate = ((unsigned long ) new_rate);
	107
	108	clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
	109	}
	110
	111	static int twd_rate_change(struct notifier_block *nb,
	112	unsigned long flags, void *data)
	113	{
	114	struct clk_notifier_data *cnd = data;
	115
	116	/*
	117	* The twd clock events must be reprogrammed to account for the new
	118	* frequency. The timer is local to a cpu, so cross-call to the
	119	* changing cpu.
	120	*/
	121	if (flags == POST_RATE_CHANGE)
	122	smp_call_function(twd_update_frequency,
	123	(void *)&cnd->new_rate, 1);
	124
	125	return NOTIFY_OK;
	126	}
	127
	128	static struct notifier_block twd_clk_nb = {
	129	.notifier_call = twd_rate_change,
	130	};
	131
	132	static int twd_clk_init(void)
	133	{
	134	if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
	135	return clk_notifier_register(twd_clk, &twd_clk_nb);
	136
	137	return 0;
	138	}
	139	core_initcall(twd_clk_init);
	140
	141	#elif defined (CONFIG_CPU_FREQ)
	142
	143	#include <linux/cpufreq.h>
4fd7f9b1 LW	144
	145	/*
	146	* Updates clockevent frequency when the cpu frequency changes.
	147	* Called on the cpu that is changing frequency with interrupts disabled.
	148	*/
	149	static void twd_update_frequency(void *data)
	150	{
	151	twd_timer_rate = clk_get_rate(twd_clk);
	152
	153	clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
	154	}
	155
	156	static int twd_cpufreq_transition(struct notifier_block *nb,
	157	unsigned long state, void *data)
	158	{
	159	struct cpufreq_freqs *freqs = data;
	160
	161	/*
	162	* The twd clock events must be reprogrammed to account for the new
	163	* frequency. The timer is local to a cpu, so cross-call to the
	164	* changing cpu.
	165	*/
	166	if (state == CPUFREQ_POSTCHANGE \|\| state == CPUFREQ_RESUMECHANGE)
	167	smp_call_function_single(freqs->cpu, twd_update_frequency,
3cd88f99	168	NULL, 1);
4fd7f9b1 LW	169
	170	return NOTIFY_OK;
	171	}
	172
	173	static struct notifier_block twd_cpufreq_nb = {
	174	.notifier_call = twd_cpufreq_transition,
	175	};
	176
	177	static int twd_cpufreq_init(void)
	178	{
910ba598	179	if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
4fd7f9b1 LW	180	return cpufreq_register_notifier(&twd_cpufreq_nb,
	181	CPUFREQ_TRANSITION_NOTIFIER);
	182
	183	return 0;
	184	}
	185	core_initcall(twd_cpufreq_init);
	186
	187	#endif
	188
f32f4ce2 RK	189	static void __cpuinit twd_calibrate_rate(void)
f32f4ce2 RK	190	{
03399c1c	191	unsigned long count;
f32f4ce2 RK	192	u64 waitjiffies;
	193
	194	/*
	195	* If this is the first time round, we need to work out how fast
	196	* the timer ticks
	197	*/
	198	if (twd_timer_rate == 0) {
4c5158d4	199	printk(KERN_INFO "Calibrating local timer... ");
f32f4ce2 RK	200
	201	/* Wait for a tick to start */
	202	waitjiffies = get_jiffies_64() + 1;
	203
	204	while (get_jiffies_64() < waitjiffies)
	205	udelay(10);
	206
	207	/* OK, now the tick has started, let's get the timer going */
	208	waitjiffies += 5;
	209
	210	/* enable, no interrupt or reload */
	211	__raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
	212
	213	/* maximum value */
	214	__raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
	215
	216	while (get_jiffies_64() < waitjiffies)
	217	udelay(10);
	218
	219	count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
	220
	221	twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
	222
	223	printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
90c5ffe5	224	(twd_timer_rate / 10000) % 100);
f32f4ce2	225	}
f32f4ce2 RK	226	}
f32f4ce2 RK	227
28af690a MZ	228	static irqreturn_t twd_handler(int irq, void *dev_id)
	229	{
	230	struct clock_event_device evt = (struct clock_event_device **)dev_id;
	231
	232	if (twd_timer_ack()) {
	233	evt->event_handler(evt);
	234	return IRQ_HANDLED;
	235	}
	236
	237	return IRQ_NONE;
	238	}
	239
5def51b0 LW	240	static struct clk *twd_get_clock(void)
	241	{
	242	struct clk *clk;
	243	int err;
	244
	245	clk = clk_get_sys("smp_twd", NULL);
	246	if (IS_ERR(clk)) {
	247	pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk));
	248	return clk;
	249	}
	250
	251	err = clk_prepare(clk);
	252	if (err) {
	253	pr_err("smp_twd: clock failed to prepare: %d\n", err);
	254	clk_put(clk);
	255	return ERR_PTR(err);
	256	}
	257
	258	err = clk_enable(clk);
	259	if (err) {
	260	pr_err("smp_twd: clock failed to enable: %d\n", err);
	261	clk_unprepare(clk);
	262	clk_put(clk);
	263	return ERR_PTR(err);
	264	}
	265
	266	return clk;
	267	}
	268
f32f4ce2 RK	269	/*
	270	* Setup the local clock events for a CPU.
	271	*/
92485104	272	static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
f32f4ce2	273	{
28af690a MZ	274	struct clock_event_device **this_cpu_clk;
28af690a MZ	275
5def51b0 LW	276	if (!twd_clk)
	277	twd_clk = twd_get_clock();
	278
	279	if (!IS_ERR_OR_NULL(twd_clk))
	280	twd_timer_rate = clk_get_rate(twd_clk);
	281	else
	282	twd_calibrate_rate();
f32f4ce2	283
c214455f MZ	284	__raw_writel(0, twd_base + TWD_TIMER_CONTROL);
c214455f MZ	285
4c5158d4	286	clk->name = "local_timer";
5388a6b2 RK	287	clk->features = CLOCK_EVT_FEAT_PERIODIC \| CLOCK_EVT_FEAT_ONESHOT \|
5388a6b2 RK	288	CLOCK_EVT_FEAT_C3STOP;
4c5158d4 RK	289	clk->rating = 350;
	290	clk->set_mode = twd_set_mode;
	291	clk->set_next_event = twd_set_next_event;
92485104	292	clk->irq = twd_ppi;
f32f4ce2	293
28af690a MZ	294	this_cpu_clk = __this_cpu_ptr(twd_evt);
	295	*this_cpu_clk = clk;
	296
54d15b1d LW	297	clockevents_config_and_register(clk, twd_timer_rate,
54d15b1d LW	298	0xf, 0xffffffff);
28af690a	299	enable_percpu_irq(clk->irq, 0);
81e46f7b MZ	300
	301	return 0;
	302	}
	303
	304	static struct local_timer_ops twd_lt_ops __cpuinitdata = {
	305	.setup = twd_timer_setup,
	306	.stop = twd_timer_stop,
	307	};
	308
d8e03643	309	static int __init twd_local_timer_common_register(void)
81e46f7b MZ	310	{
	311	int err;
	312
81e46f7b	313	twd_evt = alloc_percpu(struct clock_event_device *);
d8e03643	314	if (!twd_evt) {
81e46f7b	315	err = -ENOMEM;
d8e03643	316	goto out_free;
81e46f7b MZ	317	}
	318
	319	err = request_percpu_irq(twd_ppi, twd_handler, "twd", twd_evt);
	320	if (err) {
	321	pr_err("twd: can't register interrupt %d (%d)\n", twd_ppi, err);
d8e03643	322	goto out_free;
81e46f7b MZ	323	}
	324
	325	err = local_timer_register(&twd_lt_ops);
	326	if (err)
d8e03643	327	goto out_irq;
81e46f7b MZ	328
	329	return 0;
	330
d8e03643 MZ	331	out_irq:
	332	free_percpu_irq(twd_ppi, twd_evt);
	333	out_free:
81e46f7b	334	iounmap(twd_base);
d8e03643	335	twd_base = NULL;
81e46f7b	336	free_percpu(twd_evt);
d8e03643	337
81e46f7b	338	return err;
f32f4ce2	339	}
d8e03643 MZ	340
	341	int __init twd_local_timer_register(struct twd_local_timer *tlt)
	342	{
	343	if (twd_base \|\| twd_evt)
	344	return -EBUSY;
	345
	346	twd_ppi = tlt->res[1].start;
	347
	348	twd_base = ioremap(tlt->res[0].start, resource_size(&tlt->res[0]));
	349	if (!twd_base)
	350	return -ENOMEM;
	351
	352	return twd_local_timer_common_register();
	353	}
	354
	355	#ifdef CONFIG_OF
	356	const static struct of_device_id twd_of_match[] __initconst = {
	357	{ .compatible = "arm,cortex-a9-twd-timer", },
	358	{ .compatible = "arm,cortex-a5-twd-timer", },
	359	{ .compatible = "arm,arm11mp-twd-timer", },
	360	{ },
	361	};
	362
	363	void __init twd_local_timer_of_register(void)
	364	{
	365	struct device_node *np;
	366	int err;
	367
	368	np = of_find_matching_node(NULL, twd_of_match);
	369	if (!np) {
	370	err = -ENODEV;
	371	goto out;
	372	}
	373
	374	twd_ppi = irq_of_parse_and_map(np, 0);
	375	if (!twd_ppi) {
	376	err = -EINVAL;
	377	goto out;
	378	}
	379
	380	twd_base = of_iomap(np, 0);
	381	if (!twd_base) {
	382	err = -ENOMEM;
	383	goto out;
	384	}
	385
	386	err = twd_local_timer_common_register();
	387
	388	out:
	389	WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
	390	}
	391	#endif