[deliverable/linux.git] / arch / arm / kernel / swp_emulate.c

/*
 *  linux/arch/arm/kernel/swp_emulate.c
 *
 *  Copyright (C) 2009 ARM Limited
 *  __user_* functions adapted from include/asm/uaccess.h
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 *  Implements emulation of the SWP/SWPB instructions using load-exclusive and
 *  store-exclusive for processors that have them disabled (or future ones that
 *  might not implement them).
 *
 *  Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
 *  Where: Rt  = destination
 *	   Rt2 = source
 *	   Rn  = address
 */

#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/sched.h>
#include <linux/syscalls.h>
#include <linux/perf_event.h>

#include <asm/opcodes.h>
#include <asm/system_info.h>
#include <asm/traps.h>
#include <asm/uaccess.h>

/*
 * Error-checking SWP macros implemented using ldrex{b}/strex{b}
 */
#define __user_swpX_asm(data, addr, res, temp, B)		\
	__asm__ __volatile__(					\
	"	mov		%2, %1\n"			\
	"0:	ldrex"B"	%1, [%3]\n"			\
	"1:	strex"B"	%0, %2, [%3]\n"			\
	"	cmp		%0, #0\n"			\
	"	movne		%0, %4\n"			\
	"2:\n"							\
	"	.section	 .fixup,\"ax\"\n"		\
	"	.align		2\n"				\
	"3:	mov		%0, %5\n"			\
	"	b		2b\n"				\
	"	.previous\n"					\
	"	.section	 __ex_table,\"a\"\n"		\
	"	.align		3\n"				\
	"	.long		0b, 3b\n"			\
	"	.long		1b, 3b\n"			\
	"	.previous"					\
	: "=&r" (res), "+r" (data), "=&r" (temp)		\
	: "r" (addr), "i" (-EAGAIN), "i" (-EFAULT)		\
	: "cc", "memory")

#define __user_swp_asm(data, addr, res, temp) \
	__user_swpX_asm(data, addr, res, temp, "")
#define __user_swpb_asm(data, addr, res, temp) \
	__user_swpX_asm(data, addr, res, temp, "b")

/*
 * Macros/defines for extracting register numbers from instruction.
 */
#define EXTRACT_REG_NUM(instruction, offset) \
	(((instruction) & (0xf << (offset))) >> (offset))
#define RN_OFFSET  16
#define RT_OFFSET  12
#define RT2_OFFSET  0
/*
 * Bit 22 of the instruction encoding distinguishes between
 * the SWP and SWPB variants (bit set means SWPB).
 */
#define TYPE_SWPB (1 << 22)

static unsigned long swpcounter;
static unsigned long swpbcounter;
static unsigned long abtcounter;
static pid_t         previous_pid;

#ifdef CONFIG_PROC_FS
static int proc_status_show(struct seq_file *m, void *v)
{
	seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
	seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
	seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
	if (previous_pid != 0)
		seq_printf(m, "Last process:\t\t%d\n", previous_pid);
	return 0;
}

static int proc_status_open(struct inode *inode, struct file *file)
{
	return single_open(file, proc_status_show, PDE_DATA(inode));
}

static const struct file_operations proc_status_fops = {
	.open		= proc_status_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= single_release,
};
#endif

/*
 * Set up process info to signal segmentation fault - called on access error.
 */
static void set_segfault(struct pt_regs *regs, unsigned long addr)
{
	siginfo_t info;

	down_read(&current->mm->mmap_sem);
	if (find_vma(current->mm, addr) == NULL)
		info.si_code = SEGV_MAPERR;
	else
		info.si_code = SEGV_ACCERR;
	up_read(&current->mm->mmap_sem);

	info.si_signo = SIGSEGV;
	info.si_errno = 0;
	info.si_addr  = (void *) instruction_pointer(regs);

	pr_debug("SWP{B} emulation: access caused memory abort!\n");
	arm_notify_die("Illegal memory access", regs, &info, 0, 0);

	abtcounter++;
}

static int emulate_swpX(unsigned int address, unsigned int *data,
			unsigned int type)
{
	unsigned int res = 0;

	if ((type != TYPE_SWPB) && (address & 0x3)) {
		/* SWP to unaligned address not permitted */
		pr_debug("SWP instruction on unaligned pointer!\n");
		return -EFAULT;
	}

	while (1) {
		unsigned long temp;

		/*
		 * Barrier required between accessing protected resource and
		 * releasing a lock for it. Legacy code might not have done
		 * this, and we cannot determine that this is not the case
		 * being emulated, so insert always.
		 */
		smp_mb();

		if (type == TYPE_SWPB)
			__user_swpb_asm(*data, address, res, temp);
		else
			__user_swp_asm(*data, address, res, temp);

		if (likely(res != -EAGAIN) || signal_pending(current))
			break;

		cond_resched();
	}

	if (res == 0) {
		/*
		 * Barrier also required between acquiring a lock for a
		 * protected resource and accessing the resource. Inserted for
		 * same reason as above.
		 */
		smp_mb();

		if (type == TYPE_SWPB)
			swpbcounter++;
		else
			swpcounter++;
	}

	return res;
}

/*
 * swp_handler logs the id of calling process, dissects the instruction, sanity
 * checks the memory location, calls emulate_swpX for the actual operation and
 * deals with fixup/error handling before returning
 */
static int swp_handler(struct pt_regs *regs, unsigned int instr)
{
	unsigned int address, destreg, data, type;
	unsigned int res = 0;

	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);

	res = arm_check_condition(instr, regs->ARM_cpsr);
	switch (res) {
	case ARM_OPCODE_CONDTEST_PASS:
		break;
	case ARM_OPCODE_CONDTEST_FAIL:
		/* Condition failed - return to next instruction */
		regs->ARM_pc += 4;
		return 0;
	case ARM_OPCODE_CONDTEST_UNCOND:
		/* If unconditional encoding - not a SWP, undef */
		return -EFAULT;
	default:
		return -EINVAL;
	}

	if (current->pid != previous_pid) {
		pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
			 current->comm, (unsigned long)current->pid);
		previous_pid = current->pid;
	}

	address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
	data	= regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
	destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);

	type = instr & TYPE_SWPB;

	pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
		 EXTRACT_REG_NUM(instr, RN_OFFSET), address,
		 destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);

	/* Check access in reasonable access range for both SWP and SWPB */
	if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) {
		pr_debug("SWP{B} emulation: access to %p not allowed!\n",
			 (void *)address);
		res = -EFAULT;
	} else {
		res = emulate_swpX(address, &data, type);
	}

	if (res == 0) {
		/*
		 * On successful emulation, revert the adjustment to the PC
		 * made in kernel/traps.c in order to resume execution at the
		 * instruction following the SWP{B}.
		 */
		regs->ARM_pc += 4;
		regs->uregs[destreg] = data;
	} else if (res == -EFAULT) {
		/*
		 * Memory errors do not mean emulation failed.
		 * Set up signal info to return SEGV, then return OK
		 */
		set_segfault(regs, address);
	}

	return 0;
}

/*
 * Only emulate SWP/SWPB executed in ARM state/User mode.
 * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
 */
static struct undef_hook swp_hook = {
	.instr_mask = 0x0fb00ff0,
	.instr_val  = 0x01000090,
	.cpsr_mask  = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
	.cpsr_val   = USR_MODE,
	.fn	    = swp_handler
};

/*
 * Register handler and create status file in /proc/cpu
 * Invoked as late_initcall, since not needed before init spawned.
 */
static int __init swp_emulation_init(void)
{
	if (cpu_architecture() < CPU_ARCH_ARMv7)
		return 0;

#ifdef CONFIG_PROC_FS
	if (!proc_create("cpu/swp_emulation", S_IRUGO, NULL, &proc_status_fops))
		return -ENOMEM;
#endif /* CONFIG_PROC_FS */

	printk(KERN_NOTICE "Registering SWP/SWPB emulation handler\n");
	register_undef_hook(&swp_hook);

	return 0;
}

late_initcall(swp_emulation_init);
Commit	Line	Data
64d2dc38 LL	1	/*
	2	* linux/arch/arm/kernel/swp_emulate.c
	3	*
	4	* Copyright (C) 2009 ARM Limited
	5	* __user_* functions adapted from include/asm/uaccess.h
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* Implements emulation of the SWP/SWPB instructions using load-exclusive and
	12	* store-exclusive for processors that have them disabled (or future ones that
	13	* might not implement them).
	14	*
	15	* Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
	16	* Where: Rt = destination
	17	* Rt2 = source
	18	* Rn = address
	19	*/
	20
	21	#include <linux/init.h>
	22	#include <linux/kernel.h>
	23	#include <linux/proc_fs.h>
526c5978	24	#include <linux/seq_file.h>
64d2dc38 LL	25	#include <linux/sched.h>
	26	#include <linux/syscalls.h>
	27	#include <linux/perf_event.h>
	28
c245dcd3	29	#include <asm/opcodes.h>
7397aa48	30	#include <asm/system_info.h>
64d2dc38 LL	31	#include <asm/traps.h>
	32	#include <asm/uaccess.h>
	33
	34	/*
	35	* Error-checking SWP macros implemented using ldrex{b}/strex{b}
	36	*/
	37	#define __user_swpX_asm(data, addr, res, temp, B) \
	38	__asm__ __volatile__( \
	39	" mov %2, %1\n" \
	40	"0: ldrex"B" %1, [%3]\n" \
	41	"1: strex"B" %0, %2, [%3]\n" \
	42	" cmp %0, #0\n" \
	43	" movne %0, %4\n" \
	44	"2:\n" \
	45	" .section .fixup,\"ax\"\n" \
	46	" .align 2\n" \
	47	"3: mov %0, %5\n" \
	48	" b 2b\n" \
	49	" .previous\n" \
	50	" .section __ex_table,\"a\"\n" \
	51	" .align 3\n" \
	52	" .long 0b, 3b\n" \
	53	" .long 1b, 3b\n" \
	54	" .previous" \
	55	: "=&r" (res), "+r" (data), "=&r" (temp) \
	56	: "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \
	57	: "cc", "memory")
	58
	59	#define __user_swp_asm(data, addr, res, temp) \
	60	__user_swpX_asm(data, addr, res, temp, "")
	61	#define __user_swpb_asm(data, addr, res, temp) \
	62	__user_swpX_asm(data, addr, res, temp, "b")
	63
	64	/*
	65	* Macros/defines for extracting register numbers from instruction.
	66	*/
	67	#define EXTRACT_REG_NUM(instruction, offset) \
	68	(((instruction) & (0xf << (offset))) >> (offset))
	69	#define RN_OFFSET 16
	70	#define RT_OFFSET 12
	71	#define RT2_OFFSET 0
	72	/*
	73	* Bit 22 of the instruction encoding distinguishes between
	74	* the SWP and SWPB variants (bit set means SWPB).
	75	*/
	76	#define TYPE_SWPB (1 << 22)
	77
	78	static unsigned long swpcounter;
	79	static unsigned long swpbcounter;
	80	static unsigned long abtcounter;
	81	static pid_t previous_pid;
	82
	83	#ifdef CONFIG_PROC_FS
526c5978	84	static int proc_status_show(struct seq_file m, void v)
64d2dc38	85	{
526c5978 DH	86	seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
	87	seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
	88	seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
64d2dc38	89	if (previous_pid != 0)
526c5978 DH	90	seq_printf(m, "Last process:\t\t%d\n", previous_pid);
	91	return 0;
	92	}
64d2dc38	93
526c5978 DH	94	static int proc_status_open(struct inode inode, struct file file)
	95	{
	96	return single_open(file, proc_status_show, PDE_DATA(inode));
64d2dc38	97	}
526c5978 DH	98
	99	static const struct file_operations proc_status_fops = {
	100	.open = proc_status_open,
	101	.read = seq_read,
	102	.llseek = seq_lseek,
b11ac20e	103	.release = single_release,
526c5978	104	};
64d2dc38 LL	105	#endif
	106
	107	/*
	108	* Set up process info to signal segmentation fault - called on access error.
	109	*/
	110	static void set_segfault(struct pt_regs *regs, unsigned long addr)
	111	{
	112	siginfo_t info;
	113
7bf9b7be	114	down_read(&current->mm->mmap_sem);
64d2dc38 LL	115	if (find_vma(current->mm, addr) == NULL)
	116	info.si_code = SEGV_MAPERR;
	117	else
	118	info.si_code = SEGV_ACCERR;
7bf9b7be	119	up_read(&current->mm->mmap_sem);
64d2dc38 LL	120
	121	info.si_signo = SIGSEGV;
	122	info.si_errno = 0;
	123	info.si_addr = (void *) instruction_pointer(regs);
	124
	125	pr_debug("SWP{B} emulation: access caused memory abort!\n");
	126	arm_notify_die("Illegal memory access", regs, &info, 0, 0);
	127
	128	abtcounter++;
	129	}
	130
	131	static int emulate_swpX(unsigned int address, unsigned int *data,
	132	unsigned int type)
	133	{
	134	unsigned int res = 0;
	135
	136	if ((type != TYPE_SWPB) && (address & 0x3)) {
	137	/* SWP to unaligned address not permitted */
	138	pr_debug("SWP instruction on unaligned pointer!\n");
	139	return -EFAULT;
	140	}
	141
	142	while (1) {
	143	unsigned long temp;
	144
	145	/*
	146	* Barrier required between accessing protected resource and
	147	* releasing a lock for it. Legacy code might not have done
	148	* this, and we cannot determine that this is not the case
	149	* being emulated, so insert always.
	150	*/
	151	smp_mb();
	152
	153	if (type == TYPE_SWPB)
	154	__user_swpb_asm(*data, address, res, temp);
	155	else
	156	__user_swp_asm(*data, address, res, temp);
	157
	158	if (likely(res != -EAGAIN) \|\| signal_pending(current))
	159	break;
	160
	161	cond_resched();
	162	}
	163
	164	if (res == 0) {
	165	/*
25985edc	166	* Barrier also required between acquiring a lock for a
64d2dc38 LL	167	* protected resource and accessing the resource. Inserted for
	168	* same reason as above.
	169	*/
	170	smp_mb();
	171
	172	if (type == TYPE_SWPB)
	173	swpbcounter++;
	174	else
	175	swpcounter++;
	176	}
	177
	178	return res;
	179	}
	180
	181	/*
	182	* swp_handler logs the id of calling process, dissects the instruction, sanity
	183	* checks the memory location, calls emulate_swpX for the actual operation and
	184	* deals with fixup/error handling before returning
	185	*/
	186	static int swp_handler(struct pt_regs *regs, unsigned int instr)
	187	{
	188	unsigned int address, destreg, data, type;
	189	unsigned int res = 0;
	190
a8b0ca17	191	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
64d2dc38	192
c245dcd3 LL	193	res = arm_check_condition(instr, regs->ARM_cpsr);
	194	switch (res) {
	195	case ARM_OPCODE_CONDTEST_PASS:
	196	break;
	197	case ARM_OPCODE_CONDTEST_FAIL:
	198	/* Condition failed - return to next instruction */
	199	regs->ARM_pc += 4;
	200	return 0;
	201	case ARM_OPCODE_CONDTEST_UNCOND:
	202	/* If unconditional encoding - not a SWP, undef */
	203	return -EFAULT;
	204	default:
	205	return -EINVAL;
	206	}
	207
64d2dc38 LL	208	if (current->pid != previous_pid) {
	209	pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
	210	current->comm, (unsigned long)current->pid);
	211	previous_pid = current->pid;
	212	}
	213
	214	address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
	215	data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
	216	destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
	217
	218	type = instr & TYPE_SWPB;
	219
	220	pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
	221	EXTRACT_REG_NUM(instr, RN_OFFSET), address,
	222	destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
	223
	224	/* Check access in reasonable access range for both SWP and SWPB */
	225	if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) {
	226	pr_debug("SWP{B} emulation: access to %p not allowed!\n",
	227	(void *)address);
	228	res = -EFAULT;
	229	} else {
	230	res = emulate_swpX(address, &data, type);
	231	}
	232
	233	if (res == 0) {
	234	/*
	235	* On successful emulation, revert the adjustment to the PC
	236	* made in kernel/traps.c in order to resume execution at the
	237	* instruction following the SWP{B}.
	238	*/
	239	regs->ARM_pc += 4;
	240	regs->uregs[destreg] = data;
	241	} else if (res == -EFAULT) {
	242	/*
	243	* Memory errors do not mean emulation failed.
	244	* Set up signal info to return SEGV, then return OK
	245	*/
	246	set_segfault(regs, address);
	247	}
	248
	249	return 0;
	250	}
	251
	252	/*
	253	* Only emulate SWP/SWPB executed in ARM state/User mode.
	254	* The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
	255	*/
	256	static struct undef_hook swp_hook = {
	257	.instr_mask = 0x0fb00ff0,
	258	.instr_val = 0x01000090,
	259	.cpsr_mask = MODE_MASK \| PSR_T_BIT \| PSR_J_BIT,
	260	.cpsr_val = USR_MODE,
	261	.fn = swp_handler
	262	};
	263
	264	/*
	265	* Register handler and create status file in /proc/cpu
	266	* Invoked as late_initcall, since not needed before init spawned.
	267	*/
	268	static int __init swp_emulation_init(void)
	269	{
7397aa48 RK	270	if (cpu_architecture() < CPU_ARCH_ARMv7)
	271	return 0;
	272
64d2dc38	273	#ifdef CONFIG_PROC_FS
526c5978	274	if (!proc_create("cpu/swp_emulation", S_IRUGO, NULL, &proc_status_fops))
64d2dc38	275	return -ENOMEM;
64d2dc38 LL	276	#endif /* CONFIG_PROC_FS */
	277
	278	printk(KERN_NOTICE "Registering SWP/SWPB emulation handler\n");
	279	register_undef_hook(&swp_hook);
	280
	281	return 0;
	282	}
	283
	284	late_initcall(swp_emulation_init);