Commit | Line | Data |
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1da177e4 LT |
1 | /* ld script to make ARM Linux kernel |
2 | * taken from the i386 version by Russell King | |
3 | * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> | |
4 | */ | |
5 | ||
6 | #include <asm-generic/vmlinux.lds.h> | |
4f7a1812 | 7 | #include <asm/thread_info.h> |
37d07b72 | 8 | #include <asm/memory.h> |
1da177e4 LT |
9 | |
10 | OUTPUT_ARCH(arm) | |
11 | ENTRY(stext) | |
37d07b72 | 12 | |
1da177e4 LT |
13 | #ifndef __ARMEB__ |
14 | jiffies = jiffies_64; | |
15 | #else | |
16 | jiffies = jiffies_64 + 4; | |
17 | #endif | |
37d07b72 | 18 | |
9d4f13e5 RK |
19 | SECTIONS |
20 | { | |
37d07b72 | 21 | #ifdef CONFIG_XIP_KERNEL |
9d4f13e5 | 22 | . = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR); |
37d07b72 | 23 | #else |
9d4f13e5 | 24 | . = PAGE_OFFSET + TEXT_OFFSET; |
37d07b72 | 25 | #endif |
08fdffd4 | 26 | .text.head : { |
1da177e4 | 27 | _stext = .; |
08fdffd4 RK |
28 | _sinittext = .; |
29 | *(.text.head) | |
30 | } | |
31 | ||
32 | .init : { /* Init code and data */ | |
01ba2bdc | 33 | INIT_TEXT |
08fdffd4 | 34 | _einittext = .; |
1da177e4 | 35 | __proc_info_begin = .; |
02b7dd12 | 36 | *(.proc.info.init) |
1da177e4 LT |
37 | __proc_info_end = .; |
38 | __arch_info_begin = .; | |
9d0fd1eb | 39 | *(.arch.info.init) |
1da177e4 LT |
40 | __arch_info_end = .; |
41 | __tagtable_begin = .; | |
9506057f | 42 | *(.taglist.init) |
1da177e4 LT |
43 | __tagtable_end = .; |
44 | . = ALIGN(16); | |
45 | __setup_start = .; | |
46 | *(.init.setup) | |
47 | __setup_end = .; | |
48 | __early_begin = .; | |
bfe6815e | 49 | *(.early_param.init) |
1da177e4 LT |
50 | __early_end = .; |
51 | __initcall_start = .; | |
61ce1efe | 52 | INITCALLS |
1da177e4 LT |
53 | __initcall_end = .; |
54 | __con_initcall_start = .; | |
55 | *(.con_initcall.init) | |
56 | __con_initcall_end = .; | |
57 | __security_initcall_start = .; | |
58 | *(.security_initcall.init) | |
59 | __security_initcall_end = .; | |
67d38229 | 60 | #ifdef CONFIG_BLK_DEV_INITRD |
1da177e4 LT |
61 | . = ALIGN(32); |
62 | __initramfs_start = .; | |
63 | usr/built-in.o(.init.ramfs) | |
64 | __initramfs_end = .; | |
67d38229 | 65 | #endif |
b6e3590f | 66 | . = ALIGN(4096); |
19390c4d | 67 | __per_cpu_load = .; |
1da177e4 | 68 | __per_cpu_start = .; |
74e79045 | 69 | *(.data.percpu.page_aligned) |
1da177e4 | 70 | *(.data.percpu) |
5fb7dc37 | 71 | *(.data.percpu.shared_aligned) |
1da177e4 LT |
72 | __per_cpu_end = .; |
73 | #ifndef CONFIG_XIP_KERNEL | |
74 | __init_begin = _stext; | |
01ba2bdc | 75 | INIT_DATA |
1da177e4 LT |
76 | . = ALIGN(4096); |
77 | __init_end = .; | |
78 | #endif | |
79 | } | |
80 | ||
81 | /DISCARD/ : { /* Exit code and data */ | |
01ba2bdc SR |
82 | EXIT_TEXT |
83 | EXIT_DATA | |
1da177e4 | 84 | *(.exitcall.exit) |
bff595c1 CM |
85 | *(.ARM.exidx.exit.text) |
86 | *(.ARM.extab.exit.text) | |
9641c7cc RK |
87 | #ifndef CONFIG_MMU |
88 | *(.fixup) | |
89 | *(__ex_table) | |
90 | #endif | |
1da177e4 LT |
91 | } |
92 | ||
93 | .text : { /* Real text segment */ | |
94 | _text = .; /* Text and read-only data */ | |
7ab3f8d5 RK |
95 | __exception_text_start = .; |
96 | *(.exception.text) | |
97 | __exception_text_end = .; | |
7664709b | 98 | TEXT_TEXT |
1da177e4 LT |
99 | SCHED_TEXT |
100 | LOCK_TEXT | |
785d3cd2 | 101 | KPROBES_TEXT |
9641c7cc | 102 | #ifdef CONFIG_MMU |
1da177e4 | 103 | *(.fixup) |
9641c7cc | 104 | #endif |
1da177e4 LT |
105 | *(.gnu.warning) |
106 | *(.rodata) | |
107 | *(.rodata.*) | |
108 | *(.glue_7) | |
109 | *(.glue_7t) | |
110 | *(.got) /* Global offset table */ | |
111 | } | |
112 | ||
1da177e4 LT |
113 | RODATA |
114 | ||
115 | _etext = .; /* End of text and rodata section */ | |
116 | ||
bff595c1 CM |
117 | #ifdef CONFIG_ARM_UNWIND |
118 | /* | |
119 | * Stack unwinding tables | |
120 | */ | |
121 | . = ALIGN(8); | |
122 | .ARM.unwind_idx : { | |
123 | __start_unwind_idx = .; | |
124 | *(.ARM.exidx*) | |
125 | __stop_unwind_idx = .; | |
126 | } | |
127 | .ARM.unwind_tab : { | |
128 | __start_unwind_tab = .; | |
129 | *(.ARM.extab*) | |
130 | __stop_unwind_tab = .; | |
131 | } | |
132 | #endif | |
133 | ||
1da177e4 LT |
134 | #ifdef CONFIG_XIP_KERNEL |
135 | __data_loc = ALIGN(4); /* location in binary */ | |
9d4f13e5 | 136 | . = PAGE_OFFSET + TEXT_OFFSET; |
1da177e4 | 137 | #else |
4f7a1812 | 138 | . = ALIGN(THREAD_SIZE); |
1da177e4 LT |
139 | __data_loc = .; |
140 | #endif | |
141 | ||
142 | .data : AT(__data_loc) { | |
37efe642 | 143 | _data = .; /* address in memory */ |
1da177e4 LT |
144 | |
145 | /* | |
146 | * first, the init task union, aligned | |
147 | * to an 8192 byte boundary. | |
148 | */ | |
4efb4482 | 149 | *(.data.init_task) |
1da177e4 LT |
150 | |
151 | #ifdef CONFIG_XIP_KERNEL | |
152 | . = ALIGN(4096); | |
153 | __init_begin = .; | |
01ba2bdc | 154 | INIT_DATA |
1da177e4 LT |
155 | . = ALIGN(4096); |
156 | __init_end = .; | |
157 | #endif | |
158 | ||
159 | . = ALIGN(4096); | |
160 | __nosave_begin = .; | |
161 | *(.data.nosave) | |
162 | . = ALIGN(4096); | |
163 | __nosave_end = .; | |
164 | ||
165 | /* | |
166 | * then the cacheline aligned data | |
167 | */ | |
168 | . = ALIGN(32); | |
169 | *(.data.cacheline_aligned) | |
170 | ||
13b1f64c NP |
171 | /* |
172 | * The exception fixup table (might need resorting at runtime) | |
173 | */ | |
174 | . = ALIGN(32); | |
175 | __start___ex_table = .; | |
9641c7cc | 176 | #ifdef CONFIG_MMU |
13b1f64c | 177 | *(__ex_table) |
9641c7cc | 178 | #endif |
13b1f64c NP |
179 | __stop___ex_table = .; |
180 | ||
1da177e4 LT |
181 | /* |
182 | * and the usual data section | |
183 | */ | |
ca967258 | 184 | DATA_DATA |
1da177e4 LT |
185 | CONSTRUCTORS |
186 | ||
187 | _edata = .; | |
188 | } | |
e98ff7f6 | 189 | _edata_loc = __data_loc + SIZEOF(.data); |
1da177e4 LT |
190 | |
191 | .bss : { | |
192 | __bss_start = .; /* BSS */ | |
193 | *(.bss) | |
194 | *(COMMON) | |
195 | _end = .; | |
196 | } | |
197 | /* Stabs debugging sections. */ | |
198 | .stab 0 : { *(.stab) } | |
199 | .stabstr 0 : { *(.stabstr) } | |
200 | .stab.excl 0 : { *(.stab.excl) } | |
201 | .stab.exclstr 0 : { *(.stab.exclstr) } | |
202 | .stab.index 0 : { *(.stab.index) } | |
203 | .stab.indexstr 0 : { *(.stab.indexstr) } | |
204 | .comment 0 : { *(.comment) } | |
205 | } | |
206 | ||
728f5c07 RK |
207 | /* |
208 | * These must never be empty | |
209 | * If you have to comment these two assert statements out, your | |
210 | * binutils is too old (for other reasons as well) | |
211 | */ | |
1da177e4 LT |
212 | ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support") |
213 | ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined") |