[deliverable/linux.git] / arch / arm / kvm / psci.c

/*
 * Copyright (C) 2012 - ARM Ltd
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/kvm_host.h>
#include <linux/wait.h>

#include <asm/cputype.h>
#include <asm/kvm_emulate.h>
#include <asm/kvm_psci.h>

/*
 * This is an implementation of the Power State Coordination Interface
 * as described in ARM document number ARM DEN 0022A.
 */

#define AFFINITY_MASK(level)	~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)

static unsigned long psci_affinity_mask(unsigned long affinity_level)
{
	if (affinity_level <= 3)
		return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);

	return 0;
}

static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
{
	/*
	 * NOTE: For simplicity, we make VCPU suspend emulation to be
	 * same-as WFI (Wait-for-interrupt) emulation.
	 *
	 * This means for KVM the wakeup events are interrupts and
	 * this is consistent with intended use of StateID as described
	 * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
	 *
	 * Further, we also treat power-down request to be same as
	 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
	 * specification (ARM DEN 0022A). This means all suspend states
	 * for KVM will preserve the register state.
	 */
	kvm_vcpu_block(vcpu);

	return PSCI_RET_SUCCESS;
}

static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
{
	vcpu->arch.pause = true;
}

static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
{
	struct kvm *kvm = source_vcpu->kvm;
	struct kvm_vcpu *vcpu = NULL, *tmp;
	wait_queue_head_t *wq;
	unsigned long cpu_id;
	unsigned long context_id;
	unsigned long mpidr;
	phys_addr_t target_pc;
	int i;

	cpu_id = *vcpu_reg(source_vcpu, 1);
	if (vcpu_mode_is_32bit(source_vcpu))
		cpu_id &= ~((u32) 0);

	kvm_for_each_vcpu(i, tmp, kvm) {
		mpidr = kvm_vcpu_get_mpidr(tmp);
		if ((mpidr & MPIDR_HWID_BITMASK) == (cpu_id & MPIDR_HWID_BITMASK)) {
			vcpu = tmp;
			break;
		}
	}

	/*
	 * Make sure the caller requested a valid CPU and that the CPU is
	 * turned off.
	 */
	if (!vcpu)
		return PSCI_RET_INVALID_PARAMS;
	if (!vcpu->arch.pause) {
		if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
			return PSCI_RET_ALREADY_ON;
		else
			return PSCI_RET_INVALID_PARAMS;
	}

	target_pc = *vcpu_reg(source_vcpu, 2);
	context_id = *vcpu_reg(source_vcpu, 3);

	kvm_reset_vcpu(vcpu);

	/* Gracefully handle Thumb2 entry point */
	if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
		target_pc &= ~((phys_addr_t) 1);
		vcpu_set_thumb(vcpu);
	}

	/* Propagate caller endianness */
	if (kvm_vcpu_is_be(source_vcpu))
		kvm_vcpu_set_be(vcpu);

	*vcpu_pc(vcpu) = target_pc;
	/*
	 * NOTE: We always update r0 (or x0) because for PSCI v0.1
	 * the general puspose registers are undefined upon CPU_ON.
	 */
	*vcpu_reg(vcpu, 0) = context_id;
	vcpu->arch.pause = false;
	smp_mb();		/* Make sure the above is visible */

	wq = kvm_arch_vcpu_wq(vcpu);
	wake_up_interruptible(wq);

	return PSCI_RET_SUCCESS;
}

static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
{
	int i;
	unsigned long mpidr;
	unsigned long target_affinity;
	unsigned long target_affinity_mask;
	unsigned long lowest_affinity_level;
	struct kvm *kvm = vcpu->kvm;
	struct kvm_vcpu *tmp;

	target_affinity = *vcpu_reg(vcpu, 1);
	lowest_affinity_level = *vcpu_reg(vcpu, 2);

	/* Determine target affinity mask */
	target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
	if (!target_affinity_mask)
		return PSCI_RET_INVALID_PARAMS;

	/* Ignore other bits of target affinity */
	target_affinity &= target_affinity_mask;

	/*
	 * If one or more VCPU matching target affinity are running
	 * then ON else OFF
	 */
	kvm_for_each_vcpu(i, tmp, kvm) {
		mpidr = kvm_vcpu_get_mpidr(tmp);
		if (((mpidr & target_affinity_mask) == target_affinity) &&
		    !tmp->arch.pause) {
			return PSCI_0_2_AFFINITY_LEVEL_ON;
		}
	}

	return PSCI_0_2_AFFINITY_LEVEL_OFF;
}

static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
{
	memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
	vcpu->run->system_event.type = type;
	vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
}

static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
{
	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
}

static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
{
	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
}

int kvm_psci_version(struct kvm_vcpu *vcpu)
{
	if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
		return KVM_ARM_PSCI_0_2;

	return KVM_ARM_PSCI_0_1;
}

static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
{
	int ret = 1;
	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	unsigned long val;

	switch (psci_fn) {
	case PSCI_0_2_FN_PSCI_VERSION:
		/*
		 * Bits[31:16] = Major Version = 0
		 * Bits[15:0] = Minor Version = 2
		 */
		val = 2;
		break;
	case PSCI_0_2_FN_CPU_SUSPEND:
	case PSCI_0_2_FN64_CPU_SUSPEND:
		val = kvm_psci_vcpu_suspend(vcpu);
		break;
	case PSCI_0_2_FN_CPU_OFF:
		kvm_psci_vcpu_off(vcpu);
		val = PSCI_RET_SUCCESS;
		break;
	case PSCI_0_2_FN_CPU_ON:
	case PSCI_0_2_FN64_CPU_ON:
		val = kvm_psci_vcpu_on(vcpu);
		break;
	case PSCI_0_2_FN_AFFINITY_INFO:
	case PSCI_0_2_FN64_AFFINITY_INFO:
		val = kvm_psci_vcpu_affinity_info(vcpu);
		break;
	case PSCI_0_2_FN_MIGRATE:
	case PSCI_0_2_FN64_MIGRATE:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
		/*
		 * Trusted OS is MP hence does not require migration
	         * or
		 * Trusted OS is not present
		 */
		val = PSCI_0_2_TOS_MP;
		break;
	case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
	case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	case PSCI_0_2_FN_SYSTEM_OFF:
		kvm_psci_system_off(vcpu);
		/*
		 * We should'nt be going back to guest VCPU after
		 * receiving SYSTEM_OFF request.
		 *
		 * If user space accidently/deliberately resumes
		 * guest VCPU after SYSTEM_OFF request then guest
		 * VCPU should see internal failure from PSCI return
		 * value. To achieve this, we preload r0 (or x0) with
		 * PSCI return value INTERNAL_FAILURE.
		 */
		val = PSCI_RET_INTERNAL_FAILURE;
		ret = 0;
		break;
	case PSCI_0_2_FN_SYSTEM_RESET:
		kvm_psci_system_reset(vcpu);
		/*
		 * Same reason as SYSTEM_OFF for preloading r0 (or x0)
		 * with PSCI return value INTERNAL_FAILURE.
		 */
		val = PSCI_RET_INTERNAL_FAILURE;
		ret = 0;
		break;
	default:
		return -EINVAL;
	}

	*vcpu_reg(vcpu, 0) = val;
	return ret;
}

static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
{
	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	unsigned long val;

	switch (psci_fn) {
	case KVM_PSCI_FN_CPU_OFF:
		kvm_psci_vcpu_off(vcpu);
		val = PSCI_RET_SUCCESS;
		break;
	case KVM_PSCI_FN_CPU_ON:
		val = kvm_psci_vcpu_on(vcpu);
		break;
	case KVM_PSCI_FN_CPU_SUSPEND:
	case KVM_PSCI_FN_MIGRATE:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	default:
		return -EINVAL;
	}

	*vcpu_reg(vcpu, 0) = val;
	return 1;
}

/**
 * kvm_psci_call - handle PSCI call if r0 value is in range
 * @vcpu: Pointer to the VCPU struct
 *
 * Handle PSCI calls from guests through traps from HVC instructions.
 * The calling convention is similar to SMC calls to the secure world
 * where the function number is placed in r0.
 *
 * This function returns: > 0 (success), 0 (success but exit to user
 * space), and < 0 (errors)
 *
 * Errors:
 * -EINVAL: Unrecognized PSCI function
 */
int kvm_psci_call(struct kvm_vcpu *vcpu)
{
	switch (kvm_psci_version(vcpu)) {
	case KVM_ARM_PSCI_0_2:
		return kvm_psci_0_2_call(vcpu);
	case KVM_ARM_PSCI_0_1:
		return kvm_psci_0_1_call(vcpu);
	default:
		return -EINVAL;
	};
}
Commit	Line	Data
aa024c2f MZ	1	/*
	2	* Copyright (C) 2012 - ARM Ltd
	3	* Author: Marc Zyngier <marc.zyngier@arm.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	16	*/
	17
	18	#include <linux/kvm_host.h>
	19	#include <linux/wait.h>
	20
79c64880	21	#include <asm/cputype.h>
aa024c2f MZ	22	#include <asm/kvm_emulate.h>
	23	#include <asm/kvm_psci.h>
	24
	25	/*
	26	* This is an implementation of the Power State Coordination Interface
	27	* as described in ARM document number ARM DEN 0022A.
	28	*/
	29
e6bc13c8 AP	30	#define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
	31
	32	static unsigned long psci_affinity_mask(unsigned long affinity_level)
	33	{
	34	if (affinity_level <= 3)
	35	return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
	36
	37	return 0;
	38	}
	39
b376d02b AP	40	static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
	41	{
	42	/*
	43	* NOTE: For simplicity, we make VCPU suspend emulation to be
	44	* same-as WFI (Wait-for-interrupt) emulation.
	45	*
	46	* This means for KVM the wakeup events are interrupts and
	47	* this is consistent with intended use of StateID as described
	48	* in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
	49	*
	50	* Further, we also treat power-down request to be same as
	51	* stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
	52	* specification (ARM DEN 0022A). This means all suspend states
	53	* for KVM will preserve the register state.
	54	*/
	55	kvm_vcpu_block(vcpu);
	56
	57	return PSCI_RET_SUCCESS;
	58	}
	59
aa024c2f MZ	60	static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
	61	{
	62	vcpu->arch.pause = true;
	63	}
	64
	65	static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
	66	{
	67	struct kvm *kvm = source_vcpu->kvm;
79c64880	68	struct kvm_vcpu vcpu = NULL, tmp;
aa024c2f MZ	69	wait_queue_head_t *wq;
aa024c2f MZ	70	unsigned long cpu_id;
aa8aeefe	71	unsigned long context_id;
79c64880	72	unsigned long mpidr;
aa024c2f	73	phys_addr_t target_pc;
79c64880	74	int i;
aa024c2f MZ	75
	76	cpu_id = *vcpu_reg(source_vcpu, 1);
	77	if (vcpu_mode_is_32bit(source_vcpu))
	78	cpu_id &= ~((u32) 0);
	79
79c64880 MZ	80	kvm_for_each_vcpu(i, tmp, kvm) {
	81	mpidr = kvm_vcpu_get_mpidr(tmp);
	82	if ((mpidr & MPIDR_HWID_BITMASK) == (cpu_id & MPIDR_HWID_BITMASK)) {
	83	vcpu = tmp;
	84	break;
	85	}
	86	}
	87
478a8237 CD	88	/*
	89	* Make sure the caller requested a valid CPU and that the CPU is
	90	* turned off.
	91	*/
aa8aeefe	92	if (!vcpu)
7d0f84aa	93	return PSCI_RET_INVALID_PARAMS;
aa8aeefe AP	94	if (!vcpu->arch.pause) {
	95	if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
	96	return PSCI_RET_ALREADY_ON;
	97	else
	98	return PSCI_RET_INVALID_PARAMS;
	99	}
aa024c2f MZ	100
aa024c2f MZ	101	target_pc = *vcpu_reg(source_vcpu, 2);
aa8aeefe	102	context_id = *vcpu_reg(source_vcpu, 3);
aa024c2f	103
aa024c2f MZ	104	kvm_reset_vcpu(vcpu);
	105
	106	/* Gracefully handle Thumb2 entry point */
	107	if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
	108	target_pc &= ~((phys_addr_t) 1);
	109	vcpu_set_thumb(vcpu);
	110	}
	111
ce94fe93 MZ	112	/* Propagate caller endianness */
	113	if (kvm_vcpu_is_be(source_vcpu))
	114	kvm_vcpu_set_be(vcpu);
	115
aa024c2f	116	*vcpu_pc(vcpu) = target_pc;
aa8aeefe AP	117	/*
	118	* NOTE: We always update r0 (or x0) because for PSCI v0.1
	119	* the general puspose registers are undefined upon CPU_ON.
	120	*/
	121	*vcpu_reg(vcpu, 0) = context_id;
aa024c2f MZ	122	vcpu->arch.pause = false;
	123	smp_mb(); /* Make sure the above is visible */
	124
478a8237	125	wq = kvm_arch_vcpu_wq(vcpu);
aa024c2f MZ	126	wake_up_interruptible(wq);
aa024c2f MZ	127
7d0f84aa	128	return PSCI_RET_SUCCESS;
aa024c2f MZ	129	}
aa024c2f MZ	130
e6bc13c8 AP	131	static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
	132	{
	133	int i;
	134	unsigned long mpidr;
	135	unsigned long target_affinity;
	136	unsigned long target_affinity_mask;
	137	unsigned long lowest_affinity_level;
	138	struct kvm *kvm = vcpu->kvm;
	139	struct kvm_vcpu *tmp;
	140
	141	target_affinity = *vcpu_reg(vcpu, 1);
	142	lowest_affinity_level = *vcpu_reg(vcpu, 2);
	143
	144	/* Determine target affinity mask */
	145	target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
	146	if (!target_affinity_mask)
	147	return PSCI_RET_INVALID_PARAMS;
	148
	149	/* Ignore other bits of target affinity */
	150	target_affinity &= target_affinity_mask;
	151
	152	/*
	153	* If one or more VCPU matching target affinity are running
	154	* then ON else OFF
	155	*/
	156	kvm_for_each_vcpu(i, tmp, kvm) {
	157	mpidr = kvm_vcpu_get_mpidr(tmp);
	158	if (((mpidr & target_affinity_mask) == target_affinity) &&
	159	!tmp->arch.pause) {
	160	return PSCI_0_2_AFFINITY_LEVEL_ON;
	161	}
	162	}
	163
	164	return PSCI_0_2_AFFINITY_LEVEL_OFF;
	165	}
	166
4b123826 AP	167	static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
	168	{
	169	memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
	170	vcpu->run->system_event.type = type;
	171	vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
	172	}
	173
	174	static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
	175	{
	176	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
	177	}
	178
	179	static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
	180	{
	181	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
	182	}
	183
7d0f84aa AP	184	int kvm_psci_version(struct kvm_vcpu *vcpu)
	185	{
	186	if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
	187	return KVM_ARM_PSCI_0_2;
	188
	189	return KVM_ARM_PSCI_0_1;
	190	}
	191
e8e7fcc5	192	static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
7d0f84aa	193	{
4b123826	194	int ret = 1;
7d0f84aa AP	195	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	196	unsigned long val;
	197
	198	switch (psci_fn) {
	199	case PSCI_0_2_FN_PSCI_VERSION:
	200	/*
	201	* Bits[31:16] = Major Version = 0
	202	* Bits[15:0] = Minor Version = 2
	203	*/
	204	val = 2;
	205	break;
b376d02b AP	206	case PSCI_0_2_FN_CPU_SUSPEND:
	207	case PSCI_0_2_FN64_CPU_SUSPEND:
	208	val = kvm_psci_vcpu_suspend(vcpu);
	209	break;
7d0f84aa AP	210	case PSCI_0_2_FN_CPU_OFF:
	211	kvm_psci_vcpu_off(vcpu);
	212	val = PSCI_RET_SUCCESS;
	213	break;
	214	case PSCI_0_2_FN_CPU_ON:
	215	case PSCI_0_2_FN64_CPU_ON:
	216	val = kvm_psci_vcpu_on(vcpu);
	217	break;
e6bc13c8 AP	218	case PSCI_0_2_FN_AFFINITY_INFO:
	219	case PSCI_0_2_FN64_AFFINITY_INFO:
	220	val = kvm_psci_vcpu_affinity_info(vcpu);
	221	break;
bab0b430 AP	222	case PSCI_0_2_FN_MIGRATE:
	223	case PSCI_0_2_FN64_MIGRATE:
	224	val = PSCI_RET_NOT_SUPPORTED;
	225	break;
	226	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
	227	/*
	228	* Trusted OS is MP hence does not require migration
	229	* or
	230	* Trusted OS is not present
	231	*/
	232	val = PSCI_0_2_TOS_MP;
	233	break;
	234	case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
	235	case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
	236	val = PSCI_RET_NOT_SUPPORTED;
	237	break;
4b123826 AP	238	case PSCI_0_2_FN_SYSTEM_OFF:
	239	kvm_psci_system_off(vcpu);
	240	/*
	241	* We should'nt be going back to guest VCPU after
	242	* receiving SYSTEM_OFF request.
	243	*
	244	* If user space accidently/deliberately resumes
	245	* guest VCPU after SYSTEM_OFF request then guest
	246	* VCPU should see internal failure from PSCI return
	247	* value. To achieve this, we preload r0 (or x0) with
	248	* PSCI return value INTERNAL_FAILURE.
	249	*/
	250	val = PSCI_RET_INTERNAL_FAILURE;
	251	ret = 0;
	252	break;
	253	case PSCI_0_2_FN_SYSTEM_RESET:
	254	kvm_psci_system_reset(vcpu);
	255	/*
	256	* Same reason as SYSTEM_OFF for preloading r0 (or x0)
	257	* with PSCI return value INTERNAL_FAILURE.
	258	*/
	259	val = PSCI_RET_INTERNAL_FAILURE;
	260	ret = 0;
	261	break;
7d0f84aa	262	default:
e8e7fcc5	263	return -EINVAL;
7d0f84aa AP	264	}
	265
	266	*vcpu_reg(vcpu, 0) = val;
4b123826	267	return ret;
7d0f84aa AP	268	}
7d0f84aa AP	269
e8e7fcc5	270	static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
aa024c2f MZ	271	{
	272	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	273	unsigned long val;
	274
	275	switch (psci_fn) {
	276	case KVM_PSCI_FN_CPU_OFF:
	277	kvm_psci_vcpu_off(vcpu);
7d0f84aa	278	val = PSCI_RET_SUCCESS;
aa024c2f MZ	279	break;
	280	case KVM_PSCI_FN_CPU_ON:
	281	val = kvm_psci_vcpu_on(vcpu);
	282	break;
	283	case KVM_PSCI_FN_CPU_SUSPEND:
	284	case KVM_PSCI_FN_MIGRATE:
7d0f84aa	285	val = PSCI_RET_NOT_SUPPORTED;
aa024c2f	286	break;
aa024c2f	287	default:
e8e7fcc5	288	return -EINVAL;
aa024c2f MZ	289	}
	290
	291	*vcpu_reg(vcpu, 0) = val;
e8e7fcc5	292	return 1;
aa024c2f	293	}
7d0f84aa AP	294
	295	/**
	296	* kvm_psci_call - handle PSCI call if r0 value is in range
	297	* @vcpu: Pointer to the VCPU struct
	298	*
	299	* Handle PSCI calls from guests through traps from HVC instructions.
e8e7fcc5 AP	300	* The calling convention is similar to SMC calls to the secure world
	301	* where the function number is placed in r0.
	302	*
	303	* This function returns: > 0 (success), 0 (success but exit to user
	304	* space), and < 0 (errors)
	305	*
	306	* Errors:
	307	* -EINVAL: Unrecognized PSCI function
7d0f84aa	308	*/
e8e7fcc5	309	int kvm_psci_call(struct kvm_vcpu *vcpu)
7d0f84aa AP	310	{
	311	switch (kvm_psci_version(vcpu)) {
	312	case KVM_ARM_PSCI_0_2:
	313	return kvm_psci_0_2_call(vcpu);
	314	case KVM_ARM_PSCI_0_1:
	315	return kvm_psci_0_1_call(vcpu);
	316	default:
e8e7fcc5	317	return -EINVAL;
7d0f84aa AP	318	};
7d0f84aa AP	319	}