[deliverable/linux.git] / arch / arm / kvm / psci.c

/*
 * Copyright (C) 2012 - ARM Ltd
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/kvm_host.h>
#include <linux/wait.h>

#include <asm/cputype.h>
#include <asm/kvm_emulate.h>
#include <asm/kvm_psci.h>

/*
 * This is an implementation of the Power State Coordination Interface
 * as described in ARM document number ARM DEN 0022A.
 */

static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
{
	vcpu->arch.pause = true;
}

static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
{
	struct kvm *kvm = source_vcpu->kvm;
	struct kvm_vcpu *vcpu = NULL, *tmp;
	wait_queue_head_t *wq;
	unsigned long cpu_id;
	unsigned long mpidr;
	phys_addr_t target_pc;
	int i;

	cpu_id = *vcpu_reg(source_vcpu, 1);
	if (vcpu_mode_is_32bit(source_vcpu))
		cpu_id &= ~((u32) 0);

	kvm_for_each_vcpu(i, tmp, kvm) {
		mpidr = kvm_vcpu_get_mpidr(tmp);
		if ((mpidr & MPIDR_HWID_BITMASK) == (cpu_id & MPIDR_HWID_BITMASK)) {
			vcpu = tmp;
			break;
		}
	}

	/*
	 * Make sure the caller requested a valid CPU and that the CPU is
	 * turned off.
	 */
	if (!vcpu || !vcpu->arch.pause)
		return PSCI_RET_INVALID_PARAMS;

	target_pc = *vcpu_reg(source_vcpu, 2);

	kvm_reset_vcpu(vcpu);

	/* Gracefully handle Thumb2 entry point */
	if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
		target_pc &= ~((phys_addr_t) 1);
		vcpu_set_thumb(vcpu);
	}

	/* Propagate caller endianness */
	if (kvm_vcpu_is_be(source_vcpu))
		kvm_vcpu_set_be(vcpu);

	*vcpu_pc(vcpu) = target_pc;
	vcpu->arch.pause = false;
	smp_mb();		/* Make sure the above is visible */

	wq = kvm_arch_vcpu_wq(vcpu);
	wake_up_interruptible(wq);

	return PSCI_RET_SUCCESS;
}

int kvm_psci_version(struct kvm_vcpu *vcpu)
{
	if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
		return KVM_ARM_PSCI_0_2;

	return KVM_ARM_PSCI_0_1;
}

static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
{
	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	unsigned long val;

	switch (psci_fn) {
	case PSCI_0_2_FN_PSCI_VERSION:
		/*
		 * Bits[31:16] = Major Version = 0
		 * Bits[15:0] = Minor Version = 2
		 */
		val = 2;
		break;
	case PSCI_0_2_FN_CPU_OFF:
		kvm_psci_vcpu_off(vcpu);
		val = PSCI_RET_SUCCESS;
		break;
	case PSCI_0_2_FN_CPU_ON:
	case PSCI_0_2_FN64_CPU_ON:
		val = kvm_psci_vcpu_on(vcpu);
		break;
	case PSCI_0_2_FN_CPU_SUSPEND:
	case PSCI_0_2_FN_AFFINITY_INFO:
	case PSCI_0_2_FN_MIGRATE:
	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
	case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
	case PSCI_0_2_FN_SYSTEM_OFF:
	case PSCI_0_2_FN_SYSTEM_RESET:
	case PSCI_0_2_FN64_CPU_SUSPEND:
	case PSCI_0_2_FN64_AFFINITY_INFO:
	case PSCI_0_2_FN64_MIGRATE:
	case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	default:
		return -EINVAL;
	}

	*vcpu_reg(vcpu, 0) = val;
	return 1;
}

static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
{
	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	unsigned long val;

	switch (psci_fn) {
	case KVM_PSCI_FN_CPU_OFF:
		kvm_psci_vcpu_off(vcpu);
		val = PSCI_RET_SUCCESS;
		break;
	case KVM_PSCI_FN_CPU_ON:
		val = kvm_psci_vcpu_on(vcpu);
		break;
	case KVM_PSCI_FN_CPU_SUSPEND:
	case KVM_PSCI_FN_MIGRATE:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	default:
		return -EINVAL;
	}

	*vcpu_reg(vcpu, 0) = val;
	return 1;
}

/**
 * kvm_psci_call - handle PSCI call if r0 value is in range
 * @vcpu: Pointer to the VCPU struct
 *
 * Handle PSCI calls from guests through traps from HVC instructions.
 * The calling convention is similar to SMC calls to the secure world
 * where the function number is placed in r0.
 *
 * This function returns: > 0 (success), 0 (success but exit to user
 * space), and < 0 (errors)
 *
 * Errors:
 * -EINVAL: Unrecognized PSCI function
 */
int kvm_psci_call(struct kvm_vcpu *vcpu)
{
	switch (kvm_psci_version(vcpu)) {
	case KVM_ARM_PSCI_0_2:
		return kvm_psci_0_2_call(vcpu);
	case KVM_ARM_PSCI_0_1:
		return kvm_psci_0_1_call(vcpu);
	default:
		return -EINVAL;
	};
}
Commit	Line	Data
aa024c2f MZ	1	/*
	2	* Copyright (C) 2012 - ARM Ltd
	3	* Author: Marc Zyngier <marc.zyngier@arm.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	16	*/
	17
	18	#include <linux/kvm_host.h>
	19	#include <linux/wait.h>
	20
79c64880	21	#include <asm/cputype.h>
aa024c2f MZ	22	#include <asm/kvm_emulate.h>
	23	#include <asm/kvm_psci.h>
	24
	25	/*
	26	* This is an implementation of the Power State Coordination Interface
	27	* as described in ARM document number ARM DEN 0022A.
	28	*/
	29
	30	static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
	31	{
	32	vcpu->arch.pause = true;
	33	}
	34
	35	static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
	36	{
	37	struct kvm *kvm = source_vcpu->kvm;
79c64880	38	struct kvm_vcpu vcpu = NULL, tmp;
aa024c2f MZ	39	wait_queue_head_t *wq;
aa024c2f MZ	40	unsigned long cpu_id;
79c64880	41	unsigned long mpidr;
aa024c2f	42	phys_addr_t target_pc;
79c64880	43	int i;
aa024c2f MZ	44
	45	cpu_id = *vcpu_reg(source_vcpu, 1);
	46	if (vcpu_mode_is_32bit(source_vcpu))
	47	cpu_id &= ~((u32) 0);
	48
79c64880 MZ	49	kvm_for_each_vcpu(i, tmp, kvm) {
	50	mpidr = kvm_vcpu_get_mpidr(tmp);
	51	if ((mpidr & MPIDR_HWID_BITMASK) == (cpu_id & MPIDR_HWID_BITMASK)) {
	52	vcpu = tmp;
	53	break;
	54	}
	55	}
	56
478a8237 CD	57	/*
	58	* Make sure the caller requested a valid CPU and that the CPU is
	59	* turned off.
	60	*/
	61	if (!vcpu \|\| !vcpu->arch.pause)
7d0f84aa	62	return PSCI_RET_INVALID_PARAMS;
aa024c2f MZ	63
	64	target_pc = *vcpu_reg(source_vcpu, 2);
	65
aa024c2f MZ	66	kvm_reset_vcpu(vcpu);
	67
	68	/* Gracefully handle Thumb2 entry point */
	69	if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
	70	target_pc &= ~((phys_addr_t) 1);
	71	vcpu_set_thumb(vcpu);
	72	}
	73
ce94fe93 MZ	74	/* Propagate caller endianness */
	75	if (kvm_vcpu_is_be(source_vcpu))
	76	kvm_vcpu_set_be(vcpu);
	77
aa024c2f MZ	78	*vcpu_pc(vcpu) = target_pc;
	79	vcpu->arch.pause = false;
	80	smp_mb(); /* Make sure the above is visible */
	81
478a8237	82	wq = kvm_arch_vcpu_wq(vcpu);
aa024c2f MZ	83	wake_up_interruptible(wq);
aa024c2f MZ	84
7d0f84aa	85	return PSCI_RET_SUCCESS;
aa024c2f MZ	86	}
aa024c2f MZ	87
7d0f84aa AP	88	int kvm_psci_version(struct kvm_vcpu *vcpu)
	89	{
	90	if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
	91	return KVM_ARM_PSCI_0_2;
	92
	93	return KVM_ARM_PSCI_0_1;
	94	}
	95
e8e7fcc5	96	static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
7d0f84aa AP	97	{
	98	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	99	unsigned long val;
	100
	101	switch (psci_fn) {
	102	case PSCI_0_2_FN_PSCI_VERSION:
	103	/*
	104	* Bits[31:16] = Major Version = 0
	105	* Bits[15:0] = Minor Version = 2
	106	*/
	107	val = 2;
	108	break;
	109	case PSCI_0_2_FN_CPU_OFF:
	110	kvm_psci_vcpu_off(vcpu);
	111	val = PSCI_RET_SUCCESS;
	112	break;
	113	case PSCI_0_2_FN_CPU_ON:
	114	case PSCI_0_2_FN64_CPU_ON:
	115	val = kvm_psci_vcpu_on(vcpu);
	116	break;
	117	case PSCI_0_2_FN_CPU_SUSPEND:
	118	case PSCI_0_2_FN_AFFINITY_INFO:
	119	case PSCI_0_2_FN_MIGRATE:
	120	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
	121	case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
	122	case PSCI_0_2_FN_SYSTEM_OFF:
	123	case PSCI_0_2_FN_SYSTEM_RESET:
	124	case PSCI_0_2_FN64_CPU_SUSPEND:
	125	case PSCI_0_2_FN64_AFFINITY_INFO:
	126	case PSCI_0_2_FN64_MIGRATE:
	127	case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
	128	val = PSCI_RET_NOT_SUPPORTED;
	129	break;
	130	default:
e8e7fcc5	131	return -EINVAL;
7d0f84aa AP	132	}
	133
	134	*vcpu_reg(vcpu, 0) = val;
e8e7fcc5	135	return 1;
7d0f84aa AP	136	}
7d0f84aa AP	137
e8e7fcc5	138	static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
aa024c2f MZ	139	{
	140	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	141	unsigned long val;
	142
	143	switch (psci_fn) {
	144	case KVM_PSCI_FN_CPU_OFF:
	145	kvm_psci_vcpu_off(vcpu);
7d0f84aa	146	val = PSCI_RET_SUCCESS;
aa024c2f MZ	147	break;
	148	case KVM_PSCI_FN_CPU_ON:
	149	val = kvm_psci_vcpu_on(vcpu);
	150	break;
	151	case KVM_PSCI_FN_CPU_SUSPEND:
	152	case KVM_PSCI_FN_MIGRATE:
7d0f84aa	153	val = PSCI_RET_NOT_SUPPORTED;
aa024c2f	154	break;
aa024c2f	155	default:
e8e7fcc5	156	return -EINVAL;
aa024c2f MZ	157	}
	158
	159	*vcpu_reg(vcpu, 0) = val;
e8e7fcc5	160	return 1;
aa024c2f	161	}
7d0f84aa AP	162
	163	/**
	164	* kvm_psci_call - handle PSCI call if r0 value is in range
	165	* @vcpu: Pointer to the VCPU struct
	166	*
	167	* Handle PSCI calls from guests through traps from HVC instructions.
e8e7fcc5 AP	168	* The calling convention is similar to SMC calls to the secure world
	169	* where the function number is placed in r0.
	170	*
	171	* This function returns: > 0 (success), 0 (success but exit to user
	172	* space), and < 0 (errors)
	173	*
	174	* Errors:
	175	* -EINVAL: Unrecognized PSCI function
7d0f84aa	176	*/
e8e7fcc5	177	int kvm_psci_call(struct kvm_vcpu *vcpu)
7d0f84aa AP	178	{
	179	switch (kvm_psci_version(vcpu)) {
	180	case KVM_ARM_PSCI_0_2:
	181	return kvm_psci_0_2_call(vcpu);
	182	case KVM_ARM_PSCI_0_1:
	183	return kvm_psci_0_1_call(vcpu);
	184	default:
e8e7fcc5	185	return -EINVAL;
7d0f84aa AP	186	};
7d0f84aa AP	187	}