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038c5b60 BN |
1 | /* |
2 | * linux/arch/arm/mach-aaec2000/core.c | |
3 | * | |
4 | * Code common to all AAEC-2000 machines | |
5 | * | |
6 | * Copyright (c) 2005 Nicolas Bellido Y Ortega | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
038c5b60 BN |
12 | #include <linux/module.h> |
13 | #include <linux/kernel.h> | |
14 | #include <linux/init.h> | |
d052d1be | 15 | #include <linux/platform_device.h> |
038c5b60 BN |
16 | #include <linux/list.h> |
17 | #include <linux/errno.h> | |
049eb329 | 18 | #include <linux/dma-mapping.h> |
038c5b60 BN |
19 | #include <linux/interrupt.h> |
20 | #include <linux/timex.h> | |
21 | #include <linux/signal.h> | |
22 | ||
23 | #include <asm/hardware.h> | |
24 | #include <asm/irq.h> | |
049eb329 | 25 | #include <asm/sizes.h> |
038c5b60 | 26 | |
4a91ca2e | 27 | #include <asm/mach/flash.h> |
038c5b60 BN |
28 | #include <asm/mach/irq.h> |
29 | #include <asm/mach/time.h> | |
30 | #include <asm/mach/map.h> | |
31 | ||
049eb329 BN |
32 | #include "core.h" |
33 | #include "clock.h" | |
34 | ||
038c5b60 BN |
35 | /* |
36 | * Common I/O mapping: | |
37 | * | |
38 | * Static virtual address mappings are as follow: | |
39 | * | |
40 | * 0xf8000000-0xf8001ffff: Devices connected to APB bus | |
41 | * 0xf8002000-0xf8003ffff: Devices connected to AHB bus | |
42 | * | |
43 | * Below 0xe8000000 is reserved for vm allocation. | |
44 | * | |
45 | * The machine specific code must provide the extra mapping beside the | |
46 | * default mapping provided here. | |
47 | */ | |
48 | static struct map_desc standard_io_desc[] __initdata = { | |
f70cd656 DS |
49 | { |
50 | .virtual = VIO_APB_BASE, | |
16b6dd44 | 51 | .pfn = __phys_to_pfn(PIO_APB_BASE), |
f70cd656 DS |
52 | .length = IO_APB_LENGTH, |
53 | .type = MT_DEVICE | |
54 | }, { | |
55 | .virtual = VIO_AHB_BASE, | |
16b6dd44 | 56 | .pfn = __phys_to_pfn(PIO_AHB_BASE), |
f70cd656 DS |
57 | .length = IO_AHB_LENGTH, |
58 | .type = MT_DEVICE | |
59 | } | |
038c5b60 BN |
60 | }; |
61 | ||
62 | void __init aaec2000_map_io(void) | |
63 | { | |
64 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); | |
65 | } | |
66 | ||
67 | /* | |
68 | * Interrupt handling routines | |
69 | */ | |
70 | static void aaec2000_int_ack(unsigned int irq) | |
71 | { | |
72 | IRQ_INTSR = 1 << irq; | |
73 | } | |
74 | ||
75 | static void aaec2000_int_mask(unsigned int irq) | |
76 | { | |
77 | IRQ_INTENC |= (1 << irq); | |
78 | } | |
79 | ||
80 | static void aaec2000_int_unmask(unsigned int irq) | |
81 | { | |
82 | IRQ_INTENS |= (1 << irq); | |
83 | } | |
84 | ||
85 | static struct irqchip aaec2000_irq_chip = { | |
86 | .ack = aaec2000_int_ack, | |
87 | .mask = aaec2000_int_mask, | |
88 | .unmask = aaec2000_int_unmask, | |
89 | }; | |
90 | ||
91 | void __init aaec2000_init_irq(void) | |
92 | { | |
93 | unsigned int i; | |
94 | ||
95 | for (i = 0; i < NR_IRQS; i++) { | |
96 | set_irq_handler(i, do_level_IRQ); | |
97 | set_irq_chip(i, &aaec2000_irq_chip); | |
98 | set_irq_flags(i, IRQF_VALID); | |
99 | } | |
100 | ||
101 | /* Disable all interrupts */ | |
102 | IRQ_INTENC = 0xffffffff; | |
103 | ||
104 | /* Clear any pending interrupts */ | |
105 | IRQ_INTSR = IRQ_INTSR; | |
106 | } | |
107 | ||
108 | /* | |
109 | * Time keeping | |
110 | */ | |
111 | /* IRQs are disabled before entering here from do_gettimeofday() */ | |
112 | static unsigned long aaec2000_gettimeoffset(void) | |
113 | { | |
114 | unsigned long ticks_to_match, elapsed, usec; | |
115 | ||
116 | /* Get ticks before next timer match */ | |
117 | ticks_to_match = TIMER1_LOAD - TIMER1_VAL; | |
118 | ||
119 | /* We need elapsed ticks since last match */ | |
120 | elapsed = LATCH - ticks_to_match; | |
121 | ||
122 | /* Now, convert them to usec */ | |
123 | usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; | |
124 | ||
125 | return usec; | |
126 | } | |
127 | ||
128 | /* We enter here with IRQs enabled */ | |
129 | static irqreturn_t | |
0cd61b68 | 130 | aaec2000_timer_interrupt(int irq, void *dev_id) |
038c5b60 BN |
131 | { |
132 | /* TODO: Check timer accuracy */ | |
133 | write_seqlock(&xtime_lock); | |
134 | ||
0cd61b68 | 135 | timer_tick(); |
038c5b60 BN |
136 | TIMER1_CLEAR = 1; |
137 | ||
138 | write_sequnlock(&xtime_lock); | |
139 | ||
140 | return IRQ_HANDLED; | |
141 | } | |
142 | ||
143 | static struct irqaction aaec2000_timer_irq = { | |
144 | .name = "AAEC-2000 Timer Tick", | |
52e405ea | 145 | .flags = IRQF_DISABLED | IRQF_TIMER, |
09b8b5f8 | 146 | .handler = aaec2000_timer_interrupt, |
038c5b60 BN |
147 | }; |
148 | ||
149 | static void __init aaec2000_timer_init(void) | |
150 | { | |
151 | /* Disable timer 1 */ | |
152 | TIMER1_CTRL = 0; | |
153 | ||
154 | /* We have somehow to generate a 100Hz clock. | |
155 | * We then use the 508KHz timer in periodic mode. | |
156 | */ | |
157 | TIMER1_LOAD = LATCH; | |
158 | TIMER1_CLEAR = 1; /* Clear interrupt */ | |
159 | ||
160 | setup_irq(INT_TMR1_OFL, &aaec2000_timer_irq); | |
161 | ||
162 | TIMER1_CTRL = TIMER_CTRL_ENABLE | | |
163 | TIMER_CTRL_PERIODIC | | |
164 | TIMER_CTRL_CLKSEL_508K; | |
165 | } | |
166 | ||
167 | struct sys_timer aaec2000_timer = { | |
168 | .init = aaec2000_timer_init, | |
169 | .offset = aaec2000_gettimeoffset, | |
170 | }; | |
171 | ||
049eb329 BN |
172 | static struct clcd_panel mach_clcd_panel; |
173 | ||
174 | static int aaec2000_clcd_setup(struct clcd_fb *fb) | |
175 | { | |
176 | dma_addr_t dma; | |
177 | ||
178 | fb->panel = &mach_clcd_panel; | |
179 | ||
180 | fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M, | |
181 | &dma, GFP_KERNEL); | |
182 | ||
183 | if (!fb->fb.screen_base) { | |
184 | printk(KERN_ERR "CLCD: unable to map framebuffer\n"); | |
185 | return -ENOMEM; | |
186 | } | |
187 | ||
188 | fb->fb.fix.smem_start = dma; | |
189 | fb->fb.fix.smem_len = SZ_1M; | |
190 | ||
191 | return 0; | |
192 | } | |
193 | ||
194 | static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) | |
195 | { | |
196 | return dma_mmap_writecombine(&fb->dev->dev, vma, | |
197 | fb->fb.screen_base, | |
198 | fb->fb.fix.smem_start, | |
199 | fb->fb.fix.smem_len); | |
200 | } | |
201 | ||
202 | static void aaec2000_clcd_remove(struct clcd_fb *fb) | |
203 | { | |
204 | dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, | |
205 | fb->fb.screen_base, fb->fb.fix.smem_start); | |
206 | } | |
207 | ||
208 | static struct clcd_board clcd_plat_data = { | |
209 | .name = "AAEC-2000", | |
210 | .check = clcdfb_check, | |
211 | .decode = clcdfb_decode, | |
212 | .setup = aaec2000_clcd_setup, | |
213 | .mmap = aaec2000_clcd_mmap, | |
214 | .remove = aaec2000_clcd_remove, | |
215 | }; | |
216 | ||
217 | static struct amba_device clcd_device = { | |
218 | .dev = { | |
219 | .bus_id = "mb:16", | |
220 | .coherent_dma_mask = ~0, | |
221 | .platform_data = &clcd_plat_data, | |
222 | }, | |
223 | .res = { | |
224 | .start = AAEC_CLCD_PHYS, | |
225 | .end = AAEC_CLCD_PHYS + SZ_4K - 1, | |
226 | .flags = IORESOURCE_MEM, | |
227 | }, | |
228 | .irq = { INT_LCD, NO_IRQ }, | |
229 | .periphid = 0x41110, | |
230 | }; | |
231 | ||
232 | static struct amba_device *amba_devs[] __initdata = { | |
233 | &clcd_device, | |
234 | }; | |
235 | ||
236 | static struct clk aaec2000_clcd_clk = { | |
237 | .name = "CLCDCLK", | |
238 | }; | |
239 | ||
240 | void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd) | |
241 | { | |
242 | clcd_plat_data.enable = clcd->enable; | |
243 | clcd_plat_data.disable = clcd->disable; | |
244 | memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel)); | |
245 | } | |
246 | ||
4a91ca2e BN |
247 | static struct flash_platform_data aaec2000_flash_data = { |
248 | .map_name = "cfi_probe", | |
249 | .width = 4, | |
250 | }; | |
251 | ||
252 | static struct resource aaec2000_flash_resource = { | |
253 | .start = AAEC_FLASH_BASE, | |
254 | .end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE, | |
255 | .flags = IORESOURCE_MEM, | |
256 | }; | |
257 | ||
258 | static struct platform_device aaec2000_flash_device = { | |
259 | .name = "armflash", | |
260 | .id = 0, | |
261 | .dev = { | |
262 | .platform_data = &aaec2000_flash_data, | |
263 | }, | |
264 | .num_resources = 1, | |
265 | .resource = &aaec2000_flash_resource, | |
266 | }; | |
267 | ||
268 | static int __init aaec2000_init(void) | |
269 | { | |
049eb329 BN |
270 | int i; |
271 | ||
272 | clk_register(&aaec2000_clcd_clk); | |
273 | ||
274 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { | |
275 | struct amba_device *d = amba_devs[i]; | |
276 | amba_device_register(d, &iomem_resource); | |
277 | } | |
278 | ||
4a91ca2e BN |
279 | platform_device_register(&aaec2000_flash_device); |
280 | ||
281 | return 0; | |
282 | }; | |
283 | arch_initcall(aaec2000_init); | |
284 |