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038c5b60 BN |
1 | /* |
2 | * linux/arch/arm/mach-aaec2000/core.c | |
3 | * | |
4 | * Code common to all AAEC-2000 machines | |
5 | * | |
6 | * Copyright (c) 2005 Nicolas Bellido Y Ortega | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
038c5b60 BN |
12 | #include <linux/module.h> |
13 | #include <linux/kernel.h> | |
14 | #include <linux/init.h> | |
d052d1be | 15 | #include <linux/platform_device.h> |
038c5b60 BN |
16 | #include <linux/list.h> |
17 | #include <linux/errno.h> | |
049eb329 | 18 | #include <linux/dma-mapping.h> |
038c5b60 BN |
19 | #include <linux/interrupt.h> |
20 | #include <linux/timex.h> | |
21 | #include <linux/signal.h> | |
4ab08ecf | 22 | #include <linux/clk.h> |
5a0e3ad6 | 23 | #include <linux/gfp.h> |
038c5b60 | 24 | |
a09e64fb | 25 | #include <mach/hardware.h> |
038c5b60 | 26 | #include <asm/irq.h> |
049eb329 | 27 | #include <asm/sizes.h> |
038c5b60 | 28 | |
4a91ca2e | 29 | #include <asm/mach/flash.h> |
038c5b60 BN |
30 | #include <asm/mach/irq.h> |
31 | #include <asm/mach/time.h> | |
32 | #include <asm/mach/map.h> | |
33 | ||
049eb329 | 34 | #include "core.h" |
049eb329 | 35 | |
038c5b60 BN |
36 | /* |
37 | * Common I/O mapping: | |
38 | * | |
39 | * Static virtual address mappings are as follow: | |
40 | * | |
41 | * 0xf8000000-0xf8001ffff: Devices connected to APB bus | |
42 | * 0xf8002000-0xf8003ffff: Devices connected to AHB bus | |
43 | * | |
44 | * Below 0xe8000000 is reserved for vm allocation. | |
45 | * | |
46 | * The machine specific code must provide the extra mapping beside the | |
47 | * default mapping provided here. | |
48 | */ | |
49 | static struct map_desc standard_io_desc[] __initdata = { | |
f70cd656 DS |
50 | { |
51 | .virtual = VIO_APB_BASE, | |
16b6dd44 | 52 | .pfn = __phys_to_pfn(PIO_APB_BASE), |
f70cd656 DS |
53 | .length = IO_APB_LENGTH, |
54 | .type = MT_DEVICE | |
55 | }, { | |
56 | .virtual = VIO_AHB_BASE, | |
16b6dd44 | 57 | .pfn = __phys_to_pfn(PIO_AHB_BASE), |
f70cd656 DS |
58 | .length = IO_AHB_LENGTH, |
59 | .type = MT_DEVICE | |
60 | } | |
038c5b60 BN |
61 | }; |
62 | ||
63 | void __init aaec2000_map_io(void) | |
64 | { | |
65 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); | |
66 | } | |
67 | ||
68 | /* | |
69 | * Interrupt handling routines | |
70 | */ | |
71 | static void aaec2000_int_ack(unsigned int irq) | |
72 | { | |
73 | IRQ_INTSR = 1 << irq; | |
74 | } | |
75 | ||
76 | static void aaec2000_int_mask(unsigned int irq) | |
77 | { | |
78 | IRQ_INTENC |= (1 << irq); | |
79 | } | |
80 | ||
81 | static void aaec2000_int_unmask(unsigned int irq) | |
82 | { | |
83 | IRQ_INTENS |= (1 << irq); | |
84 | } | |
85 | ||
10dd5ce2 | 86 | static struct irq_chip aaec2000_irq_chip = { |
038c5b60 BN |
87 | .ack = aaec2000_int_ack, |
88 | .mask = aaec2000_int_mask, | |
89 | .unmask = aaec2000_int_unmask, | |
90 | }; | |
91 | ||
92 | void __init aaec2000_init_irq(void) | |
93 | { | |
94 | unsigned int i; | |
95 | ||
96 | for (i = 0; i < NR_IRQS; i++) { | |
10dd5ce2 | 97 | set_irq_handler(i, handle_level_irq); |
038c5b60 BN |
98 | set_irq_chip(i, &aaec2000_irq_chip); |
99 | set_irq_flags(i, IRQF_VALID); | |
100 | } | |
101 | ||
102 | /* Disable all interrupts */ | |
103 | IRQ_INTENC = 0xffffffff; | |
104 | ||
105 | /* Clear any pending interrupts */ | |
106 | IRQ_INTSR = IRQ_INTSR; | |
107 | } | |
108 | ||
109 | /* | |
110 | * Time keeping | |
111 | */ | |
112 | /* IRQs are disabled before entering here from do_gettimeofday() */ | |
113 | static unsigned long aaec2000_gettimeoffset(void) | |
114 | { | |
115 | unsigned long ticks_to_match, elapsed, usec; | |
116 | ||
117 | /* Get ticks before next timer match */ | |
118 | ticks_to_match = TIMER1_LOAD - TIMER1_VAL; | |
119 | ||
120 | /* We need elapsed ticks since last match */ | |
121 | elapsed = LATCH - ticks_to_match; | |
122 | ||
123 | /* Now, convert them to usec */ | |
124 | usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; | |
125 | ||
126 | return usec; | |
127 | } | |
128 | ||
129 | /* We enter here with IRQs enabled */ | |
130 | static irqreturn_t | |
0cd61b68 | 131 | aaec2000_timer_interrupt(int irq, void *dev_id) |
038c5b60 BN |
132 | { |
133 | /* TODO: Check timer accuracy */ | |
0cd61b68 | 134 | timer_tick(); |
038c5b60 BN |
135 | TIMER1_CLEAR = 1; |
136 | ||
038c5b60 BN |
137 | return IRQ_HANDLED; |
138 | } | |
139 | ||
140 | static struct irqaction aaec2000_timer_irq = { | |
141 | .name = "AAEC-2000 Timer Tick", | |
b30fabad | 142 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
09b8b5f8 | 143 | .handler = aaec2000_timer_interrupt, |
038c5b60 BN |
144 | }; |
145 | ||
146 | static void __init aaec2000_timer_init(void) | |
147 | { | |
148 | /* Disable timer 1 */ | |
149 | TIMER1_CTRL = 0; | |
150 | ||
151 | /* We have somehow to generate a 100Hz clock. | |
152 | * We then use the 508KHz timer in periodic mode. | |
153 | */ | |
154 | TIMER1_LOAD = LATCH; | |
155 | TIMER1_CLEAR = 1; /* Clear interrupt */ | |
156 | ||
157 | setup_irq(INT_TMR1_OFL, &aaec2000_timer_irq); | |
158 | ||
159 | TIMER1_CTRL = TIMER_CTRL_ENABLE | | |
160 | TIMER_CTRL_PERIODIC | | |
161 | TIMER_CTRL_CLKSEL_508K; | |
162 | } | |
163 | ||
164 | struct sys_timer aaec2000_timer = { | |
165 | .init = aaec2000_timer_init, | |
166 | .offset = aaec2000_gettimeoffset, | |
167 | }; | |
168 | ||
049eb329 BN |
169 | static struct clcd_panel mach_clcd_panel; |
170 | ||
171 | static int aaec2000_clcd_setup(struct clcd_fb *fb) | |
172 | { | |
173 | dma_addr_t dma; | |
174 | ||
175 | fb->panel = &mach_clcd_panel; | |
176 | ||
177 | fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, SZ_1M, | |
178 | &dma, GFP_KERNEL); | |
179 | ||
180 | if (!fb->fb.screen_base) { | |
181 | printk(KERN_ERR "CLCD: unable to map framebuffer\n"); | |
182 | return -ENOMEM; | |
183 | } | |
184 | ||
185 | fb->fb.fix.smem_start = dma; | |
186 | fb->fb.fix.smem_len = SZ_1M; | |
187 | ||
188 | return 0; | |
189 | } | |
190 | ||
191 | static int aaec2000_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) | |
192 | { | |
193 | return dma_mmap_writecombine(&fb->dev->dev, vma, | |
194 | fb->fb.screen_base, | |
195 | fb->fb.fix.smem_start, | |
196 | fb->fb.fix.smem_len); | |
197 | } | |
198 | ||
199 | static void aaec2000_clcd_remove(struct clcd_fb *fb) | |
200 | { | |
201 | dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, | |
202 | fb->fb.screen_base, fb->fb.fix.smem_start); | |
203 | } | |
204 | ||
205 | static struct clcd_board clcd_plat_data = { | |
206 | .name = "AAEC-2000", | |
207 | .check = clcdfb_check, | |
208 | .decode = clcdfb_decode, | |
209 | .setup = aaec2000_clcd_setup, | |
210 | .mmap = aaec2000_clcd_mmap, | |
211 | .remove = aaec2000_clcd_remove, | |
212 | }; | |
213 | ||
214 | static struct amba_device clcd_device = { | |
215 | .dev = { | |
1d559e29 | 216 | .init_name = "mb:16", |
049eb329 BN |
217 | .coherent_dma_mask = ~0, |
218 | .platform_data = &clcd_plat_data, | |
219 | }, | |
220 | .res = { | |
221 | .start = AAEC_CLCD_PHYS, | |
222 | .end = AAEC_CLCD_PHYS + SZ_4K - 1, | |
223 | .flags = IORESOURCE_MEM, | |
224 | }, | |
225 | .irq = { INT_LCD, NO_IRQ }, | |
226 | .periphid = 0x41110, | |
227 | }; | |
228 | ||
229 | static struct amba_device *amba_devs[] __initdata = { | |
230 | &clcd_device, | |
231 | }; | |
232 | ||
4ab08ecf RK |
233 | void clk_disable(struct clk *clk) |
234 | { | |
235 | } | |
236 | ||
237 | int clk_set_rate(struct clk *clk, unsigned long rate) | |
238 | { | |
239 | return 0; | |
240 | } | |
241 | ||
242 | int clk_enable(struct clk *clk) | |
243 | { | |
244 | return 0; | |
245 | } | |
246 | ||
247 | struct clk *clk_get(struct device *dev, const char *id) | |
248 | { | |
249 | return dev && strcmp(dev_name(dev), "mb:16") == 0 ? NULL : ERR_PTR(-ENOENT); | |
250 | } | |
251 | ||
252 | void clk_put(struct clk *clk) | |
253 | { | |
254 | } | |
049eb329 BN |
255 | |
256 | void __init aaec2000_set_clcd_plat_data(struct aaec2000_clcd_info *clcd) | |
257 | { | |
258 | clcd_plat_data.enable = clcd->enable; | |
259 | clcd_plat_data.disable = clcd->disable; | |
260 | memcpy(&mach_clcd_panel, &clcd->panel, sizeof(struct clcd_panel)); | |
261 | } | |
262 | ||
4a91ca2e BN |
263 | static struct flash_platform_data aaec2000_flash_data = { |
264 | .map_name = "cfi_probe", | |
265 | .width = 4, | |
266 | }; | |
267 | ||
268 | static struct resource aaec2000_flash_resource = { | |
269 | .start = AAEC_FLASH_BASE, | |
270 | .end = AAEC_FLASH_BASE + AAEC_FLASH_SIZE, | |
271 | .flags = IORESOURCE_MEM, | |
272 | }; | |
273 | ||
274 | static struct platform_device aaec2000_flash_device = { | |
275 | .name = "armflash", | |
276 | .id = 0, | |
277 | .dev = { | |
278 | .platform_data = &aaec2000_flash_data, | |
279 | }, | |
280 | .num_resources = 1, | |
281 | .resource = &aaec2000_flash_resource, | |
282 | }; | |
283 | ||
284 | static int __init aaec2000_init(void) | |
285 | { | |
049eb329 BN |
286 | int i; |
287 | ||
049eb329 BN |
288 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
289 | struct amba_device *d = amba_devs[i]; | |
290 | amba_device_register(d, &iomem_resource); | |
291 | } | |
292 | ||
4a91ca2e BN |
293 | platform_device_register(&aaec2000_flash_device); |
294 | ||
295 | return 0; | |
296 | }; | |
297 | arch_initcall(aaec2000_init); | |
298 |