[deliverable/linux.git] / arch / arm / mach-at91 / at91sam9.c

/*
 *  Setup code for AT91SAM9
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

#include <linux/of.h>
#include <linux/of_platform.h>

#include <asm/mach/arch.h>
#include <asm/system_misc.h>

#include "generic.h"
#include "soc.h"

static const struct at91_soc at91sam9_socs[] = {
	AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
	AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
	AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
	AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
	AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
		 "at91sam9m11", "at91sam9g45"),
	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
		 "at91sam9m10", "at91sam9g45"),
	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
		 "at91sam9g46", "at91sam9g45"),
	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
		 "at91sam9g45", "at91sam9g45"),
	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
		 "at91sam9g15", "at91sam9x5"),
	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
		 "at91sam9g35", "at91sam9x5"),
	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
		 "at91sam9x35", "at91sam9x5"),
	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
		 "at91sam9g25", "at91sam9x5"),
	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
		 "at91sam9x25", "at91sam9x5"),
	AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
		 "at91sam9cn12", "at91sam9n12"),
	AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
		 "at91sam9n12", "at91sam9n12"),
	AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
		 "at91sam9cn11", "at91sam9n12"),
	AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
	AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
	AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
	{ /* sentinel */ },
};

static void __init at91sam9_common_init(void)
{
	struct soc_device *soc;
	struct device *soc_dev = NULL;

	soc = at91_soc_init(at91sam9_socs);
	if (soc != NULL)
		soc_dev = soc_device_to_device(soc);

	of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);

	arm_pm_idle = at91sam9_idle;
}

static void __init at91sam9_dt_device_init(void)
{
	at91sam9_common_init();
	at91sam9260_pm_init();
}

static const char *const at91_dt_board_compat[] __initconst = {
	"atmel,at91sam9",
	NULL
};

DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9")
	/* Maintainer: Atmel */
	.init_machine	= at91sam9_dt_device_init,
	.dt_compat	= at91_dt_board_compat,
MACHINE_END

static void __init at91sam9g45_dt_device_init(void)
{
	at91sam9_common_init();
	at91sam9g45_pm_init();
}

static const char *const at91sam9g45_board_compat[] __initconst = {
	"atmel,at91sam9g45",
	NULL
};

DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
	/* Maintainer: Atmel */
	.init_machine	= at91sam9g45_dt_device_init,
	.dt_compat	= at91sam9g45_board_compat,
MACHINE_END

static void __init at91sam9x5_dt_device_init(void)
{
	at91sam9_common_init();
	at91sam9x5_pm_init();
}

static const char *const at91sam9x5_board_compat[] __initconst = {
	"atmel,at91sam9x5",
	"atmel,at91sam9n12",
	NULL
};

DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
	/* Maintainer: Atmel */
	.init_machine	= at91sam9x5_dt_device_init,
	.dt_compat	= at91sam9x5_board_compat,
MACHINE_END
Commit	Line	Data
49fe2ba3	1	/*
cac01723	2	* Setup code for AT91SAM9
49fe2ba3	3	*
49fe2ba3 NF	4	* Copyright (C) 2011 Atmel,
	5	* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
	6	*
	7	* Licensed under GPLv2 or later.
	8	*/
	9
8014d6f4	10	#include <linux/of.h>
4db0ba22	11	#include <linux/of_platform.h>
49fe2ba3	12
49fe2ba3	13	#include <asm/mach/arch.h>
d18032d6	14	#include <asm/system_misc.h>
49fe2ba3	15
49fe2ba3	16	#include "generic.h"
d18032d6	17	#include "soc.h"
49fe2ba3	18
d18032d6 AB	19	static const struct at91_soc at91sam9_socs[] = {
	20	AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
	21	AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
	22	AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
	23	AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
	24	AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
	25	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
	26	"at91sam9m11", "at91sam9g45"),
	27	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
	28	"at91sam9m10", "at91sam9g45"),
	29	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
	30	"at91sam9g46", "at91sam9g45"),
	31	AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
	32	"at91sam9g45", "at91sam9g45"),
	33	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
	34	"at91sam9g15", "at91sam9x5"),
	35	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
	36	"at91sam9g35", "at91sam9x5"),
	37	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
	38	"at91sam9x35", "at91sam9x5"),
	39	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
	40	"at91sam9g25", "at91sam9x5"),
	41	AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
	42	"at91sam9x25", "at91sam9x5"),
	43	AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
	44	"at91sam9cn12", "at91sam9n12"),
	45	AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
	46	"at91sam9n12", "at91sam9n12"),
	47	AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
	48	"at91sam9cn11", "at91sam9n12"),
	49	AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"),
	50	AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"),
	51	AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"),
	52	{ /* sentinel */ },
	53	};
	54
	55	static void __init at91sam9_common_init(void)
4db0ba22	56	{
d18032d6 AB	57	struct soc_device *soc;
	58	struct device *soc_dev = NULL;
	59
	60	soc = at91_soc_init(at91sam9_socs);
	61	if (soc != NULL)
	62	soc_dev = soc_device_to_device(soc);
	63
	64	of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);
ea69f998	65
b9f122cc	66	arm_pm_idle = at91sam9_idle;
d18032d6 AB	67	}
	68
	69	static void __init at91sam9_dt_device_init(void)
	70	{
	71	at91sam9_common_init();
ad3fc3e3	72	at91sam9260_pm_init();
4db0ba22 AB	73	}
4db0ba22 AB	74
19c233b7	75	static const char *const at91_dt_board_compat[] __initconst = {
7c8a98c8	76	"atmel,at91sam9",
49fe2ba3 NF	77	NULL
	78	};
	79
ad3fc3e3	80	DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9")
49fe2ba3	81	/* Maintainer: Atmel */
ad3fc3e3	82	.init_machine = at91sam9_dt_device_init,
49fe2ba3 NF	83	.dt_compat = at91_dt_board_compat,
49fe2ba3 NF	84	MACHINE_END
4db0ba22	85
ad3fc3e3	86	static void __init at91sam9g45_dt_device_init(void)
4db0ba22	87	{
d18032d6	88	at91sam9_common_init();
ad3fc3e3	89	at91sam9g45_pm_init();
4db0ba22 AB	90	}
4db0ba22 AB	91
19c233b7	92	static const char *const at91sam9g45_board_compat[] __initconst = {
4db0ba22 AB	93	"atmel,at91sam9g45",
	94	NULL
	95	};
	96
	97	DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
	98	/* Maintainer: Atmel */
ad3fc3e3 NF	99	.init_machine = at91sam9g45_dt_device_init,
ad3fc3e3 NF	100	.dt_compat = at91sam9g45_board_compat,
4db0ba22	101	MACHINE_END
bf02280e	102
ad3fc3e3	103	static void __init at91sam9x5_dt_device_init(void)
bf02280e	104	{
d18032d6	105	at91sam9_common_init();
ad3fc3e3	106	at91sam9x5_pm_init();
bf02280e NF	107	}
bf02280e NF	108
19c233b7	109	static const char *const at91sam9x5_board_compat[] __initconst = {
bf02280e NF	110	"atmel,at91sam9x5",
	111	"atmel,at91sam9n12",
	112	NULL
	113	};
	114
	115	DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
	116	/* Maintainer: Atmel */
ad3fc3e3 NF	117	.init_machine = at91sam9x5_dt_device_init,
ad3fc3e3 NF	118	.dt_compat = at91sam9x5_board_compat,
bf02280e	119	MACHINE_END