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c42dcb3d AV |
1 | /* |
2 | * Copyright (C) 2005 SAN People | |
3 | * Copyright (C) 2007 Atmel Corporation | |
4 | * | |
5 | * This file is subject to the terms and conditions of the GNU General Public | |
6 | * License. See the file COPYING in the main directory of this archive for | |
7 | * more details. | |
8 | */ | |
9 | ||
10 | #include <linux/types.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/mm.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/spi/spi.h> | |
16 | #include <linux/fb.h> | |
17 | #include <linux/clk.h> | |
18 | ||
19 | #include <video/atmel_lcdc.h> | |
20 | ||
c42dcb3d AV |
21 | #include <asm/setup.h> |
22 | #include <asm/mach-types.h> | |
23 | #include <asm/irq.h> | |
24 | ||
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach/map.h> | |
27 | #include <asm/mach/irq.h> | |
28 | ||
e505240b | 29 | #include <mach/hardware.h> |
a09e64fb RK |
30 | #include <mach/board.h> |
31 | #include <mach/gpio.h> | |
32 | #include <mach/at91sam9_smc.h> | |
c42dcb3d AV |
33 | |
34 | #include "generic.h" | |
35 | ||
36 | ||
c42dcb3d AV |
37 | static void __init ek_map_io(void) |
38 | { | |
39 | /* Initialize processor: 12.000 MHz crystal */ | |
40 | at91sam9rl_initialize(12000000); | |
41 | ||
a3da1222 AV |
42 | /* DGBU on ttyS0. (Rx & Tx only) */ |
43 | at91_register_uart(0, 0, 0); | |
44 | ||
45 | /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */ | |
46 | at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS); | |
47 | ||
48 | /* set serial console to ttyS0 (ie, DBGU) */ | |
49 | at91_set_serial_console(0); | |
c42dcb3d AV |
50 | } |
51 | ||
52 | static void __init ek_init_irq(void) | |
53 | { | |
54 | at91sam9rl_init_interrupts(NULL); | |
55 | } | |
56 | ||
57 | ||
ba45ca43 NF |
58 | /* |
59 | * USB HS Device port | |
60 | */ | |
61 | static struct usba_platform_data __initdata ek_usba_udc_data = { | |
62 | .vbus_pin = AT91_PIN_PA8, | |
63 | }; | |
64 | ||
65 | ||
c42dcb3d AV |
66 | /* |
67 | * MCI (SD/MMC) | |
68 | */ | |
69 | static struct at91_mmc_data __initdata ek_mmc_data = { | |
70 | .wire4 = 1, | |
71 | .det_pin = AT91_PIN_PA15, | |
72 | // .wp_pin = ... not connected | |
73 | // .vcc_pin = ... not connected | |
74 | }; | |
75 | ||
76 | ||
77 | /* | |
78 | * NAND flash | |
79 | */ | |
80 | static struct mtd_partition __initdata ek_nand_partition[] = { | |
81 | { | |
82 | .name = "Partition 1", | |
83 | .offset = 0, | |
e505240b | 84 | .size = SZ_256K, |
c42dcb3d AV |
85 | }, |
86 | { | |
87 | .name = "Partition 2", | |
e505240b | 88 | .offset = MTDPART_OFS_NXTBLK, |
c42dcb3d AV |
89 | .size = MTDPART_SIZ_FULL, |
90 | }, | |
91 | }; | |
92 | ||
cdea4606 | 93 | static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) |
c42dcb3d AV |
94 | { |
95 | *num_partitions = ARRAY_SIZE(ek_nand_partition); | |
96 | return ek_nand_partition; | |
97 | } | |
98 | ||
3c3796cc | 99 | static struct atmel_nand_data __initdata ek_nand_data = { |
c42dcb3d AV |
100 | .ale = 21, |
101 | .cle = 22, | |
102 | // .det_pin = ... not connected | |
103 | .rdy_pin = AT91_PIN_PD17, | |
104 | .enable_pin = AT91_PIN_PB6, | |
105 | .partition_info = nand_partitions, | |
106 | .bus_width_16 = 0, | |
107 | }; | |
108 | ||
109 | ||
110 | /* | |
111 | * SPI devices | |
112 | */ | |
113 | static struct spi_board_info ek_spi_devices[] = { | |
114 | { /* DataFlash chip */ | |
115 | .modalias = "mtd_dataflash", | |
116 | .chip_select = 0, | |
117 | .max_speed_hz = 15 * 1000 * 1000, | |
118 | .bus_num = 0, | |
119 | }, | |
120 | }; | |
121 | ||
122 | ||
123 | /* | |
124 | * LCD Controller | |
125 | */ | |
126 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | |
127 | static struct fb_videomode at91_tft_vga_modes[] = { | |
128 | { | |
129 | .name = "TX09D50VM1CCA @ 60", | |
130 | .refresh = 60, | |
131 | .xres = 240, .yres = 320, | |
132 | .pixclock = KHZ2PICOS(4965), | |
133 | ||
134 | .left_margin = 1, .right_margin = 33, | |
135 | .upper_margin = 1, .lower_margin = 0, | |
136 | .hsync_len = 5, .vsync_len = 1, | |
137 | ||
138 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
139 | .vmode = FB_VMODE_NONINTERLACED, | |
140 | }, | |
141 | }; | |
142 | ||
143 | static struct fb_monspecs at91fb_default_monspecs = { | |
144 | .manufacturer = "HIT", | |
145 | .monitor = "TX09D50VM1CCA", | |
146 | ||
147 | .modedb = at91_tft_vga_modes, | |
148 | .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), | |
149 | .hfmin = 15000, | |
150 | .hfmax = 64000, | |
151 | .vfmin = 50, | |
152 | .vfmax = 150, | |
153 | }; | |
154 | ||
155 | #define AT91SAM9RL_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ | |
156 | | ATMEL_LCDC_DISTYPE_TFT \ | |
157 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) | |
158 | ||
159 | static void at91_lcdc_power_control(int on) | |
160 | { | |
161 | if (on) | |
162 | at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */ | |
163 | else | |
164 | at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */ | |
165 | } | |
166 | ||
167 | /* Driver datas */ | |
168 | static struct atmel_lcdfb_info __initdata ek_lcdc_data = { | |
169 | .default_bpp = 16, | |
170 | .default_dmacon = ATMEL_LCDC_DMAEN, | |
171 | .default_lcdcon2 = AT91SAM9RL_DEFAULT_LCDCON2, | |
172 | .default_monspecs = &at91fb_default_monspecs, | |
173 | .atmel_lcdfb_power_control = at91_lcdc_power_control, | |
174 | .guard_time = 1, | |
175 | }; | |
176 | ||
177 | #else | |
178 | static struct atmel_lcdfb_info __initdata ek_lcdc_data; | |
179 | #endif | |
180 | ||
181 | ||
182 | static void __init ek_board_init(void) | |
183 | { | |
184 | /* Serial */ | |
185 | at91_add_device_serial(); | |
ba45ca43 NF |
186 | /* USB HS */ |
187 | at91_add_device_usba(&ek_usba_udc_data); | |
c42dcb3d | 188 | /* I2C */ |
f230d3f5 | 189 | at91_add_device_i2c(NULL, 0); |
c42dcb3d AV |
190 | /* NAND */ |
191 | at91_add_device_nand(&ek_nand_data); | |
192 | /* SPI */ | |
193 | at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); | |
194 | /* MMC */ | |
195 | at91_add_device_mmc(0, &ek_mmc_data); | |
196 | /* LCD Controller */ | |
197 | at91_add_device_lcdc(&ek_lcdc_data); | |
f7647e63 AV |
198 | /* Touch Screen Controller */ |
199 | at91_add_device_tsadcc(); | |
c42dcb3d AV |
200 | } |
201 | ||
202 | MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") | |
203 | /* Maintainer: Atmel */ | |
204 | .phys_io = AT91_BASE_SYS, | |
205 | .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, | |
206 | .boot_params = AT91_SDRAM_BASE + 0x100, | |
207 | .timer = &at91sam926x_timer, | |
208 | .map_io = ek_map_io, | |
209 | .init_irq = ek_init_irq, | |
210 | .init_machine = ek_board_init, | |
211 | MACHINE_END |