projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| eaa595cb | 1 | /* |
| a09e64fb | 2 | * arch/arm/mach-at91/include/mach/at91_wdt.h |
| eaa595cb AV |
3 | * |
| 4 | * Watchdog Timer (WDT) - System peripherals regsters. | |
| 5 | * Based on AT91SAM9261 datasheet revision D. | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License as published by | |
| 9 | * the Free Software Foundation; either version 2 of the License, or | |
| 10 | * (at your option) any later version. | |
| 11 | */ | |
| 12 | ||
| 13 | #ifndef AT91_WDT_H | |
| 14 | #define AT91_WDT_H | |
| 15 | ||
| 16 | #define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ | |
| 17 | #define AT91_WDT_WDRSTT (1 << 0) /* Restart */ | |
| 0e5f82dd | 18 | #define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ |
| eaa595cb AV |
19 | |
| 20 | #define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ | |
| 21 | #define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ | |
| 22 | #define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ | |
| 23 | #define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ | |
| 24 | #define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */ | |
| 25 | #define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */ | |
| 26 | #define AT91_WDT_WDD (0xfff << 16) /* Delta Value */ | |
| 27 | #define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ | |
| 28 | #define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ | |
| 29 | ||
| 30 | #define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ | |
| 31 | #define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ | |
| 32 | #define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ | |
| 33 | ||
| 34 | #endif |