projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1ea60cf7 AT |
1 | #ifdef CONFIG_ARCH_AT91RM9200 |
| 2 | #include <mach/at91rm9200_mc.h> | |
| 3 | ||
| 4 | /* | |
| 5 | * The AT91RM9200 goes into self-refresh mode with this command, and will | |
| 6 | * terminate self-refresh automatically on the next SDRAM access. | |
| 7 | * | |
| 8 | * Self-refresh mode is exited as soon as a memory access is made, but we don't | |
| 9 | * know for sure when that happens. However, we need to restore the low-power | |
| 10 | * mode if it was enabled before going idle. Restoring low-power mode while | |
| 11 | * still in self-refresh is "not recommended", but seems to work. | |
| 12 | */ | |
| 13 | ||
| 14 | static inline u32 sdram_selfrefresh_enable(void) | |
| 15 | { | |
| 16 | u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); | |
| 17 | ||
| 18 | at91_sys_write(AT91_SDRAMC_LPR, 0); | |
| 19 | at91_sys_write(AT91_SDRAMC_SRR, 1); | |
| 20 | return saved_lpr; | |
| 21 | } | |
| 22 | ||
| 23 | #define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) | |
| 24 | ||
| 25 | #elif defined(CONFIG_ARCH_AT91CAP9) | |
| 26 | #include <mach/at91cap9_ddrsdr.h> | |
| 27 | ||
| 28 | ||
| 29 | static inline u32 sdram_selfrefresh_enable(void) | |
| 30 | { | |
| 31 | u32 saved_lpr, lpr; | |
| 32 | ||
| 33 | saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR); | |
| 34 | ||
| 35 | lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; | |
| 36 | at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); | |
| 37 | return saved_lpr; | |
| 38 | } | |
| 39 | ||
| 40 | #define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr) | |
| 41 | ||
| 42 | #else | |
| 43 | #include <mach/at91sam9_sdramc.h> | |
| 44 | ||
| 45 | #ifdef CONFIG_ARCH_AT91SAM9263 | |
| 46 | /* | |
| 47 | * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; | |
| 48 | * handle those cases both here and in the Suspend-To-RAM support. | |
| 49 | */ | |
| 50 | #define AT91_SDRAMC AT91_SDRAMC0 | |
| 51 | #warning Assuming EB1 SDRAM controller is *NOT* used | |
| 52 | #endif | |
| 53 | ||
| 54 | static inline u32 sdram_selfrefresh_enable(void) | |
| 55 | { | |
| 56 | u32 saved_lpr, lpr; | |
| 57 | ||
| 58 | saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); | |
| 59 | ||
| 60 | lpr = saved_lpr & ~AT91_SDRAMC_LPCB; | |
| 61 | at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); | |
| 62 | return saved_lpr; | |
| 63 | } | |
| 64 | ||
| 65 | #define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) | |
| 66 | ||
| 67 | #endif |