Commit | Line | Data |
---|---|---|
73a59c1c | 1 | /* |
8fc5ffa0 | 2 | * arch/arm/mach-at91rm9200/at91rm9200.c |
73a59c1c SP |
3 | * |
4 | * Copyright (C) 2005 SAN People | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | */ | |
12 | ||
73a59c1c SP |
13 | #include <linux/module.h> |
14 | ||
15 | #include <asm/mach/arch.h> | |
16 | #include <asm/mach/map.h> | |
1f4fd0a0 | 17 | #include <asm/arch/at91rm9200.h> |
55d8baee AV |
18 | #include <asm/arch/at91_pmc.h> |
19 | #include <asm/arch/at91_st.h> | |
73a59c1c | 20 | |
10e8e1fb | 21 | #include "generic.h" |
2eeaaa21 | 22 | #include "clock.h" |
73a59c1c SP |
23 | |
24 | static struct map_desc at91rm9200_io_desc[] __initdata = { | |
25 | { | |
26 | .virtual = AT91_VA_BASE_SYS, | |
27 | .pfn = __phys_to_pfn(AT91_BASE_SYS), | |
28 | .length = SZ_4K, | |
29 | .type = MT_DEVICE, | |
73a59c1c SP |
30 | }, { |
31 | .virtual = AT91_VA_BASE_EMAC, | |
72729910 | 32 | .pfn = __phys_to_pfn(AT91RM9200_BASE_EMAC), |
73a59c1c SP |
33 | .length = SZ_16K, |
34 | .type = MT_DEVICE, | |
35 | }, { | |
05043d08 | 36 | .virtual = AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE, |
72729910 AV |
37 | .pfn = __phys_to_pfn(AT91RM9200_SRAM_BASE), |
38 | .length = AT91RM9200_SRAM_SIZE, | |
10e8e1fb | 39 | .type = MT_DEVICE, |
73a59c1c SP |
40 | }, |
41 | }; | |
42 | ||
2eeaaa21 AV |
43 | /* -------------------------------------------------------------------- |
44 | * Clocks | |
45 | * -------------------------------------------------------------------- */ | |
46 | ||
47 | /* | |
48 | * The peripheral clocks. | |
49 | */ | |
50 | static struct clk udc_clk = { | |
51 | .name = "udc_clk", | |
52 | .pmc_mask = 1 << AT91RM9200_ID_UDP, | |
53 | .type = CLK_TYPE_PERIPHERAL, | |
54 | }; | |
55 | static struct clk ohci_clk = { | |
56 | .name = "ohci_clk", | |
57 | .pmc_mask = 1 << AT91RM9200_ID_UHP, | |
58 | .type = CLK_TYPE_PERIPHERAL, | |
59 | }; | |
60 | static struct clk ether_clk = { | |
61 | .name = "ether_clk", | |
62 | .pmc_mask = 1 << AT91RM9200_ID_EMAC, | |
63 | .type = CLK_TYPE_PERIPHERAL, | |
64 | }; | |
65 | static struct clk mmc_clk = { | |
66 | .name = "mci_clk", | |
67 | .pmc_mask = 1 << AT91RM9200_ID_MCI, | |
68 | .type = CLK_TYPE_PERIPHERAL, | |
69 | }; | |
70 | static struct clk twi_clk = { | |
71 | .name = "twi_clk", | |
72 | .pmc_mask = 1 << AT91RM9200_ID_TWI, | |
73 | .type = CLK_TYPE_PERIPHERAL, | |
74 | }; | |
75 | static struct clk usart0_clk = { | |
76 | .name = "usart0_clk", | |
77 | .pmc_mask = 1 << AT91RM9200_ID_US0, | |
78 | .type = CLK_TYPE_PERIPHERAL, | |
79 | }; | |
80 | static struct clk usart1_clk = { | |
81 | .name = "usart1_clk", | |
82 | .pmc_mask = 1 << AT91RM9200_ID_US1, | |
83 | .type = CLK_TYPE_PERIPHERAL, | |
84 | }; | |
85 | static struct clk usart2_clk = { | |
86 | .name = "usart2_clk", | |
87 | .pmc_mask = 1 << AT91RM9200_ID_US2, | |
88 | .type = CLK_TYPE_PERIPHERAL, | |
89 | }; | |
90 | static struct clk usart3_clk = { | |
91 | .name = "usart3_clk", | |
92 | .pmc_mask = 1 << AT91RM9200_ID_US3, | |
93 | .type = CLK_TYPE_PERIPHERAL, | |
94 | }; | |
95 | static struct clk spi_clk = { | |
96 | .name = "spi_clk", | |
97 | .pmc_mask = 1 << AT91RM9200_ID_SPI, | |
98 | .type = CLK_TYPE_PERIPHERAL, | |
99 | }; | |
100 | static struct clk pioA_clk = { | |
101 | .name = "pioA_clk", | |
102 | .pmc_mask = 1 << AT91RM9200_ID_PIOA, | |
103 | .type = CLK_TYPE_PERIPHERAL, | |
104 | }; | |
105 | static struct clk pioB_clk = { | |
106 | .name = "pioB_clk", | |
107 | .pmc_mask = 1 << AT91RM9200_ID_PIOB, | |
108 | .type = CLK_TYPE_PERIPHERAL, | |
109 | }; | |
110 | static struct clk pioC_clk = { | |
111 | .name = "pioC_clk", | |
112 | .pmc_mask = 1 << AT91RM9200_ID_PIOC, | |
113 | .type = CLK_TYPE_PERIPHERAL, | |
114 | }; | |
115 | static struct clk pioD_clk = { | |
116 | .name = "pioD_clk", | |
117 | .pmc_mask = 1 << AT91RM9200_ID_PIOD, | |
118 | .type = CLK_TYPE_PERIPHERAL, | |
119 | }; | |
120 | ||
121 | static struct clk *periph_clocks[] __initdata = { | |
122 | &pioA_clk, | |
123 | &pioB_clk, | |
124 | &pioC_clk, | |
125 | &pioD_clk, | |
126 | &usart0_clk, | |
127 | &usart1_clk, | |
128 | &usart2_clk, | |
129 | &usart3_clk, | |
130 | &mmc_clk, | |
131 | &udc_clk, | |
132 | &twi_clk, | |
133 | &spi_clk, | |
134 | // ssc 0 .. ssc2 | |
135 | // tc0 .. tc5 | |
136 | &ohci_clk, | |
137 | ðer_clk, | |
138 | // irq0 .. irq6 | |
139 | }; | |
140 | ||
141 | /* | |
142 | * The four programmable clocks. | |
143 | * You must configure pin multiplexing to bring these signals out. | |
144 | */ | |
145 | static struct clk pck0 = { | |
146 | .name = "pck0", | |
147 | .pmc_mask = AT91_PMC_PCK0, | |
148 | .type = CLK_TYPE_PROGRAMMABLE, | |
149 | .id = 0, | |
150 | }; | |
151 | static struct clk pck1 = { | |
152 | .name = "pck1", | |
153 | .pmc_mask = AT91_PMC_PCK1, | |
154 | .type = CLK_TYPE_PROGRAMMABLE, | |
155 | .id = 1, | |
156 | }; | |
157 | static struct clk pck2 = { | |
158 | .name = "pck2", | |
159 | .pmc_mask = AT91_PMC_PCK2, | |
160 | .type = CLK_TYPE_PROGRAMMABLE, | |
161 | .id = 2, | |
162 | }; | |
163 | static struct clk pck3 = { | |
164 | .name = "pck3", | |
165 | .pmc_mask = AT91_PMC_PCK3, | |
166 | .type = CLK_TYPE_PROGRAMMABLE, | |
167 | .id = 3, | |
168 | }; | |
169 | ||
170 | static void __init at91rm9200_register_clocks(void) | |
73a59c1c | 171 | { |
2eeaaa21 AV |
172 | int i; |
173 | ||
174 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | |
175 | clk_register(periph_clocks[i]); | |
176 | ||
177 | clk_register(&pck0); | |
178 | clk_register(&pck1); | |
179 | clk_register(&pck2); | |
180 | clk_register(&pck3); | |
181 | } | |
182 | ||
f2173834 AV |
183 | /* -------------------------------------------------------------------- |
184 | * GPIO | |
185 | * -------------------------------------------------------------------- */ | |
186 | ||
187 | static struct at91_gpio_bank at91rm9200_gpio[] = { | |
188 | { | |
189 | .id = AT91RM9200_ID_PIOA, | |
190 | .offset = AT91_PIOA, | |
191 | .clock = &pioA_clk, | |
192 | }, { | |
193 | .id = AT91RM9200_ID_PIOB, | |
194 | .offset = AT91_PIOB, | |
195 | .clock = &pioB_clk, | |
196 | }, { | |
197 | .id = AT91RM9200_ID_PIOC, | |
198 | .offset = AT91_PIOC, | |
199 | .clock = &pioC_clk, | |
200 | }, { | |
201 | .id = AT91RM9200_ID_PIOD, | |
202 | .offset = AT91_PIOD, | |
203 | .clock = &pioD_clk, | |
204 | } | |
205 | }; | |
2eeaaa21 | 206 | |
1f4fd0a0 AV |
207 | static void at91rm9200_reset(void) |
208 | { | |
209 | /* | |
210 | * Perform a hardware reset with the use of the Watchdog timer. | |
211 | */ | |
212 | at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1); | |
213 | at91_sys_write(AT91_ST_CR, AT91_ST_WDRST); | |
214 | } | |
215 | ||
216 | ||
2eeaaa21 AV |
217 | /* -------------------------------------------------------------------- |
218 | * AT91RM9200 processor initialization | |
219 | * -------------------------------------------------------------------- */ | |
f2173834 | 220 | void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks) |
2eeaaa21 AV |
221 | { |
222 | /* Map peripherals */ | |
73a59c1c | 223 | iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); |
2eeaaa21 | 224 | |
1f4fd0a0 AV |
225 | at91_arch_reset = at91rm9200_reset; |
226 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | |
227 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) | |
228 | | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) | |
229 | | (1 << AT91RM9200_ID_IRQ6); | |
230 | ||
2eeaaa21 AV |
231 | /* Init clock subsystem */ |
232 | at91_clock_init(main_clock); | |
233 | ||
234 | /* Register the processor-specific clocks */ | |
235 | at91rm9200_register_clocks(); | |
f2173834 AV |
236 | |
237 | /* Initialize GPIO subsystem */ | |
238 | at91_gpio_init(at91rm9200_gpio, banks); | |
73a59c1c SP |
239 | } |
240 | ||
f2173834 AV |
241 | |
242 | /* -------------------------------------------------------------------- | |
243 | * Interrupt initialization | |
244 | * -------------------------------------------------------------------- */ | |
245 | ||
ba854e18 AV |
246 | /* |
247 | * The default interrupt priority levels (0 = lowest, 7 = highest). | |
248 | */ | |
249 | static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { | |
250 | 7, /* Advanced Interrupt Controller (FIQ) */ | |
251 | 7, /* System Peripherals */ | |
252 | 0, /* Parallel IO Controller A */ | |
253 | 0, /* Parallel IO Controller B */ | |
254 | 0, /* Parallel IO Controller C */ | |
255 | 0, /* Parallel IO Controller D */ | |
256 | 6, /* USART 0 */ | |
257 | 6, /* USART 1 */ | |
258 | 6, /* USART 2 */ | |
259 | 6, /* USART 3 */ | |
260 | 0, /* Multimedia Card Interface */ | |
261 | 4, /* USB Device Port */ | |
262 | 0, /* Two-Wire Interface */ | |
263 | 6, /* Serial Peripheral Interface */ | |
264 | 5, /* Serial Synchronous Controller 0 */ | |
265 | 5, /* Serial Synchronous Controller 1 */ | |
266 | 5, /* Serial Synchronous Controller 2 */ | |
267 | 0, /* Timer Counter 0 */ | |
268 | 0, /* Timer Counter 1 */ | |
269 | 0, /* Timer Counter 2 */ | |
270 | 0, /* Timer Counter 3 */ | |
271 | 0, /* Timer Counter 4 */ | |
272 | 0, /* Timer Counter 5 */ | |
273 | 3, /* USB Host port */ | |
274 | 3, /* Ethernet MAC */ | |
275 | 0, /* Advanced Interrupt Controller (IRQ0) */ | |
276 | 0, /* Advanced Interrupt Controller (IRQ1) */ | |
277 | 0, /* Advanced Interrupt Controller (IRQ2) */ | |
278 | 0, /* Advanced Interrupt Controller (IRQ3) */ | |
279 | 0, /* Advanced Interrupt Controller (IRQ4) */ | |
280 | 0, /* Advanced Interrupt Controller (IRQ5) */ | |
281 | 0 /* Advanced Interrupt Controller (IRQ6) */ | |
282 | }; | |
283 | ||
f2173834 | 284 | void __init at91rm9200_init_interrupts(unsigned int priority[NR_AIC_IRQS]) |
ba854e18 AV |
285 | { |
286 | if (!priority) | |
287 | priority = at91rm9200_default_irq_priority; | |
288 | ||
f2173834 | 289 | /* Initialize the AIC interrupt controller */ |
ba854e18 | 290 | at91_aic_init(priority); |
f2173834 AV |
291 | |
292 | /* Enable GPIO interrupts */ | |
293 | at91_gpio_irq_setup(); | |
ba854e18 | 294 | } |