[ARM] 3579/1: AT91RM9200 Timer simplification
[deliverable/linux.git] / arch / arm / mach-at91rm9200 / time.c
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1/*
2 * linux/arch/arm/mach-at91rm9200/time.c
3 *
4 * Copyright (C) 2003 SAN People
5 * Copyright (C) 2003 ATMEL
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/config.h>
23#include <linux/init.h>
24#include <linux/interrupt.h>
25#include <linux/kernel.h>
26#include <linux/sched.h>
27#include <linux/time.h>
28
29#include <asm/hardware.h>
30#include <asm/io.h>
31#include <asm/irq.h>
32#include <asm/mach/time.h>
33
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34static unsigned long last_crtr;
35
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36/*
37 * The ST_CRTR is updated asynchronously to the master clock. It is therefore
38 * necessary to read it twice (with the same value) to ensure accuracy.
39 */
40static inline unsigned long read_CRTR(void) {
41 unsigned long x1, x2;
42
43 do {
44 x1 = at91_sys_read(AT91_ST_CRTR);
45 x2 = at91_sys_read(AT91_ST_CRTR);
46 } while (x1 != x2);
47
48 return x1;
49}
50
51/*
52 * Returns number of microseconds since last timer interrupt. Note that interrupts
53 * will have been disabled by do_gettimeofday()
54 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
55 * 'tick' is usecs per jiffy (linux/timex.h).
56 */
57static unsigned long at91rm9200_gettimeoffset(void)
58{
59 unsigned long elapsed;
60
963151f2 61 elapsed = (read_CRTR() - last_crtr) & AT91_ST_ALMV;
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62
63 return (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH;
64}
65
66/*
67 * IRQ handler for the timer.
68 */
69static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
70{
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71 if (at91_sys_read(AT91_ST_SR) & AT91_ST_PITS) { /* This is a shared interrupt */
72 write_seqlock(&xtime_lock);
73
963151f2 74 while (((read_CRTR() - last_crtr) & AT91_ST_ALMV) >= LATCH) {
73a59c1c 75 timer_tick(regs);
963151f2 76 last_crtr = (last_crtr + LATCH) & AT91_ST_ALMV;
39806805 77 }
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78
79 write_sequnlock(&xtime_lock);
80
81 return IRQ_HANDLED;
82 }
83 else
84 return IRQ_NONE; /* not handled */
85}
86
87static struct irqaction at91rm9200_timer_irq = {
88 .name = "at91_tick",
963151f2 89 .flags = SA_SHIRQ | SA_INTERRUPT | SA_TIMER,
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90 .handler = at91rm9200_timer_interrupt
91};
92
93/*
94 * Set up timer interrupt.
95 */
96void __init at91rm9200_timer_init(void)
97{
98 /* Disable all timer interrupts */
99 at91_sys_write(AT91_ST_IDR, AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
100 (void) at91_sys_read(AT91_ST_SR); /* Clear any pending interrupts */
101
102 /*
103 * Make IRQs happen for the system timer.
104 */
105 setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
106
107 /* Set initial alarm to 0 */
108 at91_sys_write(AT91_ST_RTAR, 0);
109
110 /* Real time counter incremented every 30.51758 microseconds */
111 at91_sys_write(AT91_ST_RTMR, 1);
112
113 /* Set Period Interval timer */
114 at91_sys_write(AT91_ST_PIMR, LATCH);
115
116 /* Change the kernel's 'tick' value to 10009 usec. (the default is 10000) */
117 tick_usec = (LATCH * 1000000) / CLOCK_TICK_RATE;
118
119 /* Enable Period Interval Timer interrupt */
120 at91_sys_write(AT91_ST_IER, AT91_ST_PITS);
121}
122
123struct sys_timer at91rm9200_timer = {
124 .init = at91rm9200_timer_init,
125 .offset = at91rm9200_gettimeoffset,
126};
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