Commit | Line | Data |
---|---|---|
c3ceebd7 MM |
1 | /* |
2 | * Copyright (C) 2014 Broadcom Corporation | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License as | |
6 | * published by the Free Software Foundation version 2. | |
7 | * | |
8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
9 | * kind, whether express or implied; without even the implied warranty | |
10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
c3ceebd7 MM |
14 | #include <linux/of_address.h> |
15 | #include <linux/of_platform.h> | |
d5c627b5 | 16 | #include <linux/io.h> |
c3ceebd7 MM |
17 | |
18 | #include <asm/mach/arch.h> | |
19 | ||
eeda4cb9 | 20 | #include "kona_l2_cache.h" |
c3ceebd7 MM |
21 | |
22 | #define RSTMGR_DT_STRING "brcm,bcm21664-resetmgr" | |
23 | ||
24 | #define RSTMGR_REG_WR_ACCESS_OFFSET 0 | |
25 | #define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4 | |
26 | ||
27 | #define RSTMGR_WR_PASSWORD 0xa5a5 | |
28 | #define RSTMGR_WR_PASSWORD_SHIFT 8 | |
29 | #define RSTMGR_WR_ACCESS_ENABLE 1 | |
30 | ||
31 | static void bcm21664_restart(enum reboot_mode mode, const char *cmd) | |
32 | { | |
33 | void __iomem *base; | |
34 | struct device_node *resetmgr; | |
35 | ||
36 | resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING); | |
37 | if (!resetmgr) { | |
38 | pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n"); | |
39 | return; | |
40 | } | |
41 | base = of_iomap(resetmgr, 0); | |
42 | if (!base) { | |
43 | pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n"); | |
44 | return; | |
45 | } | |
46 | ||
47 | /* | |
48 | * A soft reset is triggered by writing a 0 to bit 0 of the soft reset | |
49 | * register. To write to that register we must first write the password | |
50 | * and the enable bit in the write access enable register. | |
51 | */ | |
52 | writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) | | |
53 | RSTMGR_WR_ACCESS_ENABLE, | |
54 | base + RSTMGR_REG_WR_ACCESS_OFFSET); | |
55 | writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET); | |
56 | ||
57 | /* Wait for reset */ | |
58 | while (1); | |
59 | } | |
60 | ||
61 | static void __init bcm21664_init(void) | |
62 | { | |
63 | of_platform_populate(NULL, of_default_bus_match_table, NULL, | |
64 | &platform_bus); | |
65 | kona_l2_cache_init(); | |
66 | } | |
67 | ||
68 | static const char * const bcm21664_dt_compat[] = { | |
69 | "brcm,bcm21664", | |
70 | NULL, | |
71 | }; | |
72 | ||
73 | DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor") | |
74 | .init_machine = bcm21664_init, | |
75 | .restart = bcm21664_restart, | |
76 | .dt_compat = bcm21664_dt_compat, | |
77 | MACHINE_END |