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ec9653b8 SA |
1 | /* |
2 | * Copyright (C) 2010 Broadcom | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | */ | |
14 | ||
d0f1c7ff | 15 | #include <linux/delay.h> |
ec9653b8 | 16 | #include <linux/init.h> |
5702941e | 17 | #include <linux/irqchip.h> |
d0f1c7ff | 18 | #include <linux/of_address.h> |
ec9653b8 | 19 | #include <linux/of_platform.h> |
75fabc3f | 20 | #include <linux/clk/bcm2835.h> |
ec9653b8 SA |
21 | |
22 | #include <asm/mach/arch.h> | |
23 | #include <asm/mach/map.h> | |
ec9653b8 | 24 | |
d0f1c7ff | 25 | #define PM_RSTC 0x1c |
45e9d77a | 26 | #define PM_RSTS 0x20 |
d0f1c7ff SW |
27 | #define PM_WDOG 0x24 |
28 | ||
29 | #define PM_PASSWORD 0x5a000000 | |
30 | #define PM_RSTC_WRCFG_MASK 0x00000030 | |
31 | #define PM_RSTC_WRCFG_FULL_RESET 0x00000020 | |
45e9d77a | 32 | #define PM_RSTS_HADWRH_SET 0x00000040 |
d0f1c7ff | 33 | |
f1ac922d SW |
34 | #define BCM2835_PERIPH_PHYS 0x20000000 |
35 | #define BCM2835_PERIPH_VIRT 0xf0000000 | |
36 | #define BCM2835_PERIPH_SIZE SZ_16M | |
37 | ||
d0f1c7ff SW |
38 | static void __iomem *wdt_regs; |
39 | ||
40 | /* | |
41 | * The machine restart method can be called from an atomic context so we won't | |
42 | * be able to ioremap the regs then. | |
43 | */ | |
44 | static void bcm2835_setup_restart(void) | |
45 | { | |
46 | struct device_node *np = of_find_compatible_node(NULL, NULL, | |
47 | "brcm,bcm2835-pm-wdt"); | |
48 | if (WARN(!np, "unable to setup watchdog restart")) | |
49 | return; | |
50 | ||
51 | wdt_regs = of_iomap(np, 0); | |
52 | WARN(!wdt_regs, "failed to remap watchdog regs"); | |
53 | } | |
54 | ||
7b6d864b | 55 | static void bcm2835_restart(enum reboot_mode mode, const char *cmd) |
d0f1c7ff SW |
56 | { |
57 | u32 val; | |
58 | ||
59 | if (!wdt_regs) | |
60 | return; | |
61 | ||
62 | /* use a timeout of 10 ticks (~150us) */ | |
63 | writel_relaxed(10 | PM_PASSWORD, wdt_regs + PM_WDOG); | |
64 | val = readl_relaxed(wdt_regs + PM_RSTC); | |
65 | val &= ~PM_RSTC_WRCFG_MASK; | |
66 | val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET; | |
67 | writel_relaxed(val, wdt_regs + PM_RSTC); | |
68 | ||
69 | /* No sleeping, possibly atomic. */ | |
70 | mdelay(1); | |
71 | } | |
72 | ||
45e9d77a DC |
73 | /* |
74 | * We can't really power off, but if we do the normal reset scheme, and | |
75 | * indicate to bootcode.bin not to reboot, then most of the chip will be | |
76 | * powered off. | |
77 | */ | |
78 | static void bcm2835_power_off(void) | |
79 | { | |
80 | u32 val; | |
81 | ||
82 | /* | |
83 | * We set the watchdog hard reset bit here to distinguish this reset | |
84 | * from the normal (full) reset. bootcode.bin will not reboot after a | |
85 | * hard reset. | |
86 | */ | |
87 | val = readl_relaxed(wdt_regs + PM_RSTS); | |
88 | val &= ~PM_RSTC_WRCFG_MASK; | |
89 | val |= PM_PASSWORD | PM_RSTS_HADWRH_SET; | |
90 | writel_relaxed(val, wdt_regs + PM_RSTS); | |
91 | ||
92 | /* Continue with normal reset mechanism */ | |
7b6d864b | 93 | bcm2835_restart(REBOOT_HARD, ""); |
45e9d77a DC |
94 | } |
95 | ||
ec9653b8 SA |
96 | static struct map_desc io_map __initdata = { |
97 | .virtual = BCM2835_PERIPH_VIRT, | |
98 | .pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS), | |
99 | .length = BCM2835_PERIPH_SIZE, | |
100 | .type = MT_DEVICE | |
101 | }; | |
102 | ||
dd3c7548 | 103 | static void __init bcm2835_map_io(void) |
ec9653b8 SA |
104 | { |
105 | iotable_init(&io_map, 1); | |
106 | } | |
107 | ||
dd3c7548 | 108 | static void __init bcm2835_init(void) |
ec9653b8 SA |
109 | { |
110 | int ret; | |
111 | ||
d0f1c7ff | 112 | bcm2835_setup_restart(); |
45e9d77a DC |
113 | if (wdt_regs) |
114 | pm_power_off = bcm2835_power_off; | |
115 | ||
75fabc3f SA |
116 | bcm2835_init_clocks(); |
117 | ||
ec9653b8 SA |
118 | ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, |
119 | NULL); | |
120 | if (ret) { | |
121 | pr_err("of_platform_populate failed: %d\n", ret); | |
122 | BUG(); | |
123 | } | |
124 | } | |
125 | ||
ec9653b8 SA |
126 | static const char * const bcm2835_compat[] = { |
127 | "brcm,bcm2835", | |
128 | NULL | |
129 | }; | |
130 | ||
131 | DT_MACHINE_START(BCM2835, "BCM2835") | |
132 | .map_io = bcm2835_map_io, | |
5702941e | 133 | .init_irq = irqchip_init, |
ec9653b8 | 134 | .init_machine = bcm2835_init, |
d0f1c7ff | 135 | .restart = bcm2835_restart, |
ec9653b8 SA |
136 | .dt_compat = bcm2835_compat |
137 | MACHINE_END |