[deliverable/linux.git] / arch / arm / mach-bcmring / core.c

/*
 *  derived from linux/arch/arm/mach-versatile/core.c
 *  linux/arch/arm/mach-bcmring/core.c
 *
 *  Copyright (C) 1999 - 2003 ARM Limited
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
/* Portions copyright Broadcom 2008 */

#include <linux/init.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/sysdev.h>
#include <linux/interrupt.h>
#include <linux/amba/bus.h>
#include <linux/clkdev.h>

#include <mach/csp/mm_addr.h>
#include <mach/hardware.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/timer-sp.h>
#include <asm/mach-types.h>

#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>

#include <cfg_global.h>

#include "clock.h"

#include <csp/secHw.h>
#include <mach/csp/secHw_def.h>
#include <mach/csp/chipcHw_inline.h>
#include <mach/csp/tmrHw_reg.h>

#define AMBA_DEVICE(name, initname, base, plat, size)       \
static struct amba_device name##_device = {     \
   .dev = {                                     \
      .coherent_dma_mask = ~0,                  \
      .init_name = initname,                    \
      .platform_data = plat                     \
   },                                           \
   .res = {                                     \
      .start = MM_ADDR_IO_##base,               \
		.end = MM_ADDR_IO_##base + (size) - 1,    \
      .flags = IORESOURCE_MEM                   \
   },                                           \
   .dma_mask = ~0,                              \
   .irq = {                                     \
      IRQ_##base                                \
   }                                            \
}


AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K);
AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K);

static struct clk pll1_clk = {
	.name = "PLL1",
	.type = CLK_TYPE_PRIMARY | CLK_TYPE_PLL1,
	.rate_hz = 2000000000,
	.use_cnt = 7,
};

static struct clk uart_clk = {
	.name = "UART",
	.type = CLK_TYPE_PROGRAMMABLE,
	.csp_id = chipcHw_CLOCK_UART,
	.rate_hz = HW_CFG_UART_CLK_HZ,
	.parent = &pll1_clk,
};

static struct clk dummy_apb_pclk = {
	.name = "BUSCLK",
	.type = CLK_TYPE_PRIMARY,
	.mode = CLK_MODE_XTAL,
};

/* Timer 0 - 25 MHz, Timer3 at bus clock rate, typically  150-166 MHz */
#if defined(CONFIG_ARCH_FPGA11107)
/* fpga cpu/bus are currently 30 times slower so scale frequency as well to */
/* slow down Linux's sense of time */
#define TIMER0_FREQUENCY_MHZ  (tmrHw_LOW_FREQUENCY_MHZ * 30)
#define TIMER1_FREQUENCY_MHZ  (tmrHw_LOW_FREQUENCY_MHZ * 30)
#define TIMER3_FREQUENCY_MHZ  (tmrHw_HIGH_FREQUENCY_MHZ * 30)
#define TIMER3_FREQUENCY_KHZ   (tmrHw_HIGH_FREQUENCY_HZ / 1000 * 30)
#else
#define TIMER0_FREQUENCY_MHZ  tmrHw_LOW_FREQUENCY_MHZ
#define TIMER1_FREQUENCY_MHZ  tmrHw_LOW_FREQUENCY_MHZ
#define TIMER3_FREQUENCY_MHZ  tmrHw_HIGH_FREQUENCY_MHZ
#define TIMER3_FREQUENCY_KHZ  (tmrHw_HIGH_FREQUENCY_HZ / 1000)
#endif

static struct clk sp804_timer012_clk = {
	.name = "sp804-timer-0,1,2",
	.type = CLK_TYPE_PRIMARY,
	.mode = CLK_MODE_XTAL,
	.rate_hz = TIMER1_FREQUENCY_MHZ * 1000000,
};

static struct clk sp804_timer3_clk = {
	.name = "sp804-timer-3",
	.type = CLK_TYPE_PRIMARY,
	.mode = CLK_MODE_XTAL,
	.rate_hz = TIMER3_FREQUENCY_KHZ * 1000,
};

static struct clk_lookup lookups[] = {
	{			/* Bus clock */
		.con_id = "apb_pclk",
		.clk = &dummy_apb_pclk,
	}, {			/* UART0 */
		.dev_id = "uarta",
		.clk = &uart_clk,
	}, {			/* UART1 */
		.dev_id = "uartb",
		.clk = &uart_clk,
	}, {			/* SP804 timer 0 */
		.dev_id = "sp804",
		.con_id = "timer0",
		.clk = &sp804_timer012_clk,
	}, {			/* SP804 timer 1 */
		.dev_id = "sp804",
		.con_id = "timer1",
		.clk = &sp804_timer012_clk,
	}, {			/* SP804 timer 3 */
		.dev_id = "sp804",
		.con_id = "timer3",
		.clk = &sp804_timer3_clk,
	}
};

static struct amba_device *amba_devs[] __initdata = {
	&uartA_device,
	&uartB_device,
};

void __init bcmring_amba_init(void)
{
	int i;
	u32 bus_clock;

/* Linux is run initially in non-secure mode. Secure peripherals */
/* generate FIQ, and must be handled in secure mode. Until we have */
/* a linux security monitor implementation, keep everything in */
/* non-secure mode. */
	chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_SPU);
	secHw_setUnsecure(secHw_BLK_MASK_CHIP_CONTROL |
			  secHw_BLK_MASK_KEY_SCAN |
			  secHw_BLK_MASK_TOUCH_SCREEN |
			  secHw_BLK_MASK_UART0 |
			  secHw_BLK_MASK_UART1 |
			  secHw_BLK_MASK_WATCHDOG |
			  secHw_BLK_MASK_SPUM |
			  secHw_BLK_MASK_DDR2 |
			  secHw_BLK_MASK_SPU |
			  secHw_BLK_MASK_PKA |
			  secHw_BLK_MASK_RNG |
			  secHw_BLK_MASK_RTC |
			  secHw_BLK_MASK_OTP |
			  secHw_BLK_MASK_BOOT |
			  secHw_BLK_MASK_MPU |
			  secHw_BLK_MASK_TZCTRL | secHw_BLK_MASK_INTR);

	/* Only the devices attached to the AMBA bus are enabled just before the bus is */
	/* scanned and the drivers are loaded. The clocks need to be on for the AMBA bus */
	/* driver to access these blocks. The bus is probed, and the drivers are loaded. */
	/* FIXME Need to remove enable of PIF once CLCD clock enable used properly in FPGA. */
	bus_clock = chipcHw_REG_BUS_CLOCK_GE
	    | chipcHw_REG_BUS_CLOCK_SDIO0 | chipcHw_REG_BUS_CLOCK_SDIO1;

	chipcHw_busInterfaceClockEnable(bus_clock);

	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
		struct amba_device *d = amba_devs[i];
		amba_device_register(d, &iomem_resource);
	}
}

/*
 * Where is the timer (VA)?
 */
#define TIMER0_VA_BASE		((void __iomem *)MM_IO_BASE_TMR)
#define TIMER1_VA_BASE		((void __iomem *)(MM_IO_BASE_TMR + 0x20))
#define TIMER2_VA_BASE		((void __iomem *)(MM_IO_BASE_TMR + 0x40))
#define TIMER3_VA_BASE          ((void __iomem *)(MM_IO_BASE_TMR + 0x60))

static int __init bcmring_clocksource_init(void)
{
	/* setup timer1 as free-running clocksource */
	sp804_clocksource_init(TIMER1_VA_BASE, "timer1");

	/* setup timer3 as free-running clocksource */
	sp804_clocksource_init(TIMER3_VA_BASE, "timer3");

	return 0;
}

/*
 * Set up timer interrupt, and return the current time in seconds.
 */
void __init bcmring_init_timer(void)
{
	printk(KERN_INFO "bcmring_init_timer\n");
	/*
	 * Initialise to a known state (all timers off)
	 */
	writel(0, TIMER0_VA_BASE + TIMER_CTRL);
	writel(0, TIMER1_VA_BASE + TIMER_CTRL);
	writel(0, TIMER2_VA_BASE + TIMER_CTRL);
	writel(0, TIMER3_VA_BASE + TIMER_CTRL);

	/*
	 * Make irqs happen for the system timer
	 */
	bcmring_clocksource_init();

	sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
}

struct sys_timer bcmring_timer = {
	.init = bcmring_init_timer,
};

void __init bcmring_init_early(void)
{
	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
}
Commit	Line	Data
278a6752 LC	1	/*
	2	* derived from linux/arch/arm/mach-versatile/core.c
	3	* linux/arch/arm/mach-bcmring/core.c
	4	*
	5	* Copyright (C) 1999 - 2003 ARM Limited
	6	* Copyright (C) 2000 Deep Blue Solutions Ltd
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*/
	22	/* Portions copyright Broadcom 2008 */
	23
	24	#include <linux/init.h>
	25	#include <linux/device.h>
	26	#include <linux/dma-mapping.h>
	27	#include <linux/platform_device.h>
	28	#include <linux/sysdev.h>
	29	#include <linux/interrupt.h>
	30	#include <linux/amba/bus.h>
6d803ba7	31	#include <linux/clkdev.h>
278a6752	32
278a6752 LC	33	#include <mach/csp/mm_addr.h>
278a6752 LC	34	#include <mach/hardware.h>
278a6752 LC	35	#include <linux/io.h>
	36	#include <asm/irq.h>
	37	#include <asm/hardware/arm_timer.h>
82d63734	38	#include <asm/hardware/timer-sp.h>
278a6752 LC	39	#include <asm/mach-types.h>
	40
	41	#include <asm/mach/arch.h>
	42	#include <asm/mach/flash.h>
	43	#include <asm/mach/irq.h>
	44	#include <asm/mach/time.h>
	45	#include <asm/mach/map.h>
278a6752 LC	46
	47	#include <cfg_global.h>
	48
	49	#include "clock.h"
	50
	51	#include <csp/secHw.h>
	52	#include <mach/csp/secHw_def.h>
	53	#include <mach/csp/chipcHw_inline.h>
	54	#include <mach/csp/tmrHw_reg.h>
	55
	56	#define AMBA_DEVICE(name, initname, base, plat, size) \
	57	static struct amba_device name##_device = { \
	58	.dev = { \
	59	.coherent_dma_mask = ~0, \
	60	.init_name = initname, \
	61	.platform_data = plat \
	62	}, \
	63	.res = { \
	64	.start = MM_ADDR_IO_##base, \
	65	.end = MM_ADDR_IO_##base + (size) - 1, \
	66	.flags = IORESOURCE_MEM \
	67	}, \
	68	.dma_mask = ~0, \
	69	.irq = { \
	70	IRQ_##base \
	71	} \
	72	}
	73
	74
	75	AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K);
	76	AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K);
	77
	78	static struct clk pll1_clk = {
	79	.name = "PLL1",
	80	.type = CLK_TYPE_PRIMARY \| CLK_TYPE_PLL1,
	81	.rate_hz = 2000000000,
	82	.use_cnt = 7,
	83	};
	84
	85	static struct clk uart_clk = {
	86	.name = "UART",
	87	.type = CLK_TYPE_PROGRAMMABLE,
	88	.csp_id = chipcHw_CLOCK_UART,
	89	.rate_hz = HW_CFG_UART_CLK_HZ,
	90	.parent = &pll1_clk,
	91	};
	92
3126c7bc RK	93	static struct clk dummy_apb_pclk = {
	94	.name = "BUSCLK",
	95	.type = CLK_TYPE_PRIMARY,
	96	.mode = CLK_MODE_XTAL,
	97	};
	98
82d63734 RK	99	/* Timer 0 - 25 MHz, Timer3 at bus clock rate, typically 150-166 MHz */
	100	#if defined(CONFIG_ARCH_FPGA11107)
	101	/* fpga cpu/bus are currently 30 times slower so scale frequency as well to */
	102	/* slow down Linux's sense of time */
	103	#define TIMER0_FREQUENCY_MHZ (tmrHw_LOW_FREQUENCY_MHZ * 30)
	104	#define TIMER1_FREQUENCY_MHZ (tmrHw_LOW_FREQUENCY_MHZ * 30)
	105	#define TIMER3_FREQUENCY_MHZ (tmrHw_HIGH_FREQUENCY_MHZ * 30)
	106	#define TIMER3_FREQUENCY_KHZ (tmrHw_HIGH_FREQUENCY_HZ / 1000 * 30)
	107	#else
	108	#define TIMER0_FREQUENCY_MHZ tmrHw_LOW_FREQUENCY_MHZ
	109	#define TIMER1_FREQUENCY_MHZ tmrHw_LOW_FREQUENCY_MHZ
	110	#define TIMER3_FREQUENCY_MHZ tmrHw_HIGH_FREQUENCY_MHZ
	111	#define TIMER3_FREQUENCY_KHZ (tmrHw_HIGH_FREQUENCY_HZ / 1000)
	112	#endif
	113
e8765afe RK	114	static struct clk sp804_timer012_clk = {
e8765afe RK	115	.name = "sp804-timer-0,1,2",
82d63734 RK	116	.type = CLK_TYPE_PRIMARY,
	117	.mode = CLK_MODE_XTAL,
	118	.rate_hz = TIMER1_FREQUENCY_MHZ * 1000000,
	119	};
	120
	121	static struct clk sp804_timer3_clk = {
	122	.name = "sp804-timer-3",
	123	.type = CLK_TYPE_PRIMARY,
	124	.mode = CLK_MODE_XTAL,
	125	.rate_hz = TIMER3_FREQUENCY_KHZ * 1000,
	126	};
	127
278a6752	128	static struct clk_lookup lookups[] = {
3126c7bc RK	129	{ /* Bus clock */
	130	.con_id = "apb_pclk",
	131	.clk = &dummy_apb_pclk,
	132	}, { /* UART0 */
	133	.dev_id = "uarta",
	134	.clk = &uart_clk,
	135	}, { /* UART1 */
	136	.dev_id = "uartb",
	137	.clk = &uart_clk,
e8765afe RK	138	}, { /* SP804 timer 0 */
	139	.dev_id = "sp804",
	140	.con_id = "timer0",
	141	.clk = &sp804_timer012_clk,
82d63734 RK	142	}, { /* SP804 timer 1 */
	143	.dev_id = "sp804",
	144	.con_id = "timer1",
e8765afe	145	.clk = &sp804_timer012_clk,
82d63734 RK	146	}, { /* SP804 timer 3 */
	147	.dev_id = "sp804",
	148	.con_id = "timer3",
	149	.clk = &sp804_timer3_clk,
3126c7bc	150	}
278a6752 LC	151	};
	152
	153	static struct amba_device *amba_devs[] __initdata = {
	154	&uartA_device,
	155	&uartB_device,
	156	};
	157
	158	void __init bcmring_amba_init(void)
	159	{
	160	int i;
	161	u32 bus_clock;
	162
	163	/* Linux is run initially in non-secure mode. Secure peripherals */
	164	/* generate FIQ, and must be handled in secure mode. Until we have */
	165	/* a linux security monitor implementation, keep everything in */
	166	/* non-secure mode. */
	167	chipcHw_busInterfaceClockEnable(chipcHw_REG_BUS_CLOCK_SPU);
	168	secHw_setUnsecure(secHw_BLK_MASK_CHIP_CONTROL \|
	169	secHw_BLK_MASK_KEY_SCAN \|
	170	secHw_BLK_MASK_TOUCH_SCREEN \|
	171	secHw_BLK_MASK_UART0 \|
	172	secHw_BLK_MASK_UART1 \|
	173	secHw_BLK_MASK_WATCHDOG \|
	174	secHw_BLK_MASK_SPUM \|
	175	secHw_BLK_MASK_DDR2 \|
	176	secHw_BLK_MASK_SPU \|
	177	secHw_BLK_MASK_PKA \|
	178	secHw_BLK_MASK_RNG \|
	179	secHw_BLK_MASK_RTC \|
	180	secHw_BLK_MASK_OTP \|
	181	secHw_BLK_MASK_BOOT \|
	182	secHw_BLK_MASK_MPU \|
	183	secHw_BLK_MASK_TZCTRL \| secHw_BLK_MASK_INTR);
	184
	185	/* Only the devices attached to the AMBA bus are enabled just before the bus is */
	186	/* scanned and the drivers are loaded. The clocks need to be on for the AMBA bus */
	187	/* driver to access these blocks. The bus is probed, and the drivers are loaded. */
	188	/* FIXME Need to remove enable of PIF once CLCD clock enable used properly in FPGA. */
	189	bus_clock = chipcHw_REG_BUS_CLOCK_GE
	190	\| chipcHw_REG_BUS_CLOCK_SDIO0 \| chipcHw_REG_BUS_CLOCK_SDIO1;
	191
	192	chipcHw_busInterfaceClockEnable(bus_clock);
	193
278a6752 LC	194	for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
	195	struct amba_device *d = amba_devs[i];
	196	amba_device_register(d, &iomem_resource);
	197	}
	198	}
	199
	200	/*
	201	* Where is the timer (VA)?
	202	*/
82d63734 RK	203	#define TIMER0_VA_BASE ((void __iomem *)MM_IO_BASE_TMR)
	204	#define TIMER1_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x20))
	205	#define TIMER2_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x40))
	206	#define TIMER3_VA_BASE ((void __iomem *)(MM_IO_BASE_TMR + 0x60))
278a6752	207
278a6752 LC	208	static int __init bcmring_clocksource_init(void)
	209	{
	210	/* setup timer1 as free-running clocksource */
82d63734	211	sp804_clocksource_init(TIMER1_VA_BASE, "timer1");
278a6752 LC	212
278a6752 LC	213	/* setup timer3 as free-running clocksource */
82d63734	214	sp804_clocksource_init(TIMER3_VA_BASE, "timer3");
278a6752 LC	215
	216	return 0;
	217	}
	218
	219	/*
	220	* Set up timer interrupt, and return the current time in seconds.
	221	*/
	222	void __init bcmring_init_timer(void)
	223	{
	224	printk(KERN_INFO "bcmring_init_timer\n");
	225	/*
	226	* Initialise to a known state (all timers off)
	227	*/
	228	writel(0, TIMER0_VA_BASE + TIMER_CTRL);
	229	writel(0, TIMER1_VA_BASE + TIMER_CTRL);
	230	writel(0, TIMER2_VA_BASE + TIMER_CTRL);
	231	writel(0, TIMER3_VA_BASE + TIMER_CTRL);
	232
	233	/*
	234	* Make irqs happen for the system timer
	235	*/
278a6752 LC	236	bcmring_clocksource_init();
278a6752 LC	237
8658ca73	238	sp804_clockevents_init(TIMER0_VA_BASE, IRQ_TIMER0, "timer0");
278a6752 LC	239	}
	240
	241	struct sys_timer bcmring_timer = {
	242	.init = bcmring_init_timer,
	243	};
ede2e234 JZ	244
	245	void __init bcmring_init_early(void)
	246	{
	247	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
	248	}