projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * AUTCPU12 specific defines | |
| 3 | * | |
| 4 | * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de> | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License as published by | |
| 8 | * the Free Software Foundation; either version 2 of the License, or | |
| 9 | * (at your option) any later version. | |
| 10 | * | |
| 11 | * This program is distributed in the hope that it will be useful, | |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | * GNU General Public License for more details. | |
| 15 | * | |
| 16 | * You should have received a copy of the GNU General Public License | |
| 17 | * along with this program; if not, write to the Free Software | |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 19 | */ | |
| 20 | #ifndef __ASM_ARCH_AUTCPU12_H | |
| 21 | #define __ASM_ARCH_AUTCPU12_H | |
| 22 | ||
| 1da177e4 LT |
23 | /* |
| 24 | * The flash bank is wired to chip select 0 | |
| 25 | */ | |
| 26 | #define AUTCPU12_PHYS_FLASH CS0_PHYS_BASE /* physical */ | |
| 27 | ||
| 28 | /* offset for device specific information structure */ | |
| 29 | #define AUTCPU12_LCDINFO_OFFS (0x00010000) | |
| 6cb1b145 AS |
30 | |
| 31 | /* Videomemory in the internal SRAM (CS 6) */ | |
| 1da177e4 | 32 | #define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE |
| 1da177e4 LT |
33 | |
| 34 | /* | |
| 35 | * All special IO's are tied to CS1 | |
| 36 | */ | |
| 37 | #define AUTCPU12_PHYS_CHAR_LCD CS1_PHYS_BASE +0x00000000 /* physical */ | |
| 38 | ||
| 39 | #define AUTCPU12_PHYS_NVRAM CS1_PHYS_BASE +0x02000000 /* physical */ | |
| 40 | ||
| 41 | #define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */ | |
| 42 | ||
| 43 | #define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */ | |
| 44 | ||
| 45 | #define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */ | |
| 46 | ||
| 47 | #define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */ | |
| 48 | ||
| 49 | #define AUTCPU12_PHYS_IO CS1_PHYS_BASE +0x0C000000 /* physical */ | |
| 50 | ||
| 51 | #define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */ | |
| 52 | ||
| 53 | /* | |
| 54 | * defines for smartmedia card access | |
| 55 | */ | |
| 56 | #define AUTCPU12_SMC_RDY (1<<2) | |
| 57 | #define AUTCPU12_SMC_ALE (1<<3) | |
| 58 | #define AUTCPU12_SMC_CLE (1<<4) | |
| 59 | #define AUTCPU12_SMC_PORT_OFFSET PBDR | |
| 60 | #define AUTCPU12_SMC_SELECT_OFFSET 0x10 | |
| 61 | /* | |
| 62 | * defines for lcd contrast | |
| 63 | */ | |
| 64 | #define AUTCPU12_DPOT_PORT_OFFSET PEDR | |
| 65 | #define AUTCPU12_DPOT_CS (1<<0) | |
| 66 | #define AUTCPU12_DPOT_CLK (1<<1) | |
| 67 | #define AUTCPU12_DPOT_UD (1<<2) | |
| 68 | ||
| 69 | #endif |