Commit | Line | Data |
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8593790d MG |
1 | /* |
2 | * TI DA830/OMAP L137 EVM board | |
3 | * | |
4 | * Author: Mark A. Greer <mgreer@mvista.com> | |
5 | * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c | |
6 | * | |
7 | * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under | |
8 | * the terms of the GNU General Public License version 2. This program | |
9 | * is licensed "as is" without any warranty of any kind, whether express | |
10 | * or implied. | |
11 | */ | |
12 | #include <linux/kernel.h> | |
8593790d MG |
13 | #include <linux/init.h> |
14 | #include <linux/console.h> | |
0e9a3ddc | 15 | #include <linux/interrupt.h> |
13e1f044 | 16 | #include <linux/gpio.h> |
733975a3 | 17 | #include <linux/platform_device.h> |
8593790d | 18 | #include <linux/i2c.h> |
13e1f044 | 19 | #include <linux/i2c/pcf857x.h> |
25f73ed5 | 20 | #include <linux/platform_data/at24.h> |
733975a3 DG |
21 | #include <linux/mtd/mtd.h> |
22 | #include <linux/mtd/partitions.h> | |
16a3c832 SN |
23 | #include <linux/spi/spi.h> |
24 | #include <linux/spi/flash.h> | |
b856671e PA |
25 | #include <linux/platform_data/gpio-davinci.h> |
26 | #include <linux/platform_data/mtd-davinci.h> | |
27 | #include <linux/platform_data/mtd-davinci-aemif.h> | |
28 | #include <linux/platform_data/spi-davinci.h> | |
29 | #include <linux/platform_data/usb-davinci.h> | |
8593790d MG |
30 | |
31 | #include <asm/mach-types.h> | |
32 | #include <asm/mach/arch.h> | |
33 | ||
b856671e | 34 | #include <mach/common.h> |
3acf731c | 35 | #include "cp_intc.h" |
32bf078c | 36 | #include <mach/mux.h> |
8593790d MG |
37 | #include <mach/da8xx.h> |
38 | ||
782f2d78 | 39 | #define DA830_EVM_PHY_ID "" |
0e9a3ddc SS |
40 | /* |
41 | * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4]. | |
42 | */ | |
43 | #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15) | |
44 | #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4) | |
45 | ||
46 | static const short da830_evm_usb11_pins[] = { | |
47 | DA830_GPIO1_15, DA830_GPIO2_4, | |
48 | -1 | |
49 | }; | |
50 | ||
51 | static da8xx_ocic_handler_t da830_evm_usb_ocic_handler; | |
52 | ||
53 | static int da830_evm_usb_set_power(unsigned port, int on) | |
54 | { | |
55 | gpio_set_value(ON_BD_USB_DRV, on); | |
56 | return 0; | |
57 | } | |
58 | ||
59 | static int da830_evm_usb_get_power(unsigned port) | |
60 | { | |
61 | return gpio_get_value(ON_BD_USB_DRV); | |
62 | } | |
63 | ||
64 | static int da830_evm_usb_get_oci(unsigned port) | |
65 | { | |
66 | return !gpio_get_value(ON_BD_USB_OVC); | |
67 | } | |
68 | ||
69 | static irqreturn_t da830_evm_usb_ocic_irq(int, void *); | |
70 | ||
71 | static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler) | |
72 | { | |
73 | int irq = gpio_to_irq(ON_BD_USB_OVC); | |
74 | int error = 0; | |
75 | ||
76 | if (handler != NULL) { | |
77 | da830_evm_usb_ocic_handler = handler; | |
78 | ||
1091a654 | 79 | error = request_irq(irq, da830_evm_usb_ocic_irq, |
0e9a3ddc SS |
80 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
81 | "OHCI over-current indicator", NULL); | |
82 | if (error) | |
a7ca2bcf JP |
83 | pr_err("%s: could not request IRQ to watch over-current indicator changes\n", |
84 | __func__); | |
0e9a3ddc SS |
85 | } else |
86 | free_irq(irq, NULL); | |
87 | ||
88 | return error; | |
89 | } | |
90 | ||
91 | static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = { | |
92 | .set_power = da830_evm_usb_set_power, | |
93 | .get_power = da830_evm_usb_get_power, | |
94 | .get_oci = da830_evm_usb_get_oci, | |
95 | .ocic_notify = da830_evm_usb_ocic_notify, | |
96 | ||
97 | /* TPS2065 switch @ 5V */ | |
98 | .potpgt = (3 + 1) / 2, /* 3 ms max */ | |
99 | }; | |
100 | ||
101 | static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id) | |
102 | { | |
103 | da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1); | |
104 | return IRQ_HANDLED; | |
105 | } | |
106 | ||
107 | static __init void da830_evm_usb_init(void) | |
108 | { | |
109 | u32 cfgchip2; | |
110 | int ret; | |
111 | ||
112 | /* | |
113 | * Set up USB clock/mode in the CFGCHIP2 register. | |
114 | * FYI: CFGCHIP2 is 0x0000ef00 initially. | |
115 | */ | |
d2de0582 | 116 | cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); |
0e9a3ddc SS |
117 | |
118 | /* USB2.0 PHY reference clock is 24 MHz */ | |
119 | cfgchip2 &= ~CFGCHIP2_REFFREQ; | |
120 | cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; | |
121 | ||
122 | /* | |
123 | * Select internal reference clock for USB 2.0 PHY | |
124 | * and use it as a clock source for USB 1.1 PHY | |
125 | * (this is the default setting anyway). | |
126 | */ | |
127 | cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX; | |
128 | cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX; | |
129 | ||
ca6a272a SS |
130 | /* |
131 | * We have to override VBUS/ID signals when MUSB is configured into the | |
132 | * host-only mode -- ID pin will float if no cable is connected, so the | |
133 | * controller won't be able to drive VBUS thinking that it's a B-device. | |
134 | * Otherwise, we want to use the OTG mode and enable VBUS comparators. | |
135 | */ | |
136 | cfgchip2 &= ~CFGCHIP2_OTGMODE; | |
137 | #ifdef CONFIG_USB_MUSB_HOST | |
138 | cfgchip2 |= CFGCHIP2_FORCE_HOST; | |
139 | #else | |
140 | cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN; | |
141 | #endif | |
142 | ||
d2de0582 | 143 | __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); |
0e9a3ddc | 144 | |
ca6a272a SS |
145 | /* USB_REFCLKIN is not used. */ |
146 | ret = davinci_cfg_reg(DA830_USB0_DRVVBUS); | |
147 | if (ret) | |
a7ca2bcf | 148 | pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret); |
ca6a272a SS |
149 | else { |
150 | /* | |
151 | * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A), | |
152 | * with the power on to power good time of 3 ms. | |
153 | */ | |
154 | ret = da8xx_register_usb20(1000, 3); | |
155 | if (ret) | |
a7ca2bcf JP |
156 | pr_warn("%s: USB 2.0 registration failed: %d\n", |
157 | __func__, ret); | |
ca6a272a SS |
158 | } |
159 | ||
3821d10a | 160 | ret = davinci_cfg_reg_list(da830_evm_usb11_pins); |
0e9a3ddc | 161 | if (ret) { |
a7ca2bcf | 162 | pr_warn("%s: USB 1.1 PinMux setup failed: %d\n", __func__, ret); |
0e9a3ddc SS |
163 | return; |
164 | } | |
165 | ||
166 | ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV"); | |
167 | if (ret) { | |
a7ca2bcf JP |
168 | pr_err("%s: failed to request GPIO for USB 1.1 port power control: %d\n", |
169 | __func__, ret); | |
0e9a3ddc SS |
170 | return; |
171 | } | |
172 | gpio_direction_output(ON_BD_USB_DRV, 0); | |
173 | ||
174 | ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC"); | |
175 | if (ret) { | |
a7ca2bcf JP |
176 | pr_err("%s: failed to request GPIO for USB 1.1 port over-current indicator: %d\n", |
177 | __func__, ret); | |
0e9a3ddc SS |
178 | return; |
179 | } | |
180 | gpio_direction_input(ON_BD_USB_OVC); | |
181 | ||
182 | ret = da8xx_register_usb11(&da830_evm_usb11_pdata); | |
183 | if (ret) | |
a7ca2bcf | 184 | pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret); |
0e9a3ddc SS |
185 | } |
186 | ||
32bf078c MG |
187 | static const short da830_evm_mcasp1_pins[] = { |
188 | DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1, | |
189 | DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5, | |
190 | DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10, | |
191 | DA830_AXR1_11, | |
192 | -1 | |
193 | }; | |
194 | ||
e33ef5e3 C |
195 | static u8 da830_iis_serializer_direction[] = { |
196 | RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
197 | INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
198 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
199 | }; | |
200 | ||
201 | static struct snd_platform_data da830_evm_snd_data = { | |
202 | .tx_dma_offset = 0x2000, | |
203 | .rx_dma_offset = 0x2000, | |
204 | .op_mode = DAVINCI_MCASP_IIS_MODE, | |
205 | .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction), | |
206 | .tdm_slots = 2, | |
207 | .serial_dir = da830_iis_serializer_direction, | |
48519f0a | 208 | .asp_chan_q = EVENTQ_0, |
e33ef5e3 C |
209 | .version = MCASP_VERSION_2, |
210 | .txnumevt = 1, | |
211 | .rxnumevt = 1, | |
212 | }; | |
213 | ||
2eb30c81 DG |
214 | /* |
215 | * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS. | |
216 | */ | |
217 | static const short da830_evm_mmc_sd_pins[] = { | |
218 | DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2, | |
219 | DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5, | |
220 | DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK, | |
221 | DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2, | |
222 | -1 | |
223 | }; | |
224 | ||
225 | #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1) | |
8ccfd3f0 | 226 | #define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2) |
2eb30c81 DG |
227 | |
228 | static int da830_evm_mmc_get_ro(int index) | |
229 | { | |
230 | return gpio_get_value(DA830_MMCSD_WP_PIN); | |
231 | } | |
232 | ||
8ccfd3f0 VB |
233 | static int da830_evm_mmc_get_cd(int index) |
234 | { | |
235 | return !gpio_get_value(DA830_MMCSD_CD_PIN); | |
236 | } | |
237 | ||
2eb30c81 DG |
238 | static struct davinci_mmc_config da830_evm_mmc_config = { |
239 | .get_ro = da830_evm_mmc_get_ro, | |
8ccfd3f0 | 240 | .get_cd = da830_evm_mmc_get_cd, |
d154fed7 | 241 | .wires = 8, |
0046d0bf C |
242 | .max_freq = 50000000, |
243 | .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, | |
2eb30c81 DG |
244 | }; |
245 | ||
246 | static inline void da830_evm_init_mmc(void) | |
247 | { | |
248 | int ret; | |
249 | ||
3821d10a | 250 | ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins); |
2eb30c81 | 251 | if (ret) { |
a7ca2bcf | 252 | pr_warn("%s: mmc/sd mux setup failed: %d\n", __func__, ret); |
2eb30c81 DG |
253 | return; |
254 | } | |
255 | ||
256 | ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP"); | |
257 | if (ret) { | |
a7ca2bcf JP |
258 | pr_warn("%s: can not open GPIO %d\n", |
259 | __func__, DA830_MMCSD_WP_PIN); | |
2eb30c81 DG |
260 | return; |
261 | } | |
262 | gpio_direction_input(DA830_MMCSD_WP_PIN); | |
263 | ||
8ccfd3f0 VB |
264 | ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n"); |
265 | if (ret) { | |
a7ca2bcf JP |
266 | pr_warn("%s: can not open GPIO %d\n", |
267 | __func__, DA830_MMCSD_CD_PIN); | |
8ccfd3f0 VB |
268 | return; |
269 | } | |
270 | gpio_direction_input(DA830_MMCSD_CD_PIN); | |
271 | ||
2eb30c81 DG |
272 | ret = da8xx_register_mmcsd0(&da830_evm_mmc_config); |
273 | if (ret) { | |
a7ca2bcf | 274 | pr_warn("%s: mmc/sd registration failed: %d\n", __func__, ret); |
2eb30c81 DG |
275 | gpio_free(DA830_MMCSD_WP_PIN); |
276 | } | |
277 | } | |
278 | ||
a0433ac3 SN |
279 | /* |
280 | * UI board NAND/NOR flashes only use 8-bit data bus. | |
281 | */ | |
282 | static const short da830_evm_emif25_pins[] = { | |
283 | DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3, | |
284 | DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7, | |
285 | DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3, | |
286 | DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7, | |
287 | DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11, | |
288 | DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE, | |
289 | DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0, | |
290 | -1 | |
291 | }; | |
292 | ||
a0a56db9 | 293 | #define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI) |
b5ebe4e1 | 294 | |
733975a3 DG |
295 | #ifdef CONFIG_DA830_UI_NAND |
296 | static struct mtd_partition da830_evm_nand_partitions[] = { | |
297 | /* bootloader (U-Boot, etc) in first sector */ | |
298 | [0] = { | |
299 | .name = "bootloader", | |
300 | .offset = 0, | |
301 | .size = SZ_128K, | |
302 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
303 | }, | |
304 | /* bootloader params in the next sector */ | |
305 | [1] = { | |
306 | .name = "params", | |
307 | .offset = MTDPART_OFS_APPEND, | |
308 | .size = SZ_128K, | |
309 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
310 | }, | |
311 | /* kernel */ | |
312 | [2] = { | |
313 | .name = "kernel", | |
314 | .offset = MTDPART_OFS_APPEND, | |
315 | .size = SZ_2M, | |
316 | .mask_flags = 0, | |
317 | }, | |
318 | /* file system */ | |
319 | [3] = { | |
320 | .name = "filesystem", | |
321 | .offset = MTDPART_OFS_APPEND, | |
322 | .size = MTDPART_SIZ_FULL, | |
323 | .mask_flags = 0, | |
324 | } | |
325 | }; | |
326 | ||
327 | /* flash bbt decriptors */ | |
328 | static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' }; | |
329 | static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' }; | |
330 | ||
331 | static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = { | |
332 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | | |
333 | NAND_BBT_WRITE | NAND_BBT_2BIT | | |
334 | NAND_BBT_VERSION | NAND_BBT_PERCHIP, | |
335 | .offs = 2, | |
336 | .len = 4, | |
337 | .veroffs = 16, | |
338 | .maxblocks = 4, | |
339 | .pattern = da830_evm_nand_bbt_pattern | |
340 | }; | |
341 | ||
342 | static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = { | |
343 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | | |
344 | NAND_BBT_WRITE | NAND_BBT_2BIT | | |
345 | NAND_BBT_VERSION | NAND_BBT_PERCHIP, | |
346 | .offs = 2, | |
347 | .len = 4, | |
348 | .veroffs = 16, | |
349 | .maxblocks = 4, | |
350 | .pattern = da830_evm_nand_mirror_pattern | |
351 | }; | |
352 | ||
217f1366 SR |
353 | static struct davinci_aemif_timing da830_evm_nandflash_timing = { |
354 | .wsetup = 24, | |
355 | .wstrobe = 21, | |
356 | .whold = 14, | |
357 | .rsetup = 19, | |
358 | .rstrobe = 50, | |
359 | .rhold = 0, | |
360 | .ta = 20, | |
361 | }; | |
362 | ||
733975a3 DG |
363 | static struct davinci_nand_pdata da830_evm_nand_pdata = { |
364 | .parts = da830_evm_nand_partitions, | |
365 | .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions), | |
366 | .ecc_mode = NAND_ECC_HW, | |
367 | .ecc_bits = 4, | |
bb9ebd4e | 368 | .bbt_options = NAND_BBT_USE_FLASH, |
733975a3 DG |
369 | .bbt_td = &da830_evm_nand_bbt_main_descr, |
370 | .bbt_md = &da830_evm_nand_bbt_mirror_descr, | |
217f1366 | 371 | .timing = &da830_evm_nandflash_timing, |
733975a3 DG |
372 | }; |
373 | ||
374 | static struct resource da830_evm_nand_resources[] = { | |
375 | [0] = { /* First memory resource is NAND I/O window */ | |
002cb2d2 SS |
376 | .start = DA8XX_AEMIF_CS3_BASE, |
377 | .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1, | |
733975a3 DG |
378 | .flags = IORESOURCE_MEM, |
379 | }, | |
380 | [1] = { /* Second memory resource is AEMIF control registers */ | |
002cb2d2 SS |
381 | .start = DA8XX_AEMIF_CTL_BASE, |
382 | .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, | |
733975a3 DG |
383 | .flags = IORESOURCE_MEM, |
384 | }, | |
385 | }; | |
386 | ||
387 | static struct platform_device da830_evm_nand_device = { | |
388 | .name = "davinci_nand", | |
389 | .id = 1, | |
390 | .dev = { | |
391 | .platform_data = &da830_evm_nand_pdata, | |
392 | }, | |
393 | .num_resources = ARRAY_SIZE(da830_evm_nand_resources), | |
394 | .resource = da830_evm_nand_resources, | |
395 | }; | |
a0433ac3 | 396 | |
77316f05 | 397 | static inline void da830_evm_init_nand(int mux_mode) |
a0433ac3 SN |
398 | { |
399 | int ret; | |
400 | ||
b5ebe4e1 | 401 | if (HAS_MMC) { |
a7ca2bcf JP |
402 | pr_warn("WARNING: both MMC/SD and NAND are enabled, but they share AEMIF pins\n" |
403 | "\tDisable MMC/SD for NAND support\n"); | |
b5ebe4e1 SN |
404 | return; |
405 | } | |
406 | ||
3821d10a | 407 | ret = davinci_cfg_reg_list(da830_evm_emif25_pins); |
a0433ac3 | 408 | if (ret) |
a7ca2bcf | 409 | pr_warn("%s: emif25 mux setup failed: %d\n", __func__, ret); |
a0433ac3 SN |
410 | |
411 | ret = platform_device_register(&da830_evm_nand_device); | |
412 | if (ret) | |
a7ca2bcf | 413 | pr_warn("%s: NAND device not registered\n", __func__); |
77316f05 | 414 | |
67f5185c | 415 | if (davinci_aemif_setup(&da830_evm_nand_device)) |
a7ca2bcf | 416 | pr_warn("%s: Cannot configure AEMIF\n", __func__); |
67f5185c | 417 | |
77316f05 | 418 | gpio_direction_output(mux_mode, 1); |
a0433ac3 SN |
419 | } |
420 | #else | |
77316f05 | 421 | static inline void da830_evm_init_nand(int mux_mode) { } |
733975a3 DG |
422 | #endif |
423 | ||
a0433ac3 | 424 | #ifdef CONFIG_DA830_UI_LCD |
77316f05 | 425 | static inline void da830_evm_init_lcdc(int mux_mode) |
a0433ac3 SN |
426 | { |
427 | int ret; | |
428 | ||
3821d10a | 429 | ret = davinci_cfg_reg_list(da830_lcdcntl_pins); |
a0433ac3 | 430 | if (ret) |
a7ca2bcf | 431 | pr_warn("%s: lcdcntl mux setup failed: %d\n", __func__, ret); |
a0433ac3 SN |
432 | |
433 | ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata); | |
434 | if (ret) | |
a7ca2bcf | 435 | pr_warn("%s: lcd setup failed: %d\n", __func__, ret); |
77316f05 SN |
436 | |
437 | gpio_direction_output(mux_mode, 0); | |
a0433ac3 SN |
438 | } |
439 | #else | |
77316f05 | 440 | static inline void da830_evm_init_lcdc(int mux_mode) { } |
a0433ac3 | 441 | #endif |
733975a3 | 442 | |
77316f05 SN |
443 | static struct at24_platform_data da830_evm_i2c_eeprom_info = { |
444 | .byte_len = SZ_256K / 8, | |
445 | .page_size = 64, | |
446 | .flags = AT24_FLAG_ADDR16, | |
447 | .setup = davinci_get_mac_addr, | |
448 | .context = (void *)0x7f00, | |
449 | }; | |
450 | ||
1ef203c3 SR |
451 | static int __init da830_evm_ui_expander_setup(struct i2c_client *client, |
452 | int gpio, unsigned ngpio, void *context) | |
77316f05 SN |
453 | { |
454 | gpio_request(gpio + 6, "UI MUX_MODE"); | |
455 | ||
b5ebe4e1 SN |
456 | /* Drive mux mode low to match the default without UI card */ |
457 | gpio_direction_output(gpio + 6, 0); | |
458 | ||
77316f05 SN |
459 | da830_evm_init_lcdc(gpio + 6); |
460 | ||
461 | da830_evm_init_nand(gpio + 6); | |
462 | ||
463 | return 0; | |
464 | } | |
465 | ||
466 | static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio, | |
467 | unsigned ngpio, void *context) | |
468 | { | |
469 | gpio_free(gpio + 6); | |
470 | return 0; | |
471 | } | |
472 | ||
1ef203c3 | 473 | static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = { |
77316f05 SN |
474 | .gpio_base = DAVINCI_N_GPIO, |
475 | .setup = da830_evm_ui_expander_setup, | |
476 | .teardown = da830_evm_ui_expander_teardown, | |
477 | }; | |
478 | ||
479 | static struct i2c_board_info __initdata da830_evm_i2c_devices[] = { | |
480 | { | |
481 | I2C_BOARD_INFO("24c256", 0x50), | |
482 | .platform_data = &da830_evm_i2c_eeprom_info, | |
483 | }, | |
484 | { | |
485 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
486 | }, | |
487 | { | |
488 | I2C_BOARD_INFO("pcf8574", 0x3f), | |
489 | .platform_data = &da830_evm_ui_expander_info, | |
490 | }, | |
491 | }; | |
492 | ||
493 | static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = { | |
494 | .bus_freq = 100, /* kHz */ | |
495 | .bus_delay = 0, /* usec */ | |
496 | }; | |
497 | ||
a941c503 RS |
498 | /* |
499 | * The following EDMA channels/slots are not being used by drivers (for | |
500 | * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence | |
501 | * they are being reserved for codecs on the DSP side. | |
502 | */ | |
503 | static const s16 da830_dma_rsv_chans[][2] = { | |
504 | /* (offset, number) */ | |
505 | { 8, 2}, | |
506 | {12, 2}, | |
507 | {24, 4}, | |
508 | {30, 2}, | |
509 | {-1, -1} | |
510 | }; | |
511 | ||
512 | static const s16 da830_dma_rsv_slots[][2] = { | |
513 | /* (offset, number) */ | |
514 | { 8, 2}, | |
515 | {12, 2}, | |
516 | {24, 4}, | |
517 | {30, 26}, | |
518 | {-1, -1} | |
519 | }; | |
520 | ||
521 | static struct edma_rsv_info da830_edma_rsv[] = { | |
522 | { | |
523 | .rsv_chans = da830_dma_rsv_chans, | |
524 | .rsv_slots = da830_dma_rsv_slots, | |
525 | }, | |
526 | }; | |
527 | ||
16a3c832 SN |
528 | static struct mtd_partition da830evm_spiflash_part[] = { |
529 | [0] = { | |
530 | .name = "DSP-UBL", | |
531 | .offset = 0, | |
532 | .size = SZ_8K, | |
533 | .mask_flags = MTD_WRITEABLE, | |
534 | }, | |
535 | [1] = { | |
536 | .name = "ARM-UBL", | |
537 | .offset = MTDPART_OFS_APPEND, | |
538 | .size = SZ_16K + SZ_8K, | |
539 | .mask_flags = MTD_WRITEABLE, | |
540 | }, | |
541 | [2] = { | |
542 | .name = "U-Boot", | |
543 | .offset = MTDPART_OFS_APPEND, | |
544 | .size = SZ_256K - SZ_32K, | |
545 | .mask_flags = MTD_WRITEABLE, | |
546 | }, | |
547 | [3] = { | |
548 | .name = "U-Boot-Environment", | |
549 | .offset = MTDPART_OFS_APPEND, | |
550 | .size = SZ_16K, | |
551 | .mask_flags = 0, | |
552 | }, | |
553 | [4] = { | |
554 | .name = "Kernel", | |
555 | .offset = MTDPART_OFS_APPEND, | |
556 | .size = MTDPART_SIZ_FULL, | |
557 | .mask_flags = 0, | |
558 | }, | |
559 | }; | |
560 | ||
561 | static struct flash_platform_data da830evm_spiflash_data = { | |
562 | .name = "m25p80", | |
563 | .parts = da830evm_spiflash_part, | |
564 | .nr_parts = ARRAY_SIZE(da830evm_spiflash_part), | |
565 | .type = "w25x32", | |
566 | }; | |
567 | ||
568 | static struct davinci_spi_config da830evm_spiflash_cfg = { | |
569 | .io_type = SPI_IO_TYPE_DMA, | |
570 | .c2tdelay = 8, | |
571 | .t2cdelay = 8, | |
572 | }; | |
573 | ||
574 | static struct spi_board_info da830evm_spi_info[] = { | |
575 | { | |
576 | .modalias = "m25p80", | |
577 | .platform_data = &da830evm_spiflash_data, | |
578 | .controller_data = &da830evm_spiflash_cfg, | |
579 | .mode = SPI_MODE_0, | |
580 | .max_speed_hz = 30000000, | |
581 | .bus_num = 0, | |
582 | .chip_select = 0, | |
583 | }, | |
584 | }; | |
585 | ||
8593790d MG |
586 | static __init void da830_evm_init(void) |
587 | { | |
588 | struct davinci_soc_info *soc_info = &davinci_soc_info; | |
589 | int ret; | |
590 | ||
b856671e PA |
591 | ret = da830_register_gpio(); |
592 | if (ret) | |
a7ca2bcf | 593 | pr_warn("%s: GPIO init failed: %d\n", __func__, ret); |
b856671e | 594 | |
a941c503 | 595 | ret = da830_register_edma(da830_edma_rsv); |
8593790d | 596 | if (ret) |
a7ca2bcf | 597 | pr_warn("%s: edma registration failed: %d\n", __func__, ret); |
8593790d | 598 | |
3821d10a | 599 | ret = davinci_cfg_reg_list(da830_i2c0_pins); |
8593790d | 600 | if (ret) |
a7ca2bcf | 601 | pr_warn("%s: i2c0 mux setup failed: %d\n", __func__, ret); |
8593790d MG |
602 | |
603 | ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata); | |
604 | if (ret) | |
a7ca2bcf | 605 | pr_warn("%s: i2c0 registration failed: %d\n", __func__, ret); |
8593790d | 606 | |
0e9a3ddc SS |
607 | da830_evm_usb_init(); |
608 | ||
8593790d | 609 | soc_info->emac_pdata->rmii_en = 1; |
782f2d78 | 610 | soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID; |
8593790d | 611 | |
3821d10a | 612 | ret = davinci_cfg_reg_list(da830_cpgmac_pins); |
8593790d | 613 | if (ret) |
a7ca2bcf | 614 | pr_warn("%s: cpgmac mux setup failed: %d\n", __func__, ret); |
8593790d MG |
615 | |
616 | ret = da8xx_register_emac(); | |
617 | if (ret) | |
a7ca2bcf | 618 | pr_warn("%s: emac registration failed: %d\n", __func__, ret); |
8593790d MG |
619 | |
620 | ret = da8xx_register_watchdog(); | |
621 | if (ret) | |
a7ca2bcf JP |
622 | pr_warn("%s: watchdog registration failed: %d\n", |
623 | __func__, ret); | |
8593790d | 624 | |
fcf7157b | 625 | davinci_serial_init(da8xx_serial_device); |
8593790d MG |
626 | i2c_register_board_info(1, da830_evm_i2c_devices, |
627 | ARRAY_SIZE(da830_evm_i2c_devices)); | |
e33ef5e3 | 628 | |
3821d10a | 629 | ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins); |
e33ef5e3 | 630 | if (ret) |
a7ca2bcf | 631 | pr_warn("%s: mcasp1 mux setup failed: %d\n", __func__, ret); |
e33ef5e3 | 632 | |
b8864aa4 | 633 | da8xx_register_mcasp(1, &da830_evm_snd_data); |
2eb30c81 DG |
634 | |
635 | da830_evm_init_mmc(); | |
13e1f044 | 636 | |
c51df70b MG |
637 | ret = da8xx_register_rtc(); |
638 | if (ret) | |
a7ca2bcf | 639 | pr_warn("%s: rtc setup failed: %d\n", __func__, ret); |
16a3c832 | 640 | |
0273612c VD |
641 | ret = spi_register_board_info(da830evm_spi_info, |
642 | ARRAY_SIZE(da830evm_spi_info)); | |
643 | if (ret) | |
a7ca2bcf JP |
644 | pr_warn("%s: spi info registration failed: %d\n", |
645 | __func__, ret); | |
0273612c VD |
646 | |
647 | ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info)); | |
16a3c832 | 648 | if (ret) |
a7ca2bcf | 649 | pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret); |
8593790d MG |
650 | } |
651 | ||
652 | #ifdef CONFIG_SERIAL_8250_CONSOLE | |
653 | static int __init da830_evm_console_init(void) | |
654 | { | |
1aa5f2a9 MW |
655 | if (!machine_is_davinci_da830_evm()) |
656 | return 0; | |
657 | ||
8593790d MG |
658 | return add_preferred_console("ttyS", 2, "115200"); |
659 | } | |
660 | console_initcall(da830_evm_console_init); | |
661 | #endif | |
662 | ||
8593790d MG |
663 | static void __init da830_evm_map_io(void) |
664 | { | |
665 | da830_init(); | |
666 | } | |
667 | ||
48ea89ea | 668 | MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM") |
e7e56014 | 669 | .atag_offset = 0x100, |
8593790d | 670 | .map_io = da830_evm_map_io, |
bd808947 | 671 | .init_irq = cp_intc_init, |
6bb27d73 | 672 | .init_time = davinci_timer_init, |
8593790d | 673 | .init_machine = da830_evm_init, |
3aa3e840 | 674 | .init_late = davinci_init_late, |
f68deabf | 675 | .dma_zone_size = SZ_128M, |
c6121ddd | 676 | .restart = da8xx_restart, |
8593790d | 677 | MACHINE_END |