ARM: shmobile: r8a7790: Add CMT devices to DT
[deliverable/linux.git] / arch / arm / mach-davinci / board-da830-evm.c
CommitLineData
8593790d
MG
1/*
2 * TI DA830/OMAP L137 EVM board
3 *
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
6 *
7 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12#include <linux/kernel.h>
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13#include <linux/init.h>
14#include <linux/console.h>
0e9a3ddc 15#include <linux/interrupt.h>
13e1f044 16#include <linux/gpio.h>
733975a3 17#include <linux/platform_device.h>
8593790d 18#include <linux/i2c.h>
13e1f044 19#include <linux/i2c/pcf857x.h>
25f73ed5 20#include <linux/platform_data/at24.h>
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21#include <linux/mtd/mtd.h>
22#include <linux/mtd/partitions.h>
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23#include <linux/spi/spi.h>
24#include <linux/spi/flash.h>
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25#include <linux/platform_data/gpio-davinci.h>
26#include <linux/platform_data/mtd-davinci.h>
27#include <linux/platform_data/mtd-davinci-aemif.h>
28#include <linux/platform_data/spi-davinci.h>
29#include <linux/platform_data/usb-davinci.h>
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30
31#include <asm/mach-types.h>
32#include <asm/mach/arch.h>
33
b856671e 34#include <mach/common.h>
8593790d 35#include <mach/cp_intc.h>
32bf078c 36#include <mach/mux.h>
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37#include <mach/da8xx.h>
38
782f2d78 39#define DA830_EVM_PHY_ID ""
0e9a3ddc
SS
40/*
41 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
42 */
43#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
44#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
45
46static const short da830_evm_usb11_pins[] = {
47 DA830_GPIO1_15, DA830_GPIO2_4,
48 -1
49};
50
51static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
52
53static int da830_evm_usb_set_power(unsigned port, int on)
54{
55 gpio_set_value(ON_BD_USB_DRV, on);
56 return 0;
57}
58
59static int da830_evm_usb_get_power(unsigned port)
60{
61 return gpio_get_value(ON_BD_USB_DRV);
62}
63
64static int da830_evm_usb_get_oci(unsigned port)
65{
66 return !gpio_get_value(ON_BD_USB_OVC);
67}
68
69static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
70
71static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
72{
73 int irq = gpio_to_irq(ON_BD_USB_OVC);
74 int error = 0;
75
76 if (handler != NULL) {
77 da830_evm_usb_ocic_handler = handler;
78
1091a654 79 error = request_irq(irq, da830_evm_usb_ocic_irq,
0e9a3ddc
SS
80 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
81 "OHCI over-current indicator", NULL);
82 if (error)
83 printk(KERN_ERR "%s: could not request IRQ to watch "
84 "over-current indicator changes\n", __func__);
85 } else
86 free_irq(irq, NULL);
87
88 return error;
89}
90
91static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
92 .set_power = da830_evm_usb_set_power,
93 .get_power = da830_evm_usb_get_power,
94 .get_oci = da830_evm_usb_get_oci,
95 .ocic_notify = da830_evm_usb_ocic_notify,
96
97 /* TPS2065 switch @ 5V */
98 .potpgt = (3 + 1) / 2, /* 3 ms max */
99};
100
101static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
102{
103 da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
104 return IRQ_HANDLED;
105}
106
107static __init void da830_evm_usb_init(void)
108{
109 u32 cfgchip2;
110 int ret;
111
112 /*
113 * Set up USB clock/mode in the CFGCHIP2 register.
114 * FYI: CFGCHIP2 is 0x0000ef00 initially.
115 */
d2de0582 116 cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
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117
118 /* USB2.0 PHY reference clock is 24 MHz */
119 cfgchip2 &= ~CFGCHIP2_REFFREQ;
120 cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
121
122 /*
123 * Select internal reference clock for USB 2.0 PHY
124 * and use it as a clock source for USB 1.1 PHY
125 * (this is the default setting anyway).
126 */
127 cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
128 cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
129
ca6a272a
SS
130 /*
131 * We have to override VBUS/ID signals when MUSB is configured into the
132 * host-only mode -- ID pin will float if no cable is connected, so the
133 * controller won't be able to drive VBUS thinking that it's a B-device.
134 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
135 */
136 cfgchip2 &= ~CFGCHIP2_OTGMODE;
137#ifdef CONFIG_USB_MUSB_HOST
138 cfgchip2 |= CFGCHIP2_FORCE_HOST;
139#else
140 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
141#endif
142
d2de0582 143 __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
0e9a3ddc 144
ca6a272a
SS
145 /* USB_REFCLKIN is not used. */
146 ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
147 if (ret)
148 pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
149 __func__, ret);
150 else {
151 /*
152 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
153 * with the power on to power good time of 3 ms.
154 */
155 ret = da8xx_register_usb20(1000, 3);
156 if (ret)
157 pr_warning("%s: USB 2.0 registration failed: %d\n",
158 __func__, ret);
159 }
160
3821d10a 161 ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
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SS
162 if (ret) {
163 pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
164 __func__, ret);
165 return;
166 }
167
168 ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
169 if (ret) {
170 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
171 "power control: %d\n", __func__, ret);
172 return;
173 }
174 gpio_direction_output(ON_BD_USB_DRV, 0);
175
176 ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
177 if (ret) {
178 printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
179 "over-current indicator: %d\n", __func__, ret);
180 return;
181 }
182 gpio_direction_input(ON_BD_USB_OVC);
183
184 ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
185 if (ret)
186 pr_warning("%s: USB 1.1 registration failed: %d\n",
187 __func__, ret);
188}
189
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190static const short da830_evm_mcasp1_pins[] = {
191 DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
192 DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
193 DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
194 DA830_AXR1_11,
195 -1
196};
197
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198static u8 da830_iis_serializer_direction[] = {
199 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
200 INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
201 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
202};
203
204static struct snd_platform_data da830_evm_snd_data = {
205 .tx_dma_offset = 0x2000,
206 .rx_dma_offset = 0x2000,
207 .op_mode = DAVINCI_MCASP_IIS_MODE,
208 .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
209 .tdm_slots = 2,
210 .serial_dir = da830_iis_serializer_direction,
48519f0a 211 .asp_chan_q = EVENTQ_0,
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212 .version = MCASP_VERSION_2,
213 .txnumevt = 1,
214 .rxnumevt = 1,
215};
216
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217/*
218 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
219 */
220static const short da830_evm_mmc_sd_pins[] = {
221 DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
222 DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
223 DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
224 DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
225 -1
226};
227
228#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
8ccfd3f0 229#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
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230
231static int da830_evm_mmc_get_ro(int index)
232{
233 return gpio_get_value(DA830_MMCSD_WP_PIN);
234}
235
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236static int da830_evm_mmc_get_cd(int index)
237{
238 return !gpio_get_value(DA830_MMCSD_CD_PIN);
239}
240
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241static struct davinci_mmc_config da830_evm_mmc_config = {
242 .get_ro = da830_evm_mmc_get_ro,
8ccfd3f0 243 .get_cd = da830_evm_mmc_get_cd,
d154fed7 244 .wires = 8,
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C
245 .max_freq = 50000000,
246 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
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DG
247};
248
249static inline void da830_evm_init_mmc(void)
250{
251 int ret;
252
3821d10a 253 ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
2eb30c81
DG
254 if (ret) {
255 pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
256 ret);
257 return;
258 }
259
260 ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
261 if (ret) {
262 pr_warning("da830_evm_init: can not open GPIO %d\n",
263 DA830_MMCSD_WP_PIN);
264 return;
265 }
266 gpio_direction_input(DA830_MMCSD_WP_PIN);
267
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268 ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
269 if (ret) {
270 pr_warning("da830_evm_init: can not open GPIO %d\n",
271 DA830_MMCSD_CD_PIN);
272 return;
273 }
274 gpio_direction_input(DA830_MMCSD_CD_PIN);
275
2eb30c81
DG
276 ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
277 if (ret) {
278 pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
279 ret);
280 gpio_free(DA830_MMCSD_WP_PIN);
281 }
282}
283
a0433ac3
SN
284/*
285 * UI board NAND/NOR flashes only use 8-bit data bus.
286 */
287static const short da830_evm_emif25_pins[] = {
288 DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
289 DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
290 DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
291 DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
292 DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
293 DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
294 DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
295 -1
296};
297
a0a56db9 298#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
b5ebe4e1 299
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300#ifdef CONFIG_DA830_UI_NAND
301static struct mtd_partition da830_evm_nand_partitions[] = {
302 /* bootloader (U-Boot, etc) in first sector */
303 [0] = {
304 .name = "bootloader",
305 .offset = 0,
306 .size = SZ_128K,
307 .mask_flags = MTD_WRITEABLE, /* force read-only */
308 },
309 /* bootloader params in the next sector */
310 [1] = {
311 .name = "params",
312 .offset = MTDPART_OFS_APPEND,
313 .size = SZ_128K,
314 .mask_flags = MTD_WRITEABLE, /* force read-only */
315 },
316 /* kernel */
317 [2] = {
318 .name = "kernel",
319 .offset = MTDPART_OFS_APPEND,
320 .size = SZ_2M,
321 .mask_flags = 0,
322 },
323 /* file system */
324 [3] = {
325 .name = "filesystem",
326 .offset = MTDPART_OFS_APPEND,
327 .size = MTDPART_SIZ_FULL,
328 .mask_flags = 0,
329 }
330};
331
332/* flash bbt decriptors */
333static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
334static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
335
336static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
337 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
338 NAND_BBT_WRITE | NAND_BBT_2BIT |
339 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
340 .offs = 2,
341 .len = 4,
342 .veroffs = 16,
343 .maxblocks = 4,
344 .pattern = da830_evm_nand_bbt_pattern
345};
346
347static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
348 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
349 NAND_BBT_WRITE | NAND_BBT_2BIT |
350 NAND_BBT_VERSION | NAND_BBT_PERCHIP,
351 .offs = 2,
352 .len = 4,
353 .veroffs = 16,
354 .maxblocks = 4,
355 .pattern = da830_evm_nand_mirror_pattern
356};
357
217f1366
SR
358static struct davinci_aemif_timing da830_evm_nandflash_timing = {
359 .wsetup = 24,
360 .wstrobe = 21,
361 .whold = 14,
362 .rsetup = 19,
363 .rstrobe = 50,
364 .rhold = 0,
365 .ta = 20,
366};
367
733975a3
DG
368static struct davinci_nand_pdata da830_evm_nand_pdata = {
369 .parts = da830_evm_nand_partitions,
370 .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
371 .ecc_mode = NAND_ECC_HW,
372 .ecc_bits = 4,
bb9ebd4e 373 .bbt_options = NAND_BBT_USE_FLASH,
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DG
374 .bbt_td = &da830_evm_nand_bbt_main_descr,
375 .bbt_md = &da830_evm_nand_bbt_mirror_descr,
217f1366 376 .timing = &da830_evm_nandflash_timing,
733975a3
DG
377};
378
379static struct resource da830_evm_nand_resources[] = {
380 [0] = { /* First memory resource is NAND I/O window */
002cb2d2
SS
381 .start = DA8XX_AEMIF_CS3_BASE,
382 .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
733975a3
DG
383 .flags = IORESOURCE_MEM,
384 },
385 [1] = { /* Second memory resource is AEMIF control registers */
002cb2d2
SS
386 .start = DA8XX_AEMIF_CTL_BASE,
387 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
733975a3
DG
388 .flags = IORESOURCE_MEM,
389 },
390};
391
392static struct platform_device da830_evm_nand_device = {
393 .name = "davinci_nand",
394 .id = 1,
395 .dev = {
396 .platform_data = &da830_evm_nand_pdata,
397 },
398 .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
399 .resource = da830_evm_nand_resources,
400};
a0433ac3 401
77316f05 402static inline void da830_evm_init_nand(int mux_mode)
a0433ac3
SN
403{
404 int ret;
405
b5ebe4e1
SN
406 if (HAS_MMC) {
407 pr_warning("WARNING: both MMC/SD and NAND are "
408 "enabled, but they share AEMIF pins.\n"
409 "\tDisable MMC/SD for NAND support.\n");
410 return;
411 }
412
3821d10a 413 ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
a0433ac3
SN
414 if (ret)
415 pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
416 ret);
417
418 ret = platform_device_register(&da830_evm_nand_device);
419 if (ret)
420 pr_warning("da830_evm_init: NAND device not registered.\n");
77316f05 421
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IK
422 if (davinci_aemif_setup(&da830_evm_nand_device))
423 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
424
77316f05 425 gpio_direction_output(mux_mode, 1);
a0433ac3
SN
426}
427#else
77316f05 428static inline void da830_evm_init_nand(int mux_mode) { }
733975a3
DG
429#endif
430
a0433ac3 431#ifdef CONFIG_DA830_UI_LCD
77316f05 432static inline void da830_evm_init_lcdc(int mux_mode)
a0433ac3
SN
433{
434 int ret;
435
3821d10a 436 ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
a0433ac3
SN
437 if (ret)
438 pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
439 ret);
440
441 ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
442 if (ret)
443 pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
77316f05
SN
444
445 gpio_direction_output(mux_mode, 0);
a0433ac3
SN
446}
447#else
77316f05 448static inline void da830_evm_init_lcdc(int mux_mode) { }
a0433ac3 449#endif
733975a3 450
77316f05
SN
451static struct at24_platform_data da830_evm_i2c_eeprom_info = {
452 .byte_len = SZ_256K / 8,
453 .page_size = 64,
454 .flags = AT24_FLAG_ADDR16,
455 .setup = davinci_get_mac_addr,
456 .context = (void *)0x7f00,
457};
458
1ef203c3
SR
459static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
460 int gpio, unsigned ngpio, void *context)
77316f05
SN
461{
462 gpio_request(gpio + 6, "UI MUX_MODE");
463
b5ebe4e1
SN
464 /* Drive mux mode low to match the default without UI card */
465 gpio_direction_output(gpio + 6, 0);
466
77316f05
SN
467 da830_evm_init_lcdc(gpio + 6);
468
469 da830_evm_init_nand(gpio + 6);
470
471 return 0;
472}
473
474static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
475 unsigned ngpio, void *context)
476{
477 gpio_free(gpio + 6);
478 return 0;
479}
480
1ef203c3 481static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
77316f05
SN
482 .gpio_base = DAVINCI_N_GPIO,
483 .setup = da830_evm_ui_expander_setup,
484 .teardown = da830_evm_ui_expander_teardown,
485};
486
487static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
488 {
489 I2C_BOARD_INFO("24c256", 0x50),
490 .platform_data = &da830_evm_i2c_eeprom_info,
491 },
492 {
493 I2C_BOARD_INFO("tlv320aic3x", 0x18),
494 },
495 {
496 I2C_BOARD_INFO("pcf8574", 0x3f),
497 .platform_data = &da830_evm_ui_expander_info,
498 },
499};
500
501static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
502 .bus_freq = 100, /* kHz */
503 .bus_delay = 0, /* usec */
504};
505
a941c503
RS
506/*
507 * The following EDMA channels/slots are not being used by drivers (for
508 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
509 * they are being reserved for codecs on the DSP side.
510 */
511static const s16 da830_dma_rsv_chans[][2] = {
512 /* (offset, number) */
513 { 8, 2},
514 {12, 2},
515 {24, 4},
516 {30, 2},
517 {-1, -1}
518};
519
520static const s16 da830_dma_rsv_slots[][2] = {
521 /* (offset, number) */
522 { 8, 2},
523 {12, 2},
524 {24, 4},
525 {30, 26},
526 {-1, -1}
527};
528
529static struct edma_rsv_info da830_edma_rsv[] = {
530 {
531 .rsv_chans = da830_dma_rsv_chans,
532 .rsv_slots = da830_dma_rsv_slots,
533 },
534};
535
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SN
536static struct mtd_partition da830evm_spiflash_part[] = {
537 [0] = {
538 .name = "DSP-UBL",
539 .offset = 0,
540 .size = SZ_8K,
541 .mask_flags = MTD_WRITEABLE,
542 },
543 [1] = {
544 .name = "ARM-UBL",
545 .offset = MTDPART_OFS_APPEND,
546 .size = SZ_16K + SZ_8K,
547 .mask_flags = MTD_WRITEABLE,
548 },
549 [2] = {
550 .name = "U-Boot",
551 .offset = MTDPART_OFS_APPEND,
552 .size = SZ_256K - SZ_32K,
553 .mask_flags = MTD_WRITEABLE,
554 },
555 [3] = {
556 .name = "U-Boot-Environment",
557 .offset = MTDPART_OFS_APPEND,
558 .size = SZ_16K,
559 .mask_flags = 0,
560 },
561 [4] = {
562 .name = "Kernel",
563 .offset = MTDPART_OFS_APPEND,
564 .size = MTDPART_SIZ_FULL,
565 .mask_flags = 0,
566 },
567};
568
569static struct flash_platform_data da830evm_spiflash_data = {
570 .name = "m25p80",
571 .parts = da830evm_spiflash_part,
572 .nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
573 .type = "w25x32",
574};
575
576static struct davinci_spi_config da830evm_spiflash_cfg = {
577 .io_type = SPI_IO_TYPE_DMA,
578 .c2tdelay = 8,
579 .t2cdelay = 8,
580};
581
582static struct spi_board_info da830evm_spi_info[] = {
583 {
584 .modalias = "m25p80",
585 .platform_data = &da830evm_spiflash_data,
586 .controller_data = &da830evm_spiflash_cfg,
587 .mode = SPI_MODE_0,
588 .max_speed_hz = 30000000,
589 .bus_num = 0,
590 .chip_select = 0,
591 },
592};
593
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594static __init void da830_evm_init(void)
595{
596 struct davinci_soc_info *soc_info = &davinci_soc_info;
597 int ret;
598
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599 ret = da830_register_gpio();
600 if (ret)
601 pr_warn("da830_evm_init: GPIO init failed: %d\n", ret);
602
a941c503 603 ret = da830_register_edma(da830_edma_rsv);
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604 if (ret)
605 pr_warning("da830_evm_init: edma registration failed: %d\n",
606 ret);
607
3821d10a 608 ret = davinci_cfg_reg_list(da830_i2c0_pins);
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609 if (ret)
610 pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
611 ret);
612
613 ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
614 if (ret)
615 pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
616 ret);
617
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618 da830_evm_usb_init();
619
8593790d 620 soc_info->emac_pdata->rmii_en = 1;
782f2d78 621 soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
8593790d 622
3821d10a 623 ret = davinci_cfg_reg_list(da830_cpgmac_pins);
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624 if (ret)
625 pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
626 ret);
627
628 ret = da8xx_register_emac();
629 if (ret)
630 pr_warning("da830_evm_init: emac registration failed: %d\n",
631 ret);
632
633 ret = da8xx_register_watchdog();
634 if (ret)
635 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
636 ret);
637
fcf7157b 638 davinci_serial_init(da8xx_serial_device);
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639 i2c_register_board_info(1, da830_evm_i2c_devices,
640 ARRAY_SIZE(da830_evm_i2c_devices));
e33ef5e3 641
3821d10a 642 ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
e33ef5e3
C
643 if (ret)
644 pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
645 ret);
646
b8864aa4 647 da8xx_register_mcasp(1, &da830_evm_snd_data);
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648
649 da830_evm_init_mmc();
13e1f044 650
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651 ret = da8xx_register_rtc();
652 if (ret)
653 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
16a3c832 654
0273612c
VD
655 ret = spi_register_board_info(da830evm_spi_info,
656 ARRAY_SIZE(da830evm_spi_info));
657 if (ret)
658 pr_warn("%s: spi info registration failed: %d\n", __func__,
659 ret);
660
661 ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
16a3c832
SN
662 if (ret)
663 pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
664 ret);
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665}
666
667#ifdef CONFIG_SERIAL_8250_CONSOLE
668static int __init da830_evm_console_init(void)
669{
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670 if (!machine_is_davinci_da830_evm())
671 return 0;
672
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673 return add_preferred_console("ttyS", 2, "115200");
674}
675console_initcall(da830_evm_console_init);
676#endif
677
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678static void __init da830_evm_map_io(void)
679{
680 da830_init();
681}
682
48ea89ea 683MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
e7e56014 684 .atag_offset = 0x100,
8593790d 685 .map_io = da830_evm_map_io,
bd808947 686 .init_irq = cp_intc_init,
6bb27d73 687 .init_time = davinci_timer_init,
8593790d 688 .init_machine = da830_evm_init,
3aa3e840 689 .init_late = davinci_init_late,
f68deabf 690 .dma_zone_size = SZ_128M,
c6121ddd 691 .restart = da8xx_restart,
8593790d 692MACHINE_END
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