[deliverable/linux.git] / arch / arm / mach-davinci / board-da830-evm.c

/*
 * TI DA830/OMAP L137 EVM board
 *
 * Author: Mark A. Greer <mgreer@mvista.com>
 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
 *
 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c/pcf857x.h>
#include <linux/i2c/at24.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <mach/cp_intc.h>
#include <mach/mux.h>
#include <mach/nand.h>
#include <mach/da8xx.h>
#include <mach/usb.h>
#include <mach/aemif.h>

#define DA830_EVM_PHY_MASK		0x0
#define DA830_EVM_MDIO_FREQUENCY	2200000	/* PHY bus frequency */

/*
 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
 */
#define ON_BD_USB_DRV	GPIO_TO_PIN(1, 15)
#define ON_BD_USB_OVC	GPIO_TO_PIN(2, 4)

static const short da830_evm_usb11_pins[] = {
	DA830_GPIO1_15, DA830_GPIO2_4,
	-1
};

static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;

static int da830_evm_usb_set_power(unsigned port, int on)
{
	gpio_set_value(ON_BD_USB_DRV, on);
	return 0;
}

static int da830_evm_usb_get_power(unsigned port)
{
	return gpio_get_value(ON_BD_USB_DRV);
}

static int da830_evm_usb_get_oci(unsigned port)
{
	return !gpio_get_value(ON_BD_USB_OVC);
}

static irqreturn_t da830_evm_usb_ocic_irq(int, void *);

static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
{
	int irq 	= gpio_to_irq(ON_BD_USB_OVC);
	int error	= 0;

	if (handler != NULL) {
		da830_evm_usb_ocic_handler = handler;

		error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
				    IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
				    "OHCI over-current indicator", NULL);
		if (error)
			printk(KERN_ERR "%s: could not request IRQ to watch "
			       "over-current indicator changes\n", __func__);
	} else
		free_irq(irq, NULL);

	return error;
}

static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
	.set_power	= da830_evm_usb_set_power,
	.get_power	= da830_evm_usb_get_power,
	.get_oci	= da830_evm_usb_get_oci,
	.ocic_notify	= da830_evm_usb_ocic_notify,

	/* TPS2065 switch @ 5V */
	.potpgt		= (3 + 1) / 2,	/* 3 ms max */
};

static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
{
	da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
	return IRQ_HANDLED;
}

static __init void da830_evm_usb_init(void)
{
	u32 cfgchip2;
	int ret;

	/*
	 * Set up USB clock/mode in the CFGCHIP2 register.
	 * FYI:  CFGCHIP2 is 0x0000ef00 initially.
	 */
	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));

	/* USB2.0 PHY reference clock is 24 MHz */
	cfgchip2 &= ~CFGCHIP2_REFFREQ;
	cfgchip2 |=  CFGCHIP2_REFFREQ_24MHZ;

	/*
	 * Select internal reference clock for USB 2.0 PHY
	 * and use it as a clock source for USB 1.1 PHY
	 * (this is the default setting anyway).
	 */
	cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
	cfgchip2 |=  CFGCHIP2_USB2PHYCLKMUX;

	/*
	 * We have to override VBUS/ID signals when MUSB is configured into the
	 * host-only mode -- ID pin will float if no cable is connected, so the
	 * controller won't be able to drive VBUS thinking that it's a B-device.
	 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
	 */
	cfgchip2 &= ~CFGCHIP2_OTGMODE;
#ifdef	CONFIG_USB_MUSB_HOST
	cfgchip2 |=  CFGCHIP2_FORCE_HOST;
#else
	cfgchip2 |=  CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
#endif

	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));

	/* USB_REFCLKIN is not used. */
	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
	if (ret)
		pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
			   __func__, ret);
	else {
		/*
		 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
		 * with the power on to power good time of 3 ms.
		 */
		ret = da8xx_register_usb20(1000, 3);
		if (ret)
			pr_warning("%s: USB 2.0 registration failed: %d\n",
				   __func__, ret);
	}

	ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
	if (ret) {
		pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
			   __func__, ret);
		return;
	}

	ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
	if (ret) {
		printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
		       "power control: %d\n", __func__, ret);
		return;
	}
	gpio_direction_output(ON_BD_USB_DRV, 0);

	ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
	if (ret) {
		printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
		       "over-current indicator: %d\n", __func__, ret);
		return;
	}
	gpio_direction_input(ON_BD_USB_OVC);

	ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
	if (ret)
		pr_warning("%s: USB 1.1 registration failed: %d\n",
			   __func__, ret);
}

static struct davinci_uart_config da830_evm_uart_config __initdata = {
	.enabled_uarts = 0x7,
};

static const short da830_evm_mcasp1_pins[] = {
	DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
	DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
	DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
	DA830_AXR1_11,
	-1
};

static u8 da830_iis_serializer_direction[] = {
	RX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	TX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
};

static struct snd_platform_data da830_evm_snd_data = {
	.tx_dma_offset  = 0x2000,
	.rx_dma_offset  = 0x2000,
	.op_mode        = DAVINCI_MCASP_IIS_MODE,
	.num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
	.tdm_slots      = 2,
	.serial_dir     = da830_iis_serializer_direction,
	.asp_chan_q     = EVENTQ_0,
	.version	= MCASP_VERSION_2,
	.txnumevt	= 1,
	.rxnumevt	= 1,
};

/*
 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
 */
static const short da830_evm_mmc_sd_pins[] = {
	DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
	DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
	DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
	DA830_MMCSD_CMD,   DA830_GPIO2_1,     DA830_GPIO2_2,
	-1
};

#define DA830_MMCSD_WP_PIN		GPIO_TO_PIN(2, 1)
#define DA830_MMCSD_CD_PIN		GPIO_TO_PIN(2, 2)

static int da830_evm_mmc_get_ro(int index)
{
	return gpio_get_value(DA830_MMCSD_WP_PIN);
}

static int da830_evm_mmc_get_cd(int index)
{
	return !gpio_get_value(DA830_MMCSD_CD_PIN);
}

static struct davinci_mmc_config da830_evm_mmc_config = {
	.get_ro			= da830_evm_mmc_get_ro,
	.get_cd			= da830_evm_mmc_get_cd,
	.wires			= 8,
	.max_freq		= 50000000,
	.caps			= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
	.version		= MMC_CTLR_VERSION_2,
};

static inline void da830_evm_init_mmc(void)
{
	int ret;

	ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
	if (ret) {
		pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
				ret);
		return;
	}

	ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
	if (ret) {
		pr_warning("da830_evm_init: can not open GPIO %d\n",
			   DA830_MMCSD_WP_PIN);
		return;
	}
	gpio_direction_input(DA830_MMCSD_WP_PIN);

	ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
	if (ret) {
		pr_warning("da830_evm_init: can not open GPIO %d\n",
			   DA830_MMCSD_CD_PIN);
		return;
	}
	gpio_direction_input(DA830_MMCSD_CD_PIN);

	ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
	if (ret) {
		pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
				ret);
		gpio_free(DA830_MMCSD_WP_PIN);
	}
}

/*
 * UI board NAND/NOR flashes only use 8-bit data bus.
 */
static const short da830_evm_emif25_pins[] = {
	DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
	DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
	DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
	DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
	DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
	DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
	DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
	-1
};

#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
#define HAS_MMC	1
#else
#define HAS_MMC	0
#endif

#ifdef CONFIG_DA830_UI_NAND
static struct mtd_partition da830_evm_nand_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	[0] = {
		.name		= "bootloader",
		.offset		= 0,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	/* bootloader params in the next sector */
	[1] = {
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	/* kernel */
	[2] = {
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_2M,
		.mask_flags	= 0,
	},
	/* file system */
	[3] = {
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	}
};

/* flash bbt decriptors */
static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };

static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
	.options	= NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
			  NAND_BBT_WRITE | NAND_BBT_2BIT |
			  NAND_BBT_VERSION | NAND_BBT_PERCHIP,
	.offs		= 2,
	.len		= 4,
	.veroffs	= 16,
	.maxblocks	= 4,
	.pattern	= da830_evm_nand_bbt_pattern
};

static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
	.options	= NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
			  NAND_BBT_WRITE | NAND_BBT_2BIT |
			  NAND_BBT_VERSION | NAND_BBT_PERCHIP,
	.offs		= 2,
	.len		= 4,
	.veroffs	= 16,
	.maxblocks	= 4,
	.pattern	= da830_evm_nand_mirror_pattern
};

static struct davinci_aemif_timing da830_evm_nandflash_timing = {
	.wsetup         = 24,
	.wstrobe        = 21,
	.whold          = 14,
	.rsetup         = 19,
	.rstrobe        = 50,
	.rhold          = 0,
	.ta             = 20,
};

static struct davinci_nand_pdata da830_evm_nand_pdata = {
	.parts		= da830_evm_nand_partitions,
	.nr_parts	= ARRAY_SIZE(da830_evm_nand_partitions),
	.ecc_mode	= NAND_ECC_HW,
	.ecc_bits	= 4,
	.options	= NAND_USE_FLASH_BBT,
	.bbt_td		= &da830_evm_nand_bbt_main_descr,
	.bbt_md		= &da830_evm_nand_bbt_mirror_descr,
	.timing         = &da830_evm_nandflash_timing,
};

static struct resource da830_evm_nand_resources[] = {
	[0] = {		/* First memory resource is NAND I/O window */
		.start	= DA8XX_AEMIF_CS3_BASE,
		.end	= DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {		/* Second memory resource is AEMIF control registers */
		.start	= DA8XX_AEMIF_CTL_BASE,
		.end	= DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da830_evm_nand_device = {
	.name		= "davinci_nand",
	.id		= 1,
	.dev		= {
		.platform_data	= &da830_evm_nand_pdata,
	},
	.num_resources	= ARRAY_SIZE(da830_evm_nand_resources),
	.resource	= da830_evm_nand_resources,
};

static inline void da830_evm_init_nand(int mux_mode)
{
	int ret;

	if (HAS_MMC) {
		pr_warning("WARNING: both MMC/SD and NAND are "
				"enabled, but they share AEMIF pins.\n"
				"\tDisable MMC/SD for NAND support.\n");
		return;
	}

	ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
	if (ret)
		pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
				ret);

	ret = platform_device_register(&da830_evm_nand_device);
	if (ret)
		pr_warning("da830_evm_init: NAND device not registered.\n");

	gpio_direction_output(mux_mode, 1);
}
#else
static inline void da830_evm_init_nand(int mux_mode) { }
#endif

#ifdef CONFIG_DA830_UI_LCD
static inline void da830_evm_init_lcdc(int mux_mode)
{
	int ret;

	ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
	if (ret)
		pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
				ret);

	ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
	if (ret)
		pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);

	gpio_direction_output(mux_mode, 0);
}
#else
static inline void da830_evm_init_lcdc(int mux_mode) { }
#endif

static struct at24_platform_data da830_evm_i2c_eeprom_info = {
	.byte_len	= SZ_256K / 8,
	.page_size	= 64,
	.flags		= AT24_FLAG_ADDR16,
	.setup		= davinci_get_mac_addr,
	.context	= (void *)0x7f00,
};

static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
		int gpio, unsigned ngpio, void *context)
{
	gpio_request(gpio + 6, "UI MUX_MODE");

	/* Drive mux mode low to match the default without UI card */
	gpio_direction_output(gpio + 6, 0);

	da830_evm_init_lcdc(gpio + 6);

	da830_evm_init_nand(gpio + 6);

	return 0;
}

static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
		unsigned ngpio, void *context)
{
	gpio_free(gpio + 6);
	return 0;
}

static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
	.gpio_base	= DAVINCI_N_GPIO,
	.setup		= da830_evm_ui_expander_setup,
	.teardown	= da830_evm_ui_expander_teardown,
};

static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
	{
		I2C_BOARD_INFO("24c256", 0x50),
		.platform_data	= &da830_evm_i2c_eeprom_info,
	},
	{
		I2C_BOARD_INFO("tlv320aic3x", 0x18),
	},
	{
		I2C_BOARD_INFO("pcf8574", 0x3f),
		.platform_data	= &da830_evm_ui_expander_info,
	},
};

static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
	.bus_freq	= 100,	/* kHz */
	.bus_delay	= 0,	/* usec */
};

/*
 * The following EDMA channels/slots are not being used by drivers (for
 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
 * they are being reserved for codecs on the DSP side.
 */
static const s16 da830_dma_rsv_chans[][2] = {
	/* (offset, number) */
	{ 8,  2},
	{12,  2},
	{24,  4},
	{30,  2},
	{-1, -1}
};

static const s16 da830_dma_rsv_slots[][2] = {
	/* (offset, number) */
	{ 8,  2},
	{12,  2},
	{24,  4},
	{30, 26},
	{-1, -1}
};

static struct edma_rsv_info da830_edma_rsv[] = {
	{
		.rsv_chans	= da830_dma_rsv_chans,
		.rsv_slots	= da830_dma_rsv_slots,
	},
};

static __init void da830_evm_init(void)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;
	int ret;

	ret = da830_register_edma(da830_edma_rsv);
	if (ret)
		pr_warning("da830_evm_init: edma registration failed: %d\n",
				ret);

	ret = davinci_cfg_reg_list(da830_i2c0_pins);
	if (ret)
		pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
				ret);

	ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
	if (ret)
		pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
				ret);

	da830_evm_usb_init();

	soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
	soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
	soc_info->emac_pdata->rmii_en = 1;

	ret = davinci_cfg_reg_list(da830_cpgmac_pins);
	if (ret)
		pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
				ret);

	ret = da8xx_register_emac();
	if (ret)
		pr_warning("da830_evm_init: emac registration failed: %d\n",
				ret);

	ret = da8xx_register_watchdog();
	if (ret)
		pr_warning("da830_evm_init: watchdog registration failed: %d\n",
				ret);

	davinci_serial_init(&da830_evm_uart_config);
	i2c_register_board_info(1, da830_evm_i2c_devices,
			ARRAY_SIZE(da830_evm_i2c_devices));

	ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
	if (ret)
		pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
				ret);

	da8xx_register_mcasp(1, &da830_evm_snd_data);

	da830_evm_init_mmc();

	ret = da8xx_register_rtc();
	if (ret)
		pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
}

#ifdef CONFIG_SERIAL_8250_CONSOLE
static int __init da830_evm_console_init(void)
{
	return add_preferred_console("ttyS", 2, "115200");
}
console_initcall(da830_evm_console_init);
#endif

static void __init da830_evm_map_io(void)
{
	da830_init();
}

MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
	.phys_io	= IO_PHYS,
	.io_pg_offst	= (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	.boot_params	= (DA8XX_DDR_BASE + 0x100),
	.map_io		= da830_evm_map_io,
	.init_irq	= cp_intc_init,
	.timer		= &davinci_timer,
	.init_machine	= da830_evm_init,
MACHINE_END
Commit	Line	Data
8593790d MG	1	/*
	2	* TI DA830/OMAP L137 EVM board
	3	*
	4	* Author: Mark A. Greer <mgreer@mvista.com>
	5	* Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
	6	*
	7	* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
	8	* the terms of the GNU General Public License version 2. This program
	9	* is licensed "as is" without any warranty of any kind, whether express
	10	* or implied.
	11	*/
	12	#include <linux/kernel.h>
8593790d MG	13	#include <linux/init.h>
8593790d MG	14	#include <linux/console.h>
0e9a3ddc	15	#include <linux/interrupt.h>
13e1f044	16	#include <linux/gpio.h>
733975a3	17	#include <linux/platform_device.h>
8593790d	18	#include <linux/i2c.h>
13e1f044	19	#include <linux/i2c/pcf857x.h>
8593790d	20	#include <linux/i2c/at24.h>
733975a3 DG	21	#include <linux/mtd/mtd.h>
733975a3 DG	22	#include <linux/mtd/partitions.h>
8593790d MG	23
	24	#include <asm/mach-types.h>
	25	#include <asm/mach/arch.h>
	26
8593790d	27	#include <mach/cp_intc.h>
32bf078c	28	#include <mach/mux.h>
733975a3	29	#include <mach/nand.h>
8593790d	30	#include <mach/da8xx.h>
0e9a3ddc	31	#include <mach/usb.h>
217f1366	32	#include <mach/aemif.h>
8593790d MG	33
	34	#define DA830_EVM_PHY_MASK 0x0
	35	#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
	36
0e9a3ddc SS	37	/*
	38	* USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
	39	*/
	40	#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
	41	#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
	42
	43	static const short da830_evm_usb11_pins[] = {
	44	DA830_GPIO1_15, DA830_GPIO2_4,
	45	-1
	46	};
	47
	48	static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
	49
	50	static int da830_evm_usb_set_power(unsigned port, int on)
	51	{
	52	gpio_set_value(ON_BD_USB_DRV, on);
	53	return 0;
	54	}
	55
	56	static int da830_evm_usb_get_power(unsigned port)
	57	{
	58	return gpio_get_value(ON_BD_USB_DRV);
	59	}
	60
	61	static int da830_evm_usb_get_oci(unsigned port)
	62	{
	63	return !gpio_get_value(ON_BD_USB_OVC);
	64	}
	65
	66	static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
	67
	68	static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
	69	{
	70	int irq = gpio_to_irq(ON_BD_USB_OVC);
	71	int error = 0;
	72
	73	if (handler != NULL) {
	74	da830_evm_usb_ocic_handler = handler;
	75
	76	error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED \|
	77	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,
	78	"OHCI over-current indicator", NULL);
	79	if (error)
	80	printk(KERN_ERR "%s: could not request IRQ to watch "
	81	"over-current indicator changes\n", __func__);
	82	} else
	83	free_irq(irq, NULL);
	84
	85	return error;
	86	}
	87
	88	static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
	89	.set_power = da830_evm_usb_set_power,
	90	.get_power = da830_evm_usb_get_power,
	91	.get_oci = da830_evm_usb_get_oci,
	92	.ocic_notify = da830_evm_usb_ocic_notify,
	93
	94	/* TPS2065 switch @ 5V */
	95	.potpgt = (3 + 1) / 2, /* 3 ms max */
	96	};
	97
	98	static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
	99	{
	100	da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
101	return IRQ_HANDLED;
102	}
103
104	static __init void da830_evm_usb_init(void)
105	{
106	u32 cfgchip2;
107	int ret;
108
109	/*
110	* Set up USB clock/mode in the CFGCHIP2 register.
111	* FYI: CFGCHIP2 is 0x0000ef00 initially.
112	*/
d2de0582	113	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
0e9a3ddc SS	114
	115	/* USB2.0 PHY reference clock is 24 MHz */
	116	cfgchip2 &= ~CFGCHIP2_REFFREQ;
	117	cfgchip2 \|= CFGCHIP2_REFFREQ_24MHZ;
	118
	119	/*
	120	* Select internal reference clock for USB 2.0 PHY
	121	* and use it as a clock source for USB 1.1 PHY
	122	* (this is the default setting anyway).
	123	*/
	124	cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
	125	cfgchip2 \|= CFGCHIP2_USB2PHYCLKMUX;
	126
ca6a272a SS	127	/*
	128	* We have to override VBUS/ID signals when MUSB is configured into the
	129	* host-only mode -- ID pin will float if no cable is connected, so the
	130	* controller won't be able to drive VBUS thinking that it's a B-device.
	131	* Otherwise, we want to use the OTG mode and enable VBUS comparators.
	132	*/
	133	cfgchip2 &= ~CFGCHIP2_OTGMODE;
	134	#ifdef CONFIG_USB_MUSB_HOST
	135	cfgchip2 \|= CFGCHIP2_FORCE_HOST;
	136	#else
	137	cfgchip2 \|= CFGCHIP2_SESENDEN \| CFGCHIP2_VBDTCTEN;
	138	#endif
	139
d2de0582	140	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
0e9a3ddc	141
ca6a272a SS	142	/* USB_REFCLKIN is not used. */
	143	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
	144	if (ret)
	145	pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
	146	__func__, ret);
	147	else {
	148	/*
	149	* TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
	150	* with the power on to power good time of 3 ms.
	151	*/
	152	ret = da8xx_register_usb20(1000, 3);
	153	if (ret)
	154	pr_warning("%s: USB 2.0 registration failed: %d\n",
	155	__func__, ret);
	156	}
	157
3821d10a	158	ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
0e9a3ddc SS	159	if (ret) {
	160	pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
	161	__func__, ret);
	162	return;
	163	}
	164
	165	ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
	166	if (ret) {
	167	printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
	168	"power control: %d\n", __func__, ret);
	169	return;
	170	}
	171	gpio_direction_output(ON_BD_USB_DRV, 0);
	172
	173	ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
	174	if (ret) {
	175	printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
	176	"over-current indicator: %d\n", __func__, ret);
	177	return;
	178	}
	179	gpio_direction_input(ON_BD_USB_OVC);
	180
	181	ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
	182	if (ret)
	183	pr_warning("%s: USB 1.1 registration failed: %d\n",
	184	__func__, ret);
	185	}
	186
8593790d MG	187	static struct davinci_uart_config da830_evm_uart_config __initdata = {
	188	.enabled_uarts = 0x7,
	189	};
	190
32bf078c MG	191	static const short da830_evm_mcasp1_pins[] = {
	192	DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
	193	DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
	194	DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
	195	DA830_AXR1_11,
	196	-1
	197	};
	198
e33ef5e3 C	199	static u8 da830_iis_serializer_direction[] = {
	200	RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	201	INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
	202	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	203	};
	204
	205	static struct snd_platform_data da830_evm_snd_data = {
	206	.tx_dma_offset = 0x2000,
	207	.rx_dma_offset = 0x2000,
	208	.op_mode = DAVINCI_MCASP_IIS_MODE,
	209	.num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
	210	.tdm_slots = 2,
	211	.serial_dir = da830_iis_serializer_direction,
48519f0a	212	.asp_chan_q = EVENTQ_0,
e33ef5e3 C	213	.version = MCASP_VERSION_2,
	214	.txnumevt = 1,
	215	.rxnumevt = 1,
	216	};
	217
2eb30c81 DG	218	/*
	219	* GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
	220	*/
	221	static const short da830_evm_mmc_sd_pins[] = {
	222	DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
	223	DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
	224	DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
	225	DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
	226	-1
	227	};
	228
	229	#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
8ccfd3f0	230	#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
2eb30c81 DG	231
	232	static int da830_evm_mmc_get_ro(int index)
	233	{
	234	return gpio_get_value(DA830_MMCSD_WP_PIN);
	235	}
	236
8ccfd3f0 VB	237	static int da830_evm_mmc_get_cd(int index)
	238	{
	239	return !gpio_get_value(DA830_MMCSD_CD_PIN);
	240	}
	241
2eb30c81 DG	242	static struct davinci_mmc_config da830_evm_mmc_config = {
2eb30c81 DG	243	.get_ro = da830_evm_mmc_get_ro,
8ccfd3f0	244	.get_cd = da830_evm_mmc_get_cd,
d154fed7	245	.wires = 8,
0046d0bf C	246	.max_freq = 50000000,
0046d0bf C	247	.caps = MMC_CAP_MMC_HIGHSPEED \| MMC_CAP_SD_HIGHSPEED,
2eb30c81 DG	248	.version = MMC_CTLR_VERSION_2,
	249	};
	250
	251	static inline void da830_evm_init_mmc(void)
	252	{
	253	int ret;
	254
3821d10a	255	ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
2eb30c81 DG	256	if (ret) {
	257	pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
	258	ret);
	259	return;
	260	}
	261
	262	ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
	263	if (ret) {
	264	pr_warning("da830_evm_init: can not open GPIO %d\n",
	265	DA830_MMCSD_WP_PIN);
	266	return;
	267	}
	268	gpio_direction_input(DA830_MMCSD_WP_PIN);
	269
8ccfd3f0 VB	270	ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
	271	if (ret) {
	272	pr_warning("da830_evm_init: can not open GPIO %d\n",
	273	DA830_MMCSD_CD_PIN);
	274	return;
	275	}
	276	gpio_direction_input(DA830_MMCSD_CD_PIN);
	277
2eb30c81 DG	278	ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
	279	if (ret) {
	280	pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
	281	ret);
	282	gpio_free(DA830_MMCSD_WP_PIN);
	283	}
	284	}
	285
a0433ac3 SN	286	/*
	287	* UI board NAND/NOR flashes only use 8-bit data bus.
	288	*/
	289	static const short da830_evm_emif25_pins[] = {
	290	DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
	291	DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
	292	DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
	293	DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
	294	DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
	295	DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
	296	DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
	297	-1
	298	};
	299
b5ebe4e1 SN	300	#if defined(CONFIG_MMC_DAVINCI) \|\| defined(CONFIG_MMC_DAVINCI_MODULE)
	301	#define HAS_MMC 1
	302	#else
	303	#define HAS_MMC 0
	304	#endif
	305
733975a3 DG	306	#ifdef CONFIG_DA830_UI_NAND
	307	static struct mtd_partition da830_evm_nand_partitions[] = {
	308	/* bootloader (U-Boot, etc) in first sector */
	309	[0] = {
	310	.name = "bootloader",
	311	.offset = 0,
	312	.size = SZ_128K,
	313	.mask_flags = MTD_WRITEABLE, /* force read-only */
	314	},
	315	/* bootloader params in the next sector */
	316	[1] = {
	317	.name = "params",
	318	.offset = MTDPART_OFS_APPEND,
	319	.size = SZ_128K,
	320	.mask_flags = MTD_WRITEABLE, /* force read-only */
	321	},
	322	/* kernel */
	323	[2] = {
	324	.name = "kernel",
	325	.offset = MTDPART_OFS_APPEND,
	326	.size = SZ_2M,
	327	.mask_flags = 0,
	328	},
	329	/* file system */
	330	[3] = {
	331	.name = "filesystem",
	332	.offset = MTDPART_OFS_APPEND,
	333	.size = MTDPART_SIZ_FULL,
	334	.mask_flags = 0,
	335	}
	336	};
	337
	338	/* flash bbt decriptors */
	339	static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
	340	static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
	341
	342	static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
	343	.options = NAND_BBT_LASTBLOCK \| NAND_BBT_CREATE \|
	344	NAND_BBT_WRITE \| NAND_BBT_2BIT \|
	345	NAND_BBT_VERSION \| NAND_BBT_PERCHIP,
	346	.offs = 2,
	347	.len = 4,
	348	.veroffs = 16,
	349	.maxblocks = 4,
	350	.pattern = da830_evm_nand_bbt_pattern
	351	};
	352
	353	static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
	354	.options = NAND_BBT_LASTBLOCK \| NAND_BBT_CREATE \|
	355	NAND_BBT_WRITE \| NAND_BBT_2BIT \|
	356	NAND_BBT_VERSION \| NAND_BBT_PERCHIP,
	357	.offs = 2,
	358	.len = 4,
	359	.veroffs = 16,
	360	.maxblocks = 4,
	361	.pattern = da830_evm_nand_mirror_pattern
	362	};
	363
217f1366 SR	364	static struct davinci_aemif_timing da830_evm_nandflash_timing = {
	365	.wsetup = 24,
	366	.wstrobe = 21,
	367	.whold = 14,
	368	.rsetup = 19,
	369	.rstrobe = 50,
	370	.rhold = 0,
	371	.ta = 20,
	372	};
	373
733975a3 DG	374	static struct davinci_nand_pdata da830_evm_nand_pdata = {
	375	.parts = da830_evm_nand_partitions,
	376	.nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
	377	.ecc_mode = NAND_ECC_HW,
	378	.ecc_bits = 4,
	379	.options = NAND_USE_FLASH_BBT,
	380	.bbt_td = &da830_evm_nand_bbt_main_descr,
	381	.bbt_md = &da830_evm_nand_bbt_mirror_descr,
217f1366	382	.timing = &da830_evm_nandflash_timing,
733975a3 DG	383	};
	384
	385	static struct resource da830_evm_nand_resources[] = {
	386	[0] = { /* First memory resource is NAND I/O window */
002cb2d2 SS	387	.start = DA8XX_AEMIF_CS3_BASE,
002cb2d2 SS	388	.end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
733975a3 DG	389	.flags = IORESOURCE_MEM,
	390	},
	391	[1] = { /* Second memory resource is AEMIF control registers */
002cb2d2 SS	392	.start = DA8XX_AEMIF_CTL_BASE,
002cb2d2 SS	393	.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
733975a3 DG	394	.flags = IORESOURCE_MEM,
	395	},
	396	};
	397
	398	static struct platform_device da830_evm_nand_device = {
	399	.name = "davinci_nand",
	400	.id = 1,
	401	.dev = {
	402	.platform_data = &da830_evm_nand_pdata,
	403	},
	404	.num_resources = ARRAY_SIZE(da830_evm_nand_resources),
	405	.resource = da830_evm_nand_resources,
	406	};
a0433ac3	407
77316f05	408	static inline void da830_evm_init_nand(int mux_mode)
a0433ac3 SN	409	{
	410	int ret;
	411
b5ebe4e1 SN	412	if (HAS_MMC) {
	413	pr_warning("WARNING: both MMC/SD and NAND are "
	414	"enabled, but they share AEMIF pins.\n"
	415	"\tDisable MMC/SD for NAND support.\n");
	416	return;
	417	}
	418
3821d10a	419	ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
a0433ac3 SN	420	if (ret)
	421	pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
	422	ret);
	423
	424	ret = platform_device_register(&da830_evm_nand_device);
	425	if (ret)
	426	pr_warning("da830_evm_init: NAND device not registered.\n");
77316f05 SN	427
77316f05 SN	428	gpio_direction_output(mux_mode, 1);
a0433ac3 SN	429	}
a0433ac3 SN	430	#else
77316f05	431	static inline void da830_evm_init_nand(int mux_mode) { }
733975a3 DG	432	#endif
733975a3 DG	433
a0433ac3	434	#ifdef CONFIG_DA830_UI_LCD
77316f05	435	static inline void da830_evm_init_lcdc(int mux_mode)
a0433ac3 SN	436	{
	437	int ret;
	438
3821d10a	439	ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
a0433ac3 SN	440	if (ret)
	441	pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
	442	ret);
	443
	444	ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
	445	if (ret)
	446	pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
77316f05 SN	447
77316f05 SN	448	gpio_direction_output(mux_mode, 0);
a0433ac3 SN	449	}
a0433ac3 SN	450	#else
77316f05	451	static inline void da830_evm_init_lcdc(int mux_mode) { }
a0433ac3	452	#endif
733975a3	453
77316f05 SN	454	static struct at24_platform_data da830_evm_i2c_eeprom_info = {
	455	.byte_len = SZ_256K / 8,
	456	.page_size = 64,
	457	.flags = AT24_FLAG_ADDR16,
	458	.setup = davinci_get_mac_addr,
	459	.context = (void *)0x7f00,
	460	};
	461
1ef203c3 SR	462	static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
1ef203c3 SR	463	int gpio, unsigned ngpio, void *context)
77316f05 SN	464	{
	465	gpio_request(gpio + 6, "UI MUX_MODE");
	466
b5ebe4e1 SN	467	/* Drive mux mode low to match the default without UI card */
	468	gpio_direction_output(gpio + 6, 0);
	469
77316f05 SN	470	da830_evm_init_lcdc(gpio + 6);
	471
	472	da830_evm_init_nand(gpio + 6);
	473
	474	return 0;
	475	}
	476
	477	static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
	478	unsigned ngpio, void *context)
	479	{
	480	gpio_free(gpio + 6);
	481	return 0;
	482	}
	483
1ef203c3	484	static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
77316f05 SN	485	.gpio_base = DAVINCI_N_GPIO,
	486	.setup = da830_evm_ui_expander_setup,
	487	.teardown = da830_evm_ui_expander_teardown,
	488	};
	489
	490	static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
	491	{
	492	I2C_BOARD_INFO("24c256", 0x50),
	493	.platform_data = &da830_evm_i2c_eeprom_info,
	494	},
	495	{
	496	I2C_BOARD_INFO("tlv320aic3x", 0x18),
	497	},
	498	{
	499	I2C_BOARD_INFO("pcf8574", 0x3f),
	500	.platform_data = &da830_evm_ui_expander_info,
	501	},
	502	};
	503
	504	static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
	505	.bus_freq = 100, /* kHz */
	506	.bus_delay = 0, /* usec */
	507	};
	508
a941c503 RS	509	/*
	510	* The following EDMA channels/slots are not being used by drivers (for
	511	* example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
	512	* they are being reserved for codecs on the DSP side.
	513	*/
	514	static const s16 da830_dma_rsv_chans[][2] = {
	515	/* (offset, number) */
	516	{ 8, 2},
	517	{12, 2},
	518	{24, 4},
	519	{30, 2},
	520	{-1, -1}
	521	};
	522
	523	static const s16 da830_dma_rsv_slots[][2] = {
	524	/* (offset, number) */
	525	{ 8, 2},
	526	{12, 2},
	527	{24, 4},
	528	{30, 26},
	529	{-1, -1}
	530	};
	531
	532	static struct edma_rsv_info da830_edma_rsv[] = {
	533	{
	534	.rsv_chans = da830_dma_rsv_chans,
	535	.rsv_slots = da830_dma_rsv_slots,
	536	},
	537	};
	538
8593790d MG	539	static __init void da830_evm_init(void)
	540	{
	541	struct davinci_soc_info *soc_info = &davinci_soc_info;
	542	int ret;
	543
a941c503	544	ret = da830_register_edma(da830_edma_rsv);
8593790d MG	545	if (ret)
	546	pr_warning("da830_evm_init: edma registration failed: %d\n",
	547	ret);
	548
3821d10a	549	ret = davinci_cfg_reg_list(da830_i2c0_pins);
8593790d MG	550	if (ret)
	551	pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
	552	ret);
	553
	554	ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
	555	if (ret)
	556	pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
	557	ret);
	558
0e9a3ddc SS	559	da830_evm_usb_init();
0e9a3ddc SS	560
8593790d MG	561	soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
	562	soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
	563	soc_info->emac_pdata->rmii_en = 1;
	564
3821d10a	565	ret = davinci_cfg_reg_list(da830_cpgmac_pins);
8593790d MG	566	if (ret)
	567	pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
	568	ret);
	569
	570	ret = da8xx_register_emac();
	571	if (ret)
	572	pr_warning("da830_evm_init: emac registration failed: %d\n",
	573	ret);
	574
	575	ret = da8xx_register_watchdog();
	576	if (ret)
	577	pr_warning("da830_evm_init: watchdog registration failed: %d\n",
	578	ret);
	579
	580	davinci_serial_init(&da830_evm_uart_config);
	581	i2c_register_board_info(1, da830_evm_i2c_devices,
	582	ARRAY_SIZE(da830_evm_i2c_devices));
e33ef5e3	583
3821d10a	584	ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
e33ef5e3 C	585	if (ret)
	586	pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
	587	ret);
	588
b8864aa4	589	da8xx_register_mcasp(1, &da830_evm_snd_data);
2eb30c81 DG	590
2eb30c81 DG	591	da830_evm_init_mmc();
13e1f044	592
c51df70b MG	593	ret = da8xx_register_rtc();
	594	if (ret)
	595	pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
8593790d MG	596	}
	597
	598	#ifdef CONFIG_SERIAL_8250_CONSOLE
	599	static int __init da830_evm_console_init(void)
	600	{
	601	return add_preferred_console("ttyS", 2, "115200");
	602	}
	603	console_initcall(da830_evm_console_init);
	604	#endif
	605
8593790d MG	606	static void __init da830_evm_map_io(void)
	607	{
	608	da830_init();
	609	}
	610
48ea89ea	611	MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
8593790d MG	612	.phys_io = IO_PHYS,
	613	.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	614	.boot_params = (DA8XX_DDR_BASE + 0x100),
	615	.map_io = da830_evm_map_io,
bd808947	616	.init_irq = cp_intc_init,
8593790d MG	617	.timer = &davinci_timer,
	618	.init_machine = da830_evm_init,
	619	MACHINE_END