[deliverable/linux.git] / arch / arm / mach-davinci / board-da830-evm.c

/*
 * TI DA830/OMAP L137 EVM board
 *
 * Author: Mark A. Greer <mgreer@mvista.com>
 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
 *
 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c/pcf857x.h>
#include <linux/i2c/at24.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <mach/cp_intc.h>
#include <mach/mux.h>
#include <linux/platform_data/mtd-davinci.h>
#include <mach/da8xx.h>
#include <linux/platform_data/usb-davinci.h>
#include <linux/platform_data/mtd-davinci-aemif.h>
#include <linux/platform_data/spi-davinci.h>

#define DA830_EVM_PHY_ID		""
/*
 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
 */
#define ON_BD_USB_DRV	GPIO_TO_PIN(1, 15)
#define ON_BD_USB_OVC	GPIO_TO_PIN(2, 4)

static const short da830_evm_usb11_pins[] = {
	DA830_GPIO1_15, DA830_GPIO2_4,
	-1
};

static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;

static int da830_evm_usb_set_power(unsigned port, int on)
{
	gpio_set_value(ON_BD_USB_DRV, on);
	return 0;
}

static int da830_evm_usb_get_power(unsigned port)
{
	return gpio_get_value(ON_BD_USB_DRV);
}

static int da830_evm_usb_get_oci(unsigned port)
{
	return !gpio_get_value(ON_BD_USB_OVC);
}

static irqreturn_t da830_evm_usb_ocic_irq(int, void *);

static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
{
	int irq 	= gpio_to_irq(ON_BD_USB_OVC);
	int error	= 0;

	if (handler != NULL) {
		da830_evm_usb_ocic_handler = handler;

		error = request_irq(irq, da830_evm_usb_ocic_irq,
				    IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
				    "OHCI over-current indicator", NULL);
		if (error)
			printk(KERN_ERR "%s: could not request IRQ to watch "
			       "over-current indicator changes\n", __func__);
	} else
		free_irq(irq, NULL);

	return error;
}

static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
	.set_power	= da830_evm_usb_set_power,
	.get_power	= da830_evm_usb_get_power,
	.get_oci	= da830_evm_usb_get_oci,
	.ocic_notify	= da830_evm_usb_ocic_notify,

	/* TPS2065 switch @ 5V */
	.potpgt		= (3 + 1) / 2,	/* 3 ms max */
};

static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
{
	da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
	return IRQ_HANDLED;
}

static __init void da830_evm_usb_init(void)
{
	u32 cfgchip2;
	int ret;

	/*
	 * Set up USB clock/mode in the CFGCHIP2 register.
	 * FYI:  CFGCHIP2 is 0x0000ef00 initially.
	 */
	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));

	/* USB2.0 PHY reference clock is 24 MHz */
	cfgchip2 &= ~CFGCHIP2_REFFREQ;
	cfgchip2 |=  CFGCHIP2_REFFREQ_24MHZ;

	/*
	 * Select internal reference clock for USB 2.0 PHY
	 * and use it as a clock source for USB 1.1 PHY
	 * (this is the default setting anyway).
	 */
	cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
	cfgchip2 |=  CFGCHIP2_USB2PHYCLKMUX;

	/*
	 * We have to override VBUS/ID signals when MUSB is configured into the
	 * host-only mode -- ID pin will float if no cable is connected, so the
	 * controller won't be able to drive VBUS thinking that it's a B-device.
	 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
	 */
	cfgchip2 &= ~CFGCHIP2_OTGMODE;
#ifdef	CONFIG_USB_MUSB_HOST
	cfgchip2 |=  CFGCHIP2_FORCE_HOST;
#else
	cfgchip2 |=  CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
#endif

	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));

	/* USB_REFCLKIN is not used. */
	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
	if (ret)
		pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
			   __func__, ret);
	else {
		/*
		 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
		 * with the power on to power good time of 3 ms.
		 */
		ret = da8xx_register_usb20(1000, 3);
		if (ret)
			pr_warning("%s: USB 2.0 registration failed: %d\n",
				   __func__, ret);
	}

	ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
	if (ret) {
		pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
			   __func__, ret);
		return;
	}

	ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
	if (ret) {
		printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
		       "power control: %d\n", __func__, ret);
		return;
	}
	gpio_direction_output(ON_BD_USB_DRV, 0);

	ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
	if (ret) {
		printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
		       "over-current indicator: %d\n", __func__, ret);
		return;
	}
	gpio_direction_input(ON_BD_USB_OVC);

	ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
	if (ret)
		pr_warning("%s: USB 1.1 registration failed: %d\n",
			   __func__, ret);
}

static const short da830_evm_mcasp1_pins[] = {
	DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
	DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
	DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
	DA830_AXR1_11,
	-1
};

static u8 da830_iis_serializer_direction[] = {
	RX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	TX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
};

static struct snd_platform_data da830_evm_snd_data = {
	.tx_dma_offset  = 0x2000,
	.rx_dma_offset  = 0x2000,
	.op_mode        = DAVINCI_MCASP_IIS_MODE,
	.num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
	.tdm_slots      = 2,
	.serial_dir     = da830_iis_serializer_direction,
	.asp_chan_q     = EVENTQ_0,
	.version	= MCASP_VERSION_2,
	.txnumevt	= 1,
	.rxnumevt	= 1,
};

/*
 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
 */
static const short da830_evm_mmc_sd_pins[] = {
	DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
	DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
	DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
	DA830_MMCSD_CMD,   DA830_GPIO2_1,     DA830_GPIO2_2,
	-1
};

#define DA830_MMCSD_WP_PIN		GPIO_TO_PIN(2, 1)
#define DA830_MMCSD_CD_PIN		GPIO_TO_PIN(2, 2)

static int da830_evm_mmc_get_ro(int index)
{
	return gpio_get_value(DA830_MMCSD_WP_PIN);
}

static int da830_evm_mmc_get_cd(int index)
{
	return !gpio_get_value(DA830_MMCSD_CD_PIN);
}

static struct davinci_mmc_config da830_evm_mmc_config = {
	.get_ro			= da830_evm_mmc_get_ro,
	.get_cd			= da830_evm_mmc_get_cd,
	.wires			= 8,
	.max_freq		= 50000000,
	.caps			= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
};

static inline void da830_evm_init_mmc(void)
{
	int ret;

	ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
	if (ret) {
		pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
				ret);
		return;
	}

	ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
	if (ret) {
		pr_warning("da830_evm_init: can not open GPIO %d\n",
			   DA830_MMCSD_WP_PIN);
		return;
	}
	gpio_direction_input(DA830_MMCSD_WP_PIN);

	ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
	if (ret) {
		pr_warning("da830_evm_init: can not open GPIO %d\n",
			   DA830_MMCSD_CD_PIN);
		return;
	}
	gpio_direction_input(DA830_MMCSD_CD_PIN);

	ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
	if (ret) {
		pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
				ret);
		gpio_free(DA830_MMCSD_WP_PIN);
	}
}

/*
 * UI board NAND/NOR flashes only use 8-bit data bus.
 */
static const short da830_evm_emif25_pins[] = {
	DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
	DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
	DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
	DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
	DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
	DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
	DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
	-1
};

#define HAS_MMC		IS_ENABLED(CONFIG_MMC_DAVINCI)

#ifdef CONFIG_DA830_UI_NAND
static struct mtd_partition da830_evm_nand_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	[0] = {
		.name		= "bootloader",
		.offset		= 0,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	/* bootloader params in the next sector */
	[1] = {
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	/* kernel */
	[2] = {
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_2M,
		.mask_flags	= 0,
	},
	/* file system */
	[3] = {
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	}
};

/* flash bbt decriptors */
static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };

static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
	.options	= NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
			  NAND_BBT_WRITE | NAND_BBT_2BIT |
			  NAND_BBT_VERSION | NAND_BBT_PERCHIP,
	.offs		= 2,
	.len		= 4,
	.veroffs	= 16,
	.maxblocks	= 4,
	.pattern	= da830_evm_nand_bbt_pattern
};

static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
	.options	= NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
			  NAND_BBT_WRITE | NAND_BBT_2BIT |
			  NAND_BBT_VERSION | NAND_BBT_PERCHIP,
	.offs		= 2,
	.len		= 4,
	.veroffs	= 16,
	.maxblocks	= 4,
	.pattern	= da830_evm_nand_mirror_pattern
};

static struct davinci_aemif_timing da830_evm_nandflash_timing = {
	.wsetup         = 24,
	.wstrobe        = 21,
	.whold          = 14,
	.rsetup         = 19,
	.rstrobe        = 50,
	.rhold          = 0,
	.ta             = 20,
};

static struct davinci_nand_pdata da830_evm_nand_pdata = {
	.parts		= da830_evm_nand_partitions,
	.nr_parts	= ARRAY_SIZE(da830_evm_nand_partitions),
	.ecc_mode	= NAND_ECC_HW,
	.ecc_bits	= 4,
	.bbt_options	= NAND_BBT_USE_FLASH,
	.bbt_td		= &da830_evm_nand_bbt_main_descr,
	.bbt_md		= &da830_evm_nand_bbt_mirror_descr,
	.timing         = &da830_evm_nandflash_timing,
};

static struct resource da830_evm_nand_resources[] = {
	[0] = {		/* First memory resource is NAND I/O window */
		.start	= DA8XX_AEMIF_CS3_BASE,
		.end	= DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {		/* Second memory resource is AEMIF control registers */
		.start	= DA8XX_AEMIF_CTL_BASE,
		.end	= DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da830_evm_nand_device = {
	.name		= "davinci_nand",
	.id		= 1,
	.dev		= {
		.platform_data	= &da830_evm_nand_pdata,
	},
	.num_resources	= ARRAY_SIZE(da830_evm_nand_resources),
	.resource	= da830_evm_nand_resources,
};

static inline void da830_evm_init_nand(int mux_mode)
{
	int ret;

	if (HAS_MMC) {
		pr_warning("WARNING: both MMC/SD and NAND are "
				"enabled, but they share AEMIF pins.\n"
				"\tDisable MMC/SD for NAND support.\n");
		return;
	}

	ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
	if (ret)
		pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
				ret);

	ret = platform_device_register(&da830_evm_nand_device);
	if (ret)
		pr_warning("da830_evm_init: NAND device not registered.\n");

	gpio_direction_output(mux_mode, 1);
}
#else
static inline void da830_evm_init_nand(int mux_mode) { }
#endif

#ifdef CONFIG_DA830_UI_LCD
static inline void da830_evm_init_lcdc(int mux_mode)
{
	int ret;

	ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
	if (ret)
		pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
				ret);

	ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
	if (ret)
		pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);

	gpio_direction_output(mux_mode, 0);
}
#else
static inline void da830_evm_init_lcdc(int mux_mode) { }
#endif

static struct at24_platform_data da830_evm_i2c_eeprom_info = {
	.byte_len	= SZ_256K / 8,
	.page_size	= 64,
	.flags		= AT24_FLAG_ADDR16,
	.setup		= davinci_get_mac_addr,
	.context	= (void *)0x7f00,
};

static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
		int gpio, unsigned ngpio, void *context)
{
	gpio_request(gpio + 6, "UI MUX_MODE");

	/* Drive mux mode low to match the default without UI card */
	gpio_direction_output(gpio + 6, 0);

	da830_evm_init_lcdc(gpio + 6);

	da830_evm_init_nand(gpio + 6);

	return 0;
}

static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
		unsigned ngpio, void *context)
{
	gpio_free(gpio + 6);
	return 0;
}

static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
	.gpio_base	= DAVINCI_N_GPIO,
	.setup		= da830_evm_ui_expander_setup,
	.teardown	= da830_evm_ui_expander_teardown,
};

static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
	{
		I2C_BOARD_INFO("24c256", 0x50),
		.platform_data	= &da830_evm_i2c_eeprom_info,
	},
	{
		I2C_BOARD_INFO("tlv320aic3x", 0x18),
	},
	{
		I2C_BOARD_INFO("pcf8574", 0x3f),
		.platform_data	= &da830_evm_ui_expander_info,
	},
};

static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
	.bus_freq	= 100,	/* kHz */
	.bus_delay	= 0,	/* usec */
};

/*
 * The following EDMA channels/slots are not being used by drivers (for
 * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
 * they are being reserved for codecs on the DSP side.
 */
static const s16 da830_dma_rsv_chans[][2] = {
	/* (offset, number) */
	{ 8,  2},
	{12,  2},
	{24,  4},
	{30,  2},
	{-1, -1}
};

static const s16 da830_dma_rsv_slots[][2] = {
	/* (offset, number) */
	{ 8,  2},
	{12,  2},
	{24,  4},
	{30, 26},
	{-1, -1}
};

static struct edma_rsv_info da830_edma_rsv[] = {
	{
		.rsv_chans	= da830_dma_rsv_chans,
		.rsv_slots	= da830_dma_rsv_slots,
	},
};

static struct mtd_partition da830evm_spiflash_part[] = {
	[0] = {
		.name = "DSP-UBL",
		.offset = 0,
		.size = SZ_8K,
		.mask_flags = MTD_WRITEABLE,
	},
	[1] = {
		.name = "ARM-UBL",
		.offset = MTDPART_OFS_APPEND,
		.size = SZ_16K + SZ_8K,
		.mask_flags = MTD_WRITEABLE,
	},
	[2] = {
		.name = "U-Boot",
		.offset = MTDPART_OFS_APPEND,
		.size = SZ_256K - SZ_32K,
		.mask_flags = MTD_WRITEABLE,
	},
	[3] = {
		.name = "U-Boot-Environment",
		.offset = MTDPART_OFS_APPEND,
		.size = SZ_16K,
		.mask_flags = 0,
	},
	[4] = {
		.name = "Kernel",
		.offset = MTDPART_OFS_APPEND,
		.size = MTDPART_SIZ_FULL,
		.mask_flags = 0,
	},
};

static struct flash_platform_data da830evm_spiflash_data = {
	.name		= "m25p80",
	.parts		= da830evm_spiflash_part,
	.nr_parts	= ARRAY_SIZE(da830evm_spiflash_part),
	.type		= "w25x32",
};

static struct davinci_spi_config da830evm_spiflash_cfg = {
	.io_type	= SPI_IO_TYPE_DMA,
	.c2tdelay	= 8,
	.t2cdelay	= 8,
};

static struct spi_board_info da830evm_spi_info[] = {
	{
		.modalias		= "m25p80",
		.platform_data		= &da830evm_spiflash_data,
		.controller_data	= &da830evm_spiflash_cfg,
		.mode			= SPI_MODE_0,
		.max_speed_hz		= 30000000,
		.bus_num		= 0,
		.chip_select		= 0,
	},
};

static __init void da830_evm_init(void)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;
	int ret;

	ret = da830_register_edma(da830_edma_rsv);
	if (ret)
		pr_warning("da830_evm_init: edma registration failed: %d\n",
				ret);

	ret = davinci_cfg_reg_list(da830_i2c0_pins);
	if (ret)
		pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
				ret);

	ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
	if (ret)
		pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
				ret);

	da830_evm_usb_init();

	soc_info->emac_pdata->rmii_en = 1;
	soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;

	ret = davinci_cfg_reg_list(da830_cpgmac_pins);
	if (ret)
		pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
				ret);

	ret = da8xx_register_emac();
	if (ret)
		pr_warning("da830_evm_init: emac registration failed: %d\n",
				ret);

	ret = da8xx_register_watchdog();
	if (ret)
		pr_warning("da830_evm_init: watchdog registration failed: %d\n",
				ret);

	davinci_serial_init(da8xx_serial_device);
	i2c_register_board_info(1, da830_evm_i2c_devices,
			ARRAY_SIZE(da830_evm_i2c_devices));

	ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
	if (ret)
		pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
				ret);

	da8xx_register_mcasp(1, &da830_evm_snd_data);

	da830_evm_init_mmc();

	ret = da8xx_register_rtc();
	if (ret)
		pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);

	ret = spi_register_board_info(da830evm_spi_info,
				      ARRAY_SIZE(da830evm_spi_info));
	if (ret)
		pr_warn("%s: spi info registration failed: %d\n", __func__,
			ret);

	ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
	if (ret)
		pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
			   ret);
}

#ifdef CONFIG_SERIAL_8250_CONSOLE
static int __init da830_evm_console_init(void)
{
	if (!machine_is_davinci_da830_evm())
		return 0;

	return add_preferred_console("ttyS", 2, "115200");
}
console_initcall(da830_evm_console_init);
#endif

static void __init da830_evm_map_io(void)
{
	da830_init();
}

MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
	.atag_offset	= 0x100,
	.map_io		= da830_evm_map_io,
	.init_irq	= cp_intc_init,
	.init_time	= davinci_timer_init,
	.init_machine	= da830_evm_init,
	.init_late	= davinci_init_late,
	.dma_zone_size	= SZ_128M,
	.restart	= da8xx_restart,
MACHINE_END
Commit	Line	Data
8593790d MG	1	/*
	2	* TI DA830/OMAP L137 EVM board
	3	*
	4	* Author: Mark A. Greer <mgreer@mvista.com>
	5	* Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
	6	*
	7	* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
	8	* the terms of the GNU General Public License version 2. This program
	9	* is licensed "as is" without any warranty of any kind, whether express
	10	* or implied.
	11	*/
	12	#include <linux/kernel.h>
8593790d MG	13	#include <linux/init.h>
8593790d MG	14	#include <linux/console.h>
0e9a3ddc	15	#include <linux/interrupt.h>
13e1f044	16	#include <linux/gpio.h>
733975a3	17	#include <linux/platform_device.h>
8593790d	18	#include <linux/i2c.h>
13e1f044	19	#include <linux/i2c/pcf857x.h>
8593790d	20	#include <linux/i2c/at24.h>
733975a3 DG	21	#include <linux/mtd/mtd.h>
733975a3 DG	22	#include <linux/mtd/partitions.h>
16a3c832 SN	23	#include <linux/spi/spi.h>
16a3c832 SN	24	#include <linux/spi/flash.h>
8593790d MG	25
	26	#include <asm/mach-types.h>
	27	#include <asm/mach/arch.h>
	28
8593790d	29	#include <mach/cp_intc.h>
32bf078c	30	#include <mach/mux.h>
ec2a0833	31	#include <linux/platform_data/mtd-davinci.h>
8593790d	32	#include <mach/da8xx.h>
ec2a0833 AB	33	#include <linux/platform_data/usb-davinci.h>
	34	#include <linux/platform_data/mtd-davinci-aemif.h>
	35	#include <linux/platform_data/spi-davinci.h>
8593790d	36
782f2d78	37	#define DA830_EVM_PHY_ID ""
0e9a3ddc SS	38	/*
	39	* USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
	40	*/
	41	#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
	42	#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
	43
	44	static const short da830_evm_usb11_pins[] = {
	45	DA830_GPIO1_15, DA830_GPIO2_4,
	46	-1
	47	};
	48
	49	static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
	50
	51	static int da830_evm_usb_set_power(unsigned port, int on)
	52	{
	53	gpio_set_value(ON_BD_USB_DRV, on);
	54	return 0;
	55	}
	56
	57	static int da830_evm_usb_get_power(unsigned port)
	58	{
	59	return gpio_get_value(ON_BD_USB_DRV);
	60	}
	61
	62	static int da830_evm_usb_get_oci(unsigned port)
	63	{
	64	return !gpio_get_value(ON_BD_USB_OVC);
	65	}
	66
	67	static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
	68
	69	static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
	70	{
	71	int irq = gpio_to_irq(ON_BD_USB_OVC);
	72	int error = 0;
	73
	74	if (handler != NULL) {
	75	da830_evm_usb_ocic_handler = handler;
	76
1091a654	77	error = request_irq(irq, da830_evm_usb_ocic_irq,
0e9a3ddc SS	78	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,
	79	"OHCI over-current indicator", NULL);
	80	if (error)
	81	printk(KERN_ERR "%s: could not request IRQ to watch "
	82	"over-current indicator changes\n", __func__);
	83	} else
	84	free_irq(irq, NULL);
	85
	86	return error;
	87	}
	88
	89	static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
	90	.set_power = da830_evm_usb_set_power,
	91	.get_power = da830_evm_usb_get_power,
	92	.get_oci = da830_evm_usb_get_oci,
	93	.ocic_notify = da830_evm_usb_ocic_notify,
	94
	95	/* TPS2065 switch @ 5V */
	96	.potpgt = (3 + 1) / 2, /* 3 ms max */
	97	};
	98
	99	static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
	100	{
	101	da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
	102	return IRQ_HANDLED;
	103	}
	104
	105	static __init void da830_evm_usb_init(void)
	106	{
	107	u32 cfgchip2;
	108	int ret;
	109
	110	/*
	111	* Set up USB clock/mode in the CFGCHIP2 register.
	112	* FYI: CFGCHIP2 is 0x0000ef00 initially.
	113	*/
d2de0582	114	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
0e9a3ddc SS	115
	116	/* USB2.0 PHY reference clock is 24 MHz */
	117	cfgchip2 &= ~CFGCHIP2_REFFREQ;
	118	cfgchip2 \|= CFGCHIP2_REFFREQ_24MHZ;
	119
	120	/*
	121	* Select internal reference clock for USB 2.0 PHY
	122	* and use it as a clock source for USB 1.1 PHY
	123	* (this is the default setting anyway).
	124	*/
	125	cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
	126	cfgchip2 \|= CFGCHIP2_USB2PHYCLKMUX;
	127
ca6a272a SS	128	/*
	129	* We have to override VBUS/ID signals when MUSB is configured into the
	130	* host-only mode -- ID pin will float if no cable is connected, so the
	131	* controller won't be able to drive VBUS thinking that it's a B-device.
	132	* Otherwise, we want to use the OTG mode and enable VBUS comparators.
	133	*/
	134	cfgchip2 &= ~CFGCHIP2_OTGMODE;
	135	#ifdef CONFIG_USB_MUSB_HOST
	136	cfgchip2 \|= CFGCHIP2_FORCE_HOST;
	137	#else
	138	cfgchip2 \|= CFGCHIP2_SESENDEN \| CFGCHIP2_VBDTCTEN;
	139	#endif
	140
d2de0582	141	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
0e9a3ddc	142
ca6a272a SS	143	/* USB_REFCLKIN is not used. */
	144	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
	145	if (ret)
	146	pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
	147	__func__, ret);
	148	else {
	149	/*
	150	* TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
	151	* with the power on to power good time of 3 ms.
	152	*/
	153	ret = da8xx_register_usb20(1000, 3);
	154	if (ret)
	155	pr_warning("%s: USB 2.0 registration failed: %d\n",
	156	__func__, ret);
	157	}
	158
3821d10a	159	ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
0e9a3ddc SS	160	if (ret) {
	161	pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
	162	__func__, ret);
	163	return;
	164	}
	165
	166	ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
	167	if (ret) {
	168	printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
	169	"power control: %d\n", __func__, ret);
	170	return;
	171	}
	172	gpio_direction_output(ON_BD_USB_DRV, 0);
	173
	174	ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
	175	if (ret) {
	176	printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
	177	"over-current indicator: %d\n", __func__, ret);
	178	return;
	179	}
	180	gpio_direction_input(ON_BD_USB_OVC);
	181
	182	ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
	183	if (ret)
	184	pr_warning("%s: USB 1.1 registration failed: %d\n",
	185	__func__, ret);
	186	}
	187
32bf078c MG	188	static const short da830_evm_mcasp1_pins[] = {
	189	DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
	190	DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
	191	DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
	192	DA830_AXR1_11,
	193	-1
	194	};
	195
e33ef5e3 C	196	static u8 da830_iis_serializer_direction[] = {
	197	RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	198	INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
	199	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	200	};
	201
	202	static struct snd_platform_data da830_evm_snd_data = {
	203	.tx_dma_offset = 0x2000,
	204	.rx_dma_offset = 0x2000,
	205	.op_mode = DAVINCI_MCASP_IIS_MODE,
	206	.num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
	207	.tdm_slots = 2,
	208	.serial_dir = da830_iis_serializer_direction,
48519f0a	209	.asp_chan_q = EVENTQ_0,
e33ef5e3 C	210	.version = MCASP_VERSION_2,
	211	.txnumevt = 1,
	212	.rxnumevt = 1,
	213	};
	214
2eb30c81 DG	215	/*
	216	* GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
	217	*/
	218	static const short da830_evm_mmc_sd_pins[] = {
	219	DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
	220	DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
	221	DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
	222	DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
	223	-1
	224	};
	225
	226	#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
8ccfd3f0	227	#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
2eb30c81 DG	228
	229	static int da830_evm_mmc_get_ro(int index)
	230	{
	231	return gpio_get_value(DA830_MMCSD_WP_PIN);
	232	}
	233
8ccfd3f0 VB	234	static int da830_evm_mmc_get_cd(int index)
	235	{
	236	return !gpio_get_value(DA830_MMCSD_CD_PIN);
	237	}
	238
2eb30c81 DG	239	static struct davinci_mmc_config da830_evm_mmc_config = {
2eb30c81 DG	240	.get_ro = da830_evm_mmc_get_ro,
8ccfd3f0	241	.get_cd = da830_evm_mmc_get_cd,
d154fed7	242	.wires = 8,
0046d0bf C	243	.max_freq = 50000000,
0046d0bf C	244	.caps = MMC_CAP_MMC_HIGHSPEED \| MMC_CAP_SD_HIGHSPEED,
2eb30c81 DG	245	};
	246
	247	static inline void da830_evm_init_mmc(void)
	248	{
	249	int ret;
	250
3821d10a	251	ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
2eb30c81 DG	252	if (ret) {
	253	pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
	254	ret);
	255	return;
	256	}
	257
	258	ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
	259	if (ret) {
	260	pr_warning("da830_evm_init: can not open GPIO %d\n",
	261	DA830_MMCSD_WP_PIN);
	262	return;
	263	}
	264	gpio_direction_input(DA830_MMCSD_WP_PIN);
	265
8ccfd3f0 VB	266	ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
	267	if (ret) {
	268	pr_warning("da830_evm_init: can not open GPIO %d\n",
	269	DA830_MMCSD_CD_PIN);
	270	return;
	271	}
	272	gpio_direction_input(DA830_MMCSD_CD_PIN);
	273
2eb30c81 DG	274	ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
	275	if (ret) {
	276	pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
	277	ret);
	278	gpio_free(DA830_MMCSD_WP_PIN);
	279	}
	280	}
	281
a0433ac3 SN	282	/*
	283	* UI board NAND/NOR flashes only use 8-bit data bus.
	284	*/
	285	static const short da830_evm_emif25_pins[] = {
	286	DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
	287	DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
	288	DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
	289	DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
	290	DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
	291	DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
	292	DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
	293	-1
	294	};
	295
a0a56db9	296	#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
b5ebe4e1	297
733975a3 DG	298	#ifdef CONFIG_DA830_UI_NAND
	299	static struct mtd_partition da830_evm_nand_partitions[] = {
	300	/* bootloader (U-Boot, etc) in first sector */
	301	[0] = {
	302	.name = "bootloader",
	303	.offset = 0,
	304	.size = SZ_128K,
	305	.mask_flags = MTD_WRITEABLE, /* force read-only */
	306	},
	307	/* bootloader params in the next sector */
	308	[1] = {
	309	.name = "params",
	310	.offset = MTDPART_OFS_APPEND,
	311	.size = SZ_128K,
	312	.mask_flags = MTD_WRITEABLE, /* force read-only */
	313	},
	314	/* kernel */
	315	[2] = {
	316	.name = "kernel",
	317	.offset = MTDPART_OFS_APPEND,
	318	.size = SZ_2M,
	319	.mask_flags = 0,
	320	},
	321	/* file system */
	322	[3] = {
	323	.name = "filesystem",
	324	.offset = MTDPART_OFS_APPEND,
	325	.size = MTDPART_SIZ_FULL,
	326	.mask_flags = 0,
	327	}
	328	};
	329
	330	/* flash bbt decriptors */
	331	static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
	332	static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
	333
	334	static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
	335	.options = NAND_BBT_LASTBLOCK \| NAND_BBT_CREATE \|
	336	NAND_BBT_WRITE \| NAND_BBT_2BIT \|
	337	NAND_BBT_VERSION \| NAND_BBT_PERCHIP,
	338	.offs = 2,
	339	.len = 4,
	340	.veroffs = 16,
	341	.maxblocks = 4,
	342	.pattern = da830_evm_nand_bbt_pattern
	343	};
	344
	345	static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
	346	.options = NAND_BBT_LASTBLOCK \| NAND_BBT_CREATE \|
	347	NAND_BBT_WRITE \| NAND_BBT_2BIT \|
	348	NAND_BBT_VERSION \| NAND_BBT_PERCHIP,
	349	.offs = 2,
	350	.len = 4,
	351	.veroffs = 16,
	352	.maxblocks = 4,
	353	.pattern = da830_evm_nand_mirror_pattern
	354	};
	355
217f1366 SR	356	static struct davinci_aemif_timing da830_evm_nandflash_timing = {
	357	.wsetup = 24,
	358	.wstrobe = 21,
	359	.whold = 14,
	360	.rsetup = 19,
	361	.rstrobe = 50,
	362	.rhold = 0,
	363	.ta = 20,
	364	};
	365
733975a3 DG	366	static struct davinci_nand_pdata da830_evm_nand_pdata = {
	367	.parts = da830_evm_nand_partitions,
	368	.nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
	369	.ecc_mode = NAND_ECC_HW,
	370	.ecc_bits = 4,
bb9ebd4e	371	.bbt_options = NAND_BBT_USE_FLASH,
733975a3 DG	372	.bbt_td = &da830_evm_nand_bbt_main_descr,
733975a3 DG	373	.bbt_md = &da830_evm_nand_bbt_mirror_descr,
217f1366	374	.timing = &da830_evm_nandflash_timing,
733975a3 DG	375	};
	376
	377	static struct resource da830_evm_nand_resources[] = {
	378	[0] = { /* First memory resource is NAND I/O window */
002cb2d2 SS	379	.start = DA8XX_AEMIF_CS3_BASE,
002cb2d2 SS	380	.end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
733975a3 DG	381	.flags = IORESOURCE_MEM,
	382	},
	383	[1] = { /* Second memory resource is AEMIF control registers */
002cb2d2 SS	384	.start = DA8XX_AEMIF_CTL_BASE,
002cb2d2 SS	385	.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
733975a3 DG	386	.flags = IORESOURCE_MEM,
	387	},
	388	};
	389
	390	static struct platform_device da830_evm_nand_device = {
	391	.name = "davinci_nand",
	392	.id = 1,
	393	.dev = {
	394	.platform_data = &da830_evm_nand_pdata,
	395	},
	396	.num_resources = ARRAY_SIZE(da830_evm_nand_resources),
	397	.resource = da830_evm_nand_resources,
	398	};
a0433ac3	399
77316f05	400	static inline void da830_evm_init_nand(int mux_mode)
a0433ac3 SN	401	{
	402	int ret;
	403
b5ebe4e1 SN	404	if (HAS_MMC) {
	405	pr_warning("WARNING: both MMC/SD and NAND are "
	406	"enabled, but they share AEMIF pins.\n"
	407	"\tDisable MMC/SD for NAND support.\n");
	408	return;
	409	}
	410
3821d10a	411	ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
a0433ac3 SN	412	if (ret)
	413	pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
	414	ret);
	415
	416	ret = platform_device_register(&da830_evm_nand_device);
	417	if (ret)
	418	pr_warning("da830_evm_init: NAND device not registered.\n");
77316f05 SN	419
77316f05 SN	420	gpio_direction_output(mux_mode, 1);
a0433ac3 SN	421	}
a0433ac3 SN	422	#else
77316f05	423	static inline void da830_evm_init_nand(int mux_mode) { }
733975a3 DG	424	#endif
733975a3 DG	425
a0433ac3	426	#ifdef CONFIG_DA830_UI_LCD
77316f05	427	static inline void da830_evm_init_lcdc(int mux_mode)
a0433ac3 SN	428	{
	429	int ret;
	430
3821d10a	431	ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
a0433ac3 SN	432	if (ret)
	433	pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
	434	ret);
	435
	436	ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
	437	if (ret)
	438	pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
77316f05 SN	439
77316f05 SN	440	gpio_direction_output(mux_mode, 0);
a0433ac3 SN	441	}
a0433ac3 SN	442	#else
77316f05	443	static inline void da830_evm_init_lcdc(int mux_mode) { }
a0433ac3	444	#endif
733975a3	445
77316f05 SN	446	static struct at24_platform_data da830_evm_i2c_eeprom_info = {
	447	.byte_len = SZ_256K / 8,
	448	.page_size = 64,
	449	.flags = AT24_FLAG_ADDR16,
	450	.setup = davinci_get_mac_addr,
	451	.context = (void *)0x7f00,
	452	};
	453
1ef203c3 SR	454	static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
1ef203c3 SR	455	int gpio, unsigned ngpio, void *context)
77316f05 SN	456	{
	457	gpio_request(gpio + 6, "UI MUX_MODE");
	458
b5ebe4e1 SN	459	/* Drive mux mode low to match the default without UI card */
	460	gpio_direction_output(gpio + 6, 0);
	461
77316f05 SN	462	da830_evm_init_lcdc(gpio + 6);
	463
	464	da830_evm_init_nand(gpio + 6);
	465
	466	return 0;
	467	}
	468
	469	static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
	470	unsigned ngpio, void *context)
	471	{
	472	gpio_free(gpio + 6);
	473	return 0;
	474	}
	475
1ef203c3	476	static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
77316f05 SN	477	.gpio_base = DAVINCI_N_GPIO,
	478	.setup = da830_evm_ui_expander_setup,
	479	.teardown = da830_evm_ui_expander_teardown,
	480	};
	481
	482	static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
	483	{
	484	I2C_BOARD_INFO("24c256", 0x50),
	485	.platform_data = &da830_evm_i2c_eeprom_info,
	486	},
	487	{
	488	I2C_BOARD_INFO("tlv320aic3x", 0x18),
	489	},
	490	{
	491	I2C_BOARD_INFO("pcf8574", 0x3f),
	492	.platform_data = &da830_evm_ui_expander_info,
	493	},
	494	};
	495
	496	static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
	497	.bus_freq = 100, /* kHz */
	498	.bus_delay = 0, /* usec */
	499	};
	500
a941c503 RS	501	/*
	502	* The following EDMA channels/slots are not being used by drivers (for
	503	* example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
	504	* they are being reserved for codecs on the DSP side.
	505	*/
	506	static const s16 da830_dma_rsv_chans[][2] = {
	507	/* (offset, number) */
	508	{ 8, 2},
	509	{12, 2},
	510	{24, 4},
	511	{30, 2},
	512	{-1, -1}
	513	};
	514
	515	static const s16 da830_dma_rsv_slots[][2] = {
	516	/* (offset, number) */
	517	{ 8, 2},
	518	{12, 2},
	519	{24, 4},
	520	{30, 26},
	521	{-1, -1}
	522	};
	523
	524	static struct edma_rsv_info da830_edma_rsv[] = {
	525	{
	526	.rsv_chans = da830_dma_rsv_chans,
	527	.rsv_slots = da830_dma_rsv_slots,
	528	},
	529	};
	530
16a3c832 SN	531	static struct mtd_partition da830evm_spiflash_part[] = {
	532	[0] = {
	533	.name = "DSP-UBL",
	534	.offset = 0,
	535	.size = SZ_8K,
	536	.mask_flags = MTD_WRITEABLE,
	537	},
	538	[1] = {
	539	.name = "ARM-UBL",
	540	.offset = MTDPART_OFS_APPEND,
	541	.size = SZ_16K + SZ_8K,
	542	.mask_flags = MTD_WRITEABLE,
	543	},
	544	[2] = {
	545	.name = "U-Boot",
	546	.offset = MTDPART_OFS_APPEND,
	547	.size = SZ_256K - SZ_32K,
	548	.mask_flags = MTD_WRITEABLE,
	549	},
	550	[3] = {
	551	.name = "U-Boot-Environment",
	552	.offset = MTDPART_OFS_APPEND,
	553	.size = SZ_16K,
	554	.mask_flags = 0,
	555	},
	556	[4] = {
	557	.name = "Kernel",
	558	.offset = MTDPART_OFS_APPEND,
	559	.size = MTDPART_SIZ_FULL,
	560	.mask_flags = 0,
	561	},
	562	};
	563
	564	static struct flash_platform_data da830evm_spiflash_data = {
	565	.name = "m25p80",
	566	.parts = da830evm_spiflash_part,
	567	.nr_parts = ARRAY_SIZE(da830evm_spiflash_part),
	568	.type = "w25x32",
	569	};
	570
	571	static struct davinci_spi_config da830evm_spiflash_cfg = {
	572	.io_type = SPI_IO_TYPE_DMA,
	573	.c2tdelay = 8,
	574	.t2cdelay = 8,
	575	};
	576
	577	static struct spi_board_info da830evm_spi_info[] = {
	578	{
	579	.modalias = "m25p80",
	580	.platform_data = &da830evm_spiflash_data,
	581	.controller_data = &da830evm_spiflash_cfg,
	582	.mode = SPI_MODE_0,
	583	.max_speed_hz = 30000000,
	584	.bus_num = 0,
	585	.chip_select = 0,
	586	},
	587	};
	588
8593790d MG	589	static __init void da830_evm_init(void)
	590	{
	591	struct davinci_soc_info *soc_info = &davinci_soc_info;
	592	int ret;
	593
a941c503	594	ret = da830_register_edma(da830_edma_rsv);
8593790d MG	595	if (ret)
	596	pr_warning("da830_evm_init: edma registration failed: %d\n",
	597	ret);
	598
3821d10a	599	ret = davinci_cfg_reg_list(da830_i2c0_pins);
8593790d MG	600	if (ret)
	601	pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
	602	ret);
	603
	604	ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
	605	if (ret)
	606	pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
	607	ret);
	608
0e9a3ddc SS	609	da830_evm_usb_init();
0e9a3ddc SS	610
8593790d	611	soc_info->emac_pdata->rmii_en = 1;
782f2d78	612	soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
8593790d	613
3821d10a	614	ret = davinci_cfg_reg_list(da830_cpgmac_pins);
8593790d MG	615	if (ret)
	616	pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
	617	ret);
	618
	619	ret = da8xx_register_emac();
	620	if (ret)
	621	pr_warning("da830_evm_init: emac registration failed: %d\n",
	622	ret);
	623
	624	ret = da8xx_register_watchdog();
	625	if (ret)
	626	pr_warning("da830_evm_init: watchdog registration failed: %d\n",
	627	ret);
	628
fcf7157b	629	davinci_serial_init(da8xx_serial_device);
8593790d MG	630	i2c_register_board_info(1, da830_evm_i2c_devices,
8593790d MG	631	ARRAY_SIZE(da830_evm_i2c_devices));
e33ef5e3	632
3821d10a	633	ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
e33ef5e3 C	634	if (ret)
	635	pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
	636	ret);
	637
b8864aa4	638	da8xx_register_mcasp(1, &da830_evm_snd_data);
2eb30c81 DG	639
2eb30c81 DG	640	da830_evm_init_mmc();
13e1f044	641
c51df70b MG	642	ret = da8xx_register_rtc();
	643	if (ret)
	644	pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
16a3c832	645
0273612c VD	646	ret = spi_register_board_info(da830evm_spi_info,
	647	ARRAY_SIZE(da830evm_spi_info));
	648	if (ret)
	649	pr_warn("%s: spi info registration failed: %d\n", __func__,
	650	ret);
	651
	652	ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
16a3c832 SN	653	if (ret)
	654	pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
	655	ret);
8593790d MG	656	}
	657
	658	#ifdef CONFIG_SERIAL_8250_CONSOLE
	659	static int __init da830_evm_console_init(void)
	660	{
1aa5f2a9 MW	661	if (!machine_is_davinci_da830_evm())
	662	return 0;
	663
8593790d MG	664	return add_preferred_console("ttyS", 2, "115200");
	665	}
	666	console_initcall(da830_evm_console_init);
	667	#endif
	668
8593790d MG	669	static void __init da830_evm_map_io(void)
	670	{
	671	da830_init();
	672	}
	673
48ea89ea	674	MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
e7e56014	675	.atag_offset = 0x100,
8593790d	676	.map_io = da830_evm_map_io,
bd808947	677	.init_irq = cp_intc_init,
6bb27d73	678	.init_time = davinci_timer_init,
8593790d	679	.init_machine = da830_evm_init,
3aa3e840	680	.init_late = davinci_init_late,
f68deabf	681	.dma_zone_size = SZ_128M,
c6121ddd	682	.restart = da8xx_restart,
8593790d	683	MACHINE_END