[deliverable/linux.git] / arch / arm / mach-davinci / board-da830-evm.c

/*
 * TI DA830/OMAP L137 EVM board
 *
 * Author: Mark A. Greer <mgreer@mvista.com>
 * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
 *
 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c/pcf857x.h>
#include <linux/i2c/at24.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <mach/cp_intc.h>
#include <mach/mux.h>
#include <mach/nand.h>
#include <mach/da8xx.h>
#include <mach/usb.h>

#define DA830_EVM_PHY_MASK		0x0
#define DA830_EVM_MDIO_FREQUENCY	2200000	/* PHY bus frequency */

/*
 * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
 */
#define ON_BD_USB_DRV	GPIO_TO_PIN(1, 15)
#define ON_BD_USB_OVC	GPIO_TO_PIN(2, 4)

static const short da830_evm_usb11_pins[] = {
	DA830_GPIO1_15, DA830_GPIO2_4,
	-1
};

static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;

static int da830_evm_usb_set_power(unsigned port, int on)
{
	gpio_set_value(ON_BD_USB_DRV, on);
	return 0;
}

static int da830_evm_usb_get_power(unsigned port)
{
	return gpio_get_value(ON_BD_USB_DRV);
}

static int da830_evm_usb_get_oci(unsigned port)
{
	return !gpio_get_value(ON_BD_USB_OVC);
}

static irqreturn_t da830_evm_usb_ocic_irq(int, void *);

static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
{
	int irq 	= gpio_to_irq(ON_BD_USB_OVC);
	int error	= 0;

	if (handler != NULL) {
		da830_evm_usb_ocic_handler = handler;

		error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
				    IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
				    "OHCI over-current indicator", NULL);
		if (error)
			printk(KERN_ERR "%s: could not request IRQ to watch "
			       "over-current indicator changes\n", __func__);
	} else
		free_irq(irq, NULL);

	return error;
}

static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
	.set_power	= da830_evm_usb_set_power,
	.get_power	= da830_evm_usb_get_power,
	.get_oci	= da830_evm_usb_get_oci,
	.ocic_notify	= da830_evm_usb_ocic_notify,

	/* TPS2065 switch @ 5V */
	.potpgt		= (3 + 1) / 2,	/* 3 ms max */
};

static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
{
	da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
	return IRQ_HANDLED;
}

static __init void da830_evm_usb_init(void)
{
	u32 cfgchip2;
	int ret;

	/*
	 * Set up USB clock/mode in the CFGCHIP2 register.
	 * FYI:  CFGCHIP2 is 0x0000ef00 initially.
	 */
	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));

	/* USB2.0 PHY reference clock is 24 MHz */
	cfgchip2 &= ~CFGCHIP2_REFFREQ;
	cfgchip2 |=  CFGCHIP2_REFFREQ_24MHZ;

	/*
	 * Select internal reference clock for USB 2.0 PHY
	 * and use it as a clock source for USB 1.1 PHY
	 * (this is the default setting anyway).
	 */
	cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
	cfgchip2 |=  CFGCHIP2_USB2PHYCLKMUX;

	/*
	 * We have to override VBUS/ID signals when MUSB is configured into the
	 * host-only mode -- ID pin will float if no cable is connected, so the
	 * controller won't be able to drive VBUS thinking that it's a B-device.
	 * Otherwise, we want to use the OTG mode and enable VBUS comparators.
	 */
	cfgchip2 &= ~CFGCHIP2_OTGMODE;
#ifdef	CONFIG_USB_MUSB_HOST
	cfgchip2 |=  CFGCHIP2_FORCE_HOST;
#else
	cfgchip2 |=  CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
#endif

	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));

	/* USB_REFCLKIN is not used. */
	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
	if (ret)
		pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
			   __func__, ret);
	else {
		/*
		 * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
		 * with the power on to power good time of 3 ms.
		 */
		ret = da8xx_register_usb20(1000, 3);
		if (ret)
			pr_warning("%s: USB 2.0 registration failed: %d\n",
				   __func__, ret);
	}

	ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
	if (ret) {
		pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
			   __func__, ret);
		return;
	}

	ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
	if (ret) {
		printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
		       "power control: %d\n", __func__, ret);
		return;
	}
	gpio_direction_output(ON_BD_USB_DRV, 0);

	ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
	if (ret) {
		printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
		       "over-current indicator: %d\n", __func__, ret);
		return;
	}
	gpio_direction_input(ON_BD_USB_OVC);

	ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
	if (ret)
		pr_warning("%s: USB 1.1 registration failed: %d\n",
			   __func__, ret);
}

static struct davinci_uart_config da830_evm_uart_config __initdata = {
	.enabled_uarts = 0x7,
};

static const short da830_evm_mcasp1_pins[] = {
	DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
	DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
	DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
	DA830_AXR1_11,
	-1
};

static u8 da830_iis_serializer_direction[] = {
	RX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	TX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
};

static struct snd_platform_data da830_evm_snd_data = {
	.tx_dma_offset  = 0x2000,
	.rx_dma_offset  = 0x2000,
	.op_mode        = DAVINCI_MCASP_IIS_MODE,
	.num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
	.tdm_slots      = 2,
	.serial_dir     = da830_iis_serializer_direction,
	.eventq_no      = EVENTQ_0,
	.version	= MCASP_VERSION_2,
	.txnumevt	= 1,
	.rxnumevt	= 1,
};

/*
 * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
 */
static const short da830_evm_mmc_sd_pins[] = {
	DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
	DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
	DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
	DA830_MMCSD_CMD,   DA830_GPIO2_1,     DA830_GPIO2_2,
	-1
};

#define DA830_MMCSD_WP_PIN		GPIO_TO_PIN(2, 1)
#define DA830_MMCSD_CD_PIN		GPIO_TO_PIN(2, 2)

static int da830_evm_mmc_get_ro(int index)
{
	return gpio_get_value(DA830_MMCSD_WP_PIN);
}

static int da830_evm_mmc_get_cd(int index)
{
	return !gpio_get_value(DA830_MMCSD_CD_PIN);
}

static struct davinci_mmc_config da830_evm_mmc_config = {
	.get_ro			= da830_evm_mmc_get_ro,
	.get_cd			= da830_evm_mmc_get_cd,
	.wires			= 8,
	.max_freq		= 50000000,
	.caps			= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
	.version		= MMC_CTLR_VERSION_2,
};

static inline void da830_evm_init_mmc(void)
{
	int ret;

	ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
	if (ret) {
		pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
				ret);
		return;
	}

	ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
	if (ret) {
		pr_warning("da830_evm_init: can not open GPIO %d\n",
			   DA830_MMCSD_WP_PIN);
		return;
	}
	gpio_direction_input(DA830_MMCSD_WP_PIN);

	ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
	if (ret) {
		pr_warning("da830_evm_init: can not open GPIO %d\n",
			   DA830_MMCSD_CD_PIN);
		return;
	}
	gpio_direction_input(DA830_MMCSD_CD_PIN);

	ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
	if (ret) {
		pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
				ret);
		gpio_free(DA830_MMCSD_WP_PIN);
	}
}

/*
 * UI board NAND/NOR flashes only use 8-bit data bus.
 */
static const short da830_evm_emif25_pins[] = {
	DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
	DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
	DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
	DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
	DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
	DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
	DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
	-1
};

#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
#define HAS_MMC	1
#else
#define HAS_MMC	0
#endif

#ifdef CONFIG_DA830_UI_NAND
static struct mtd_partition da830_evm_nand_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	[0] = {
		.name		= "bootloader",
		.offset		= 0,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	/* bootloader params in the next sector */
	[1] = {
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	/* kernel */
	[2] = {
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_2M,
		.mask_flags	= 0,
	},
	/* file system */
	[3] = {
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	}
};

/* flash bbt decriptors */
static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };

static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
	.options	= NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
			  NAND_BBT_WRITE | NAND_BBT_2BIT |
			  NAND_BBT_VERSION | NAND_BBT_PERCHIP,
	.offs		= 2,
	.len		= 4,
	.veroffs	= 16,
	.maxblocks	= 4,
	.pattern	= da830_evm_nand_bbt_pattern
};

static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
	.options	= NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
			  NAND_BBT_WRITE | NAND_BBT_2BIT |
			  NAND_BBT_VERSION | NAND_BBT_PERCHIP,
	.offs		= 2,
	.len		= 4,
	.veroffs	= 16,
	.maxblocks	= 4,
	.pattern	= da830_evm_nand_mirror_pattern
};

static struct davinci_nand_pdata da830_evm_nand_pdata = {
	.parts		= da830_evm_nand_partitions,
	.nr_parts	= ARRAY_SIZE(da830_evm_nand_partitions),
	.ecc_mode	= NAND_ECC_HW,
	.ecc_bits	= 4,
	.options	= NAND_USE_FLASH_BBT,
	.bbt_td		= &da830_evm_nand_bbt_main_descr,
	.bbt_md		= &da830_evm_nand_bbt_mirror_descr,
};

static struct resource da830_evm_nand_resources[] = {
	[0] = {		/* First memory resource is NAND I/O window */
		.start	= DA8XX_AEMIF_CS3_BASE,
		.end	= DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {		/* Second memory resource is AEMIF control registers */
		.start	= DA8XX_AEMIF_CTL_BASE,
		.end	= DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da830_evm_nand_device = {
	.name		= "davinci_nand",
	.id		= 1,
	.dev		= {
		.platform_data	= &da830_evm_nand_pdata,
	},
	.num_resources	= ARRAY_SIZE(da830_evm_nand_resources),
	.resource	= da830_evm_nand_resources,
};

static inline void da830_evm_init_nand(int mux_mode)
{
	int ret;

	if (HAS_MMC) {
		pr_warning("WARNING: both MMC/SD and NAND are "
				"enabled, but they share AEMIF pins.\n"
				"\tDisable MMC/SD for NAND support.\n");
		return;
	}

	ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
	if (ret)
		pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
				ret);

	ret = platform_device_register(&da830_evm_nand_device);
	if (ret)
		pr_warning("da830_evm_init: NAND device not registered.\n");

	gpio_direction_output(mux_mode, 1);
}
#else
static inline void da830_evm_init_nand(int mux_mode) { }
#endif

#ifdef CONFIG_DA830_UI_LCD
static inline void da830_evm_init_lcdc(int mux_mode)
{
	int ret;

	ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
	if (ret)
		pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
				ret);

	ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
	if (ret)
		pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);

	gpio_direction_output(mux_mode, 0);
}
#else
static inline void da830_evm_init_lcdc(int mux_mode) { }
#endif

static struct at24_platform_data da830_evm_i2c_eeprom_info = {
	.byte_len	= SZ_256K / 8,
	.page_size	= 64,
	.flags		= AT24_FLAG_ADDR16,
	.setup		= davinci_get_mac_addr,
	.context	= (void *)0x7f00,
};

static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
		int gpio, unsigned ngpio, void *context)
{
	gpio_request(gpio + 6, "UI MUX_MODE");

	/* Drive mux mode low to match the default without UI card */
	gpio_direction_output(gpio + 6, 0);

	da830_evm_init_lcdc(gpio + 6);

	da830_evm_init_nand(gpio + 6);

	return 0;
}

static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
		unsigned ngpio, void *context)
{
	gpio_free(gpio + 6);
	return 0;
}

static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
	.gpio_base	= DAVINCI_N_GPIO,
	.setup		= da830_evm_ui_expander_setup,
	.teardown	= da830_evm_ui_expander_teardown,
};

static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
	{
		I2C_BOARD_INFO("24c256", 0x50),
		.platform_data	= &da830_evm_i2c_eeprom_info,
	},
	{
		I2C_BOARD_INFO("tlv320aic3x", 0x18),
	},
	{
		I2C_BOARD_INFO("pcf8574", 0x3f),
		.platform_data	= &da830_evm_ui_expander_info,
	},
};

static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
	.bus_freq	= 100,	/* kHz */
	.bus_delay	= 0,	/* usec */
};

static __init void da830_evm_init(void)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;
	int ret;

	ret = da8xx_register_edma();
	if (ret)
		pr_warning("da830_evm_init: edma registration failed: %d\n",
				ret);

	ret = davinci_cfg_reg_list(da830_i2c0_pins);
	if (ret)
		pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
				ret);

	ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
	if (ret)
		pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
				ret);

	da830_evm_usb_init();

	soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
	soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
	soc_info->emac_pdata->rmii_en = 1;

	ret = davinci_cfg_reg_list(da830_cpgmac_pins);
	if (ret)
		pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
				ret);

	ret = da8xx_register_emac();
	if (ret)
		pr_warning("da830_evm_init: emac registration failed: %d\n",
				ret);

	ret = da8xx_register_watchdog();
	if (ret)
		pr_warning("da830_evm_init: watchdog registration failed: %d\n",
				ret);

	davinci_serial_init(&da830_evm_uart_config);
	i2c_register_board_info(1, da830_evm_i2c_devices,
			ARRAY_SIZE(da830_evm_i2c_devices));

	ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
	if (ret)
		pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
				ret);

	da8xx_register_mcasp(1, &da830_evm_snd_data);

	da830_evm_init_mmc();

	ret = da8xx_register_rtc();
	if (ret)
		pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
}

#ifdef CONFIG_SERIAL_8250_CONSOLE
static int __init da830_evm_console_init(void)
{
	return add_preferred_console("ttyS", 2, "115200");
}
console_initcall(da830_evm_console_init);
#endif

static __init void da830_evm_irq_init(void)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
			soc_info->intc_irq_prios, NULL);
}

static void __init da830_evm_map_io(void)
{
	da830_init();
}

MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
	.phys_io	= IO_PHYS,
	.io_pg_offst	= (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	.boot_params	= (DA8XX_DDR_BASE + 0x100),
	.map_io		= da830_evm_map_io,
	.init_irq	= da830_evm_irq_init,
	.timer		= &davinci_timer,
	.init_machine	= da830_evm_init,
MACHINE_END
Commit	Line	Data
8593790d MG	1	/*
	2	* TI DA830/OMAP L137 EVM board
	3	*
	4	* Author: Mark A. Greer <mgreer@mvista.com>
	5	* Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
	6	*
	7	* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
	8	* the terms of the GNU General Public License version 2. This program
	9	* is licensed "as is" without any warranty of any kind, whether express
	10	* or implied.
	11	*/
	12	#include <linux/kernel.h>
8593790d MG	13	#include <linux/init.h>
8593790d MG	14	#include <linux/console.h>
0e9a3ddc	15	#include <linux/interrupt.h>
13e1f044	16	#include <linux/gpio.h>
733975a3	17	#include <linux/platform_device.h>
8593790d	18	#include <linux/i2c.h>
13e1f044	19	#include <linux/i2c/pcf857x.h>
8593790d	20	#include <linux/i2c/at24.h>
733975a3 DG	21	#include <linux/mtd/mtd.h>
733975a3 DG	22	#include <linux/mtd/partitions.h>
8593790d MG	23
	24	#include <asm/mach-types.h>
	25	#include <asm/mach/arch.h>
	26
8593790d	27	#include <mach/cp_intc.h>
32bf078c	28	#include <mach/mux.h>
733975a3	29	#include <mach/nand.h>
8593790d	30	#include <mach/da8xx.h>
0e9a3ddc	31	#include <mach/usb.h>
8593790d MG	32
	33	#define DA830_EVM_PHY_MASK 0x0
	34	#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
	35
0e9a3ddc SS	36	/*
	37	* USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
	38	*/
	39	#define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
	40	#define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
	41
	42	static const short da830_evm_usb11_pins[] = {
	43	DA830_GPIO1_15, DA830_GPIO2_4,
	44	-1
	45	};
	46
	47	static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
	48
	49	static int da830_evm_usb_set_power(unsigned port, int on)
	50	{
	51	gpio_set_value(ON_BD_USB_DRV, on);
	52	return 0;
	53	}
	54
	55	static int da830_evm_usb_get_power(unsigned port)
	56	{
	57	return gpio_get_value(ON_BD_USB_DRV);
	58	}
	59
	60	static int da830_evm_usb_get_oci(unsigned port)
	61	{
	62	return !gpio_get_value(ON_BD_USB_OVC);
	63	}
	64
	65	static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
	66
	67	static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
	68	{
	69	int irq = gpio_to_irq(ON_BD_USB_OVC);
	70	int error = 0;
	71
	72	if (handler != NULL) {
	73	da830_evm_usb_ocic_handler = handler;
	74
	75	error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED \|
	76	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,
	77	"OHCI over-current indicator", NULL);
	78	if (error)
	79	printk(KERN_ERR "%s: could not request IRQ to watch "
	80	"over-current indicator changes\n", __func__);
	81	} else
	82	free_irq(irq, NULL);
	83
	84	return error;
	85	}
	86
	87	static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
	88	.set_power = da830_evm_usb_set_power,
	89	.get_power = da830_evm_usb_get_power,
	90	.get_oci = da830_evm_usb_get_oci,
	91	.ocic_notify = da830_evm_usb_ocic_notify,
	92
	93	/* TPS2065 switch @ 5V */
	94	.potpgt = (3 + 1) / 2, /* 3 ms max */
	95	};
	96
	97	static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
	98	{
	99	da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
100	return IRQ_HANDLED;
101	}
102
103	static __init void da830_evm_usb_init(void)
104	{
105	u32 cfgchip2;
106	int ret;
107
108	/*
109	* Set up USB clock/mode in the CFGCHIP2 register.
110	* FYI: CFGCHIP2 is 0x0000ef00 initially.
111	*/
d2de0582	112	cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
0e9a3ddc SS	113
	114	/* USB2.0 PHY reference clock is 24 MHz */
	115	cfgchip2 &= ~CFGCHIP2_REFFREQ;
	116	cfgchip2 \|= CFGCHIP2_REFFREQ_24MHZ;
	117
	118	/*
	119	* Select internal reference clock for USB 2.0 PHY
	120	* and use it as a clock source for USB 1.1 PHY
	121	* (this is the default setting anyway).
	122	*/
	123	cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
	124	cfgchip2 \|= CFGCHIP2_USB2PHYCLKMUX;
	125
ca6a272a SS	126	/*
	127	* We have to override VBUS/ID signals when MUSB is configured into the
	128	* host-only mode -- ID pin will float if no cable is connected, so the
	129	* controller won't be able to drive VBUS thinking that it's a B-device.
	130	* Otherwise, we want to use the OTG mode and enable VBUS comparators.
	131	*/
	132	cfgchip2 &= ~CFGCHIP2_OTGMODE;
	133	#ifdef CONFIG_USB_MUSB_HOST
	134	cfgchip2 \|= CFGCHIP2_FORCE_HOST;
	135	#else
	136	cfgchip2 \|= CFGCHIP2_SESENDEN \| CFGCHIP2_VBDTCTEN;
	137	#endif
	138
d2de0582	139	__raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG));
0e9a3ddc	140
ca6a272a SS	141	/* USB_REFCLKIN is not used. */
	142	ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
	143	if (ret)
	144	pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
	145	__func__, ret);
	146	else {
	147	/*
	148	* TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
	149	* with the power on to power good time of 3 ms.
	150	*/
	151	ret = da8xx_register_usb20(1000, 3);
	152	if (ret)
	153	pr_warning("%s: USB 2.0 registration failed: %d\n",
	154	__func__, ret);
	155	}
	156
3821d10a	157	ret = davinci_cfg_reg_list(da830_evm_usb11_pins);
0e9a3ddc SS	158	if (ret) {
	159	pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
	160	__func__, ret);
	161	return;
	162	}
	163
	164	ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
	165	if (ret) {
	166	printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
	167	"power control: %d\n", __func__, ret);
	168	return;
	169	}
	170	gpio_direction_output(ON_BD_USB_DRV, 0);
	171
	172	ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
	173	if (ret) {
	174	printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
	175	"over-current indicator: %d\n", __func__, ret);
	176	return;
	177	}
	178	gpio_direction_input(ON_BD_USB_OVC);
	179
	180	ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
	181	if (ret)
	182	pr_warning("%s: USB 1.1 registration failed: %d\n",
	183	__func__, ret);
	184	}
	185
8593790d MG	186	static struct davinci_uart_config da830_evm_uart_config __initdata = {
	187	.enabled_uarts = 0x7,
	188	};
	189
32bf078c MG	190	static const short da830_evm_mcasp1_pins[] = {
	191	DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
	192	DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
	193	DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
	194	DA830_AXR1_11,
	195	-1
	196	};
	197
e33ef5e3 C	198	static u8 da830_iis_serializer_direction[] = {
	199	RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	200	INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
	201	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	202	};
	203
	204	static struct snd_platform_data da830_evm_snd_data = {
	205	.tx_dma_offset = 0x2000,
	206	.rx_dma_offset = 0x2000,
	207	.op_mode = DAVINCI_MCASP_IIS_MODE,
	208	.num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
	209	.tdm_slots = 2,
	210	.serial_dir = da830_iis_serializer_direction,
	211	.eventq_no = EVENTQ_0,
	212	.version = MCASP_VERSION_2,
	213	.txnumevt = 1,
	214	.rxnumevt = 1,
	215	};
	216
2eb30c81 DG	217	/*
	218	* GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
	219	*/
	220	static const short da830_evm_mmc_sd_pins[] = {
	221	DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
	222	DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
	223	DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
	224	DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
	225	-1
	226	};
	227
	228	#define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
8ccfd3f0	229	#define DA830_MMCSD_CD_PIN GPIO_TO_PIN(2, 2)
2eb30c81 DG	230
	231	static int da830_evm_mmc_get_ro(int index)
	232	{
	233	return gpio_get_value(DA830_MMCSD_WP_PIN);
	234	}
	235
8ccfd3f0 VB	236	static int da830_evm_mmc_get_cd(int index)
	237	{
	238	return !gpio_get_value(DA830_MMCSD_CD_PIN);
	239	}
	240
2eb30c81 DG	241	static struct davinci_mmc_config da830_evm_mmc_config = {
2eb30c81 DG	242	.get_ro = da830_evm_mmc_get_ro,
8ccfd3f0	243	.get_cd = da830_evm_mmc_get_cd,
d154fed7	244	.wires = 8,
0046d0bf C	245	.max_freq = 50000000,
0046d0bf C	246	.caps = MMC_CAP_MMC_HIGHSPEED \| MMC_CAP_SD_HIGHSPEED,
2eb30c81 DG	247	.version = MMC_CTLR_VERSION_2,
	248	};
	249
	250	static inline void da830_evm_init_mmc(void)
	251	{
	252	int ret;
	253
3821d10a	254	ret = davinci_cfg_reg_list(da830_evm_mmc_sd_pins);
2eb30c81 DG	255	if (ret) {
	256	pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
	257	ret);
	258	return;
	259	}
	260
	261	ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
	262	if (ret) {
	263	pr_warning("da830_evm_init: can not open GPIO %d\n",
	264	DA830_MMCSD_WP_PIN);
	265	return;
	266	}
	267	gpio_direction_input(DA830_MMCSD_WP_PIN);
	268
8ccfd3f0 VB	269	ret = gpio_request(DA830_MMCSD_CD_PIN, "MMC CD\n");
	270	if (ret) {
	271	pr_warning("da830_evm_init: can not open GPIO %d\n",
	272	DA830_MMCSD_CD_PIN);
	273	return;
	274	}
	275	gpio_direction_input(DA830_MMCSD_CD_PIN);
	276
2eb30c81 DG	277	ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
	278	if (ret) {
	279	pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
	280	ret);
	281	gpio_free(DA830_MMCSD_WP_PIN);
	282	}
	283	}
	284
a0433ac3 SN	285	/*
	286	* UI board NAND/NOR flashes only use 8-bit data bus.
	287	*/
	288	static const short da830_evm_emif25_pins[] = {
	289	DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
	290	DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
	291	DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
	292	DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
	293	DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
	294	DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
	295	DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
	296	-1
	297	};
	298
b5ebe4e1 SN	299	#if defined(CONFIG_MMC_DAVINCI) \|\| defined(CONFIG_MMC_DAVINCI_MODULE)
	300	#define HAS_MMC 1
	301	#else
	302	#define HAS_MMC 0
	303	#endif
	304
733975a3 DG	305	#ifdef CONFIG_DA830_UI_NAND
	306	static struct mtd_partition da830_evm_nand_partitions[] = {
	307	/* bootloader (U-Boot, etc) in first sector */
	308	[0] = {
	309	.name = "bootloader",
	310	.offset = 0,
	311	.size = SZ_128K,
	312	.mask_flags = MTD_WRITEABLE, /* force read-only */
	313	},
	314	/* bootloader params in the next sector */
	315	[1] = {
	316	.name = "params",
	317	.offset = MTDPART_OFS_APPEND,
	318	.size = SZ_128K,
	319	.mask_flags = MTD_WRITEABLE, /* force read-only */
	320	},
	321	/* kernel */
	322	[2] = {
	323	.name = "kernel",
	324	.offset = MTDPART_OFS_APPEND,
	325	.size = SZ_2M,
	326	.mask_flags = 0,
	327	},
	328	/* file system */
	329	[3] = {
	330	.name = "filesystem",
	331	.offset = MTDPART_OFS_APPEND,
	332	.size = MTDPART_SIZ_FULL,
	333	.mask_flags = 0,
	334	}
	335	};
	336
	337	/* flash bbt decriptors */
	338	static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
	339	static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
	340
	341	static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
	342	.options = NAND_BBT_LASTBLOCK \| NAND_BBT_CREATE \|
	343	NAND_BBT_WRITE \| NAND_BBT_2BIT \|
	344	NAND_BBT_VERSION \| NAND_BBT_PERCHIP,
	345	.offs = 2,
	346	.len = 4,
	347	.veroffs = 16,
	348	.maxblocks = 4,
	349	.pattern = da830_evm_nand_bbt_pattern
	350	};
	351
	352	static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
	353	.options = NAND_BBT_LASTBLOCK \| NAND_BBT_CREATE \|
	354	NAND_BBT_WRITE \| NAND_BBT_2BIT \|
	355	NAND_BBT_VERSION \| NAND_BBT_PERCHIP,
	356	.offs = 2,
	357	.len = 4,
	358	.veroffs = 16,
	359	.maxblocks = 4,
	360	.pattern = da830_evm_nand_mirror_pattern
	361	};
	362
	363	static struct davinci_nand_pdata da830_evm_nand_pdata = {
	364	.parts = da830_evm_nand_partitions,
	365	.nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
	366	.ecc_mode = NAND_ECC_HW,
	367	.ecc_bits = 4,
	368	.options = NAND_USE_FLASH_BBT,
369	.bbt_td = &da830_evm_nand_bbt_main_descr,
370	.bbt_md = &da830_evm_nand_bbt_mirror_descr,
371	};
372
373	static struct resource da830_evm_nand_resources[] = {
374	[0] = { /* First memory resource is NAND I/O window */
002cb2d2 SS	375	.start = DA8XX_AEMIF_CS3_BASE,
002cb2d2 SS	376	.end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1,
733975a3 DG	377	.flags = IORESOURCE_MEM,
	378	},
	379	[1] = { /* Second memory resource is AEMIF control registers */
002cb2d2 SS	380	.start = DA8XX_AEMIF_CTL_BASE,
002cb2d2 SS	381	.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
733975a3 DG	382	.flags = IORESOURCE_MEM,
	383	},
	384	};
	385
	386	static struct platform_device da830_evm_nand_device = {
	387	.name = "davinci_nand",
	388	.id = 1,
	389	.dev = {
	390	.platform_data = &da830_evm_nand_pdata,
	391	},
	392	.num_resources = ARRAY_SIZE(da830_evm_nand_resources),
	393	.resource = da830_evm_nand_resources,
	394	};
a0433ac3	395
77316f05	396	static inline void da830_evm_init_nand(int mux_mode)
a0433ac3 SN	397	{
	398	int ret;
	399
b5ebe4e1 SN	400	if (HAS_MMC) {
	401	pr_warning("WARNING: both MMC/SD and NAND are "
	402	"enabled, but they share AEMIF pins.\n"
	403	"\tDisable MMC/SD for NAND support.\n");
	404	return;
	405	}
	406
3821d10a	407	ret = davinci_cfg_reg_list(da830_evm_emif25_pins);
a0433ac3 SN	408	if (ret)
	409	pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
	410	ret);
	411
	412	ret = platform_device_register(&da830_evm_nand_device);
	413	if (ret)
	414	pr_warning("da830_evm_init: NAND device not registered.\n");
77316f05 SN	415
77316f05 SN	416	gpio_direction_output(mux_mode, 1);
a0433ac3 SN	417	}
a0433ac3 SN	418	#else
77316f05	419	static inline void da830_evm_init_nand(int mux_mode) { }
733975a3 DG	420	#endif
733975a3 DG	421
a0433ac3	422	#ifdef CONFIG_DA830_UI_LCD
77316f05	423	static inline void da830_evm_init_lcdc(int mux_mode)
a0433ac3 SN	424	{
	425	int ret;
	426
3821d10a	427	ret = davinci_cfg_reg_list(da830_lcdcntl_pins);
a0433ac3 SN	428	if (ret)
	429	pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
	430	ret);
	431
	432	ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
	433	if (ret)
	434	pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
77316f05 SN	435
77316f05 SN	436	gpio_direction_output(mux_mode, 0);
a0433ac3 SN	437	}
a0433ac3 SN	438	#else
77316f05	439	static inline void da830_evm_init_lcdc(int mux_mode) { }
a0433ac3	440	#endif
733975a3	441
77316f05 SN	442	static struct at24_platform_data da830_evm_i2c_eeprom_info = {
	443	.byte_len = SZ_256K / 8,
	444	.page_size = 64,
	445	.flags = AT24_FLAG_ADDR16,
	446	.setup = davinci_get_mac_addr,
	447	.context = (void *)0x7f00,
	448	};
	449
1ef203c3 SR	450	static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
1ef203c3 SR	451	int gpio, unsigned ngpio, void *context)
77316f05 SN	452	{
	453	gpio_request(gpio + 6, "UI MUX_MODE");
	454
b5ebe4e1 SN	455	/* Drive mux mode low to match the default without UI card */
	456	gpio_direction_output(gpio + 6, 0);
	457
77316f05 SN	458	da830_evm_init_lcdc(gpio + 6);
	459
	460	da830_evm_init_nand(gpio + 6);
	461
	462	return 0;
	463	}
	464
	465	static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
	466	unsigned ngpio, void *context)
	467	{
	468	gpio_free(gpio + 6);
	469	return 0;
	470	}
	471
1ef203c3	472	static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = {
77316f05 SN	473	.gpio_base = DAVINCI_N_GPIO,
	474	.setup = da830_evm_ui_expander_setup,
	475	.teardown = da830_evm_ui_expander_teardown,
	476	};
	477
	478	static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
	479	{
	480	I2C_BOARD_INFO("24c256", 0x50),
	481	.platform_data = &da830_evm_i2c_eeprom_info,
	482	},
	483	{
	484	I2C_BOARD_INFO("tlv320aic3x", 0x18),
	485	},
	486	{
	487	I2C_BOARD_INFO("pcf8574", 0x3f),
	488	.platform_data = &da830_evm_ui_expander_info,
	489	},
	490	};
	491
	492	static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
	493	.bus_freq = 100, /* kHz */
	494	.bus_delay = 0, /* usec */
	495	};
	496
8593790d MG	497	static __init void da830_evm_init(void)
	498	{
	499	struct davinci_soc_info *soc_info = &davinci_soc_info;
	500	int ret;
	501
	502	ret = da8xx_register_edma();
	503	if (ret)
	504	pr_warning("da830_evm_init: edma registration failed: %d\n",
	505	ret);
	506
3821d10a	507	ret = davinci_cfg_reg_list(da830_i2c0_pins);
8593790d MG	508	if (ret)
	509	pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
	510	ret);
	511
	512	ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
	513	if (ret)
	514	pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
	515	ret);
	516
0e9a3ddc SS	517	da830_evm_usb_init();
0e9a3ddc SS	518
8593790d MG	519	soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
	520	soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
	521	soc_info->emac_pdata->rmii_en = 1;
	522
3821d10a	523	ret = davinci_cfg_reg_list(da830_cpgmac_pins);
8593790d MG	524	if (ret)
	525	pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
	526	ret);
	527
	528	ret = da8xx_register_emac();
	529	if (ret)
	530	pr_warning("da830_evm_init: emac registration failed: %d\n",
	531	ret);
	532
	533	ret = da8xx_register_watchdog();
	534	if (ret)
	535	pr_warning("da830_evm_init: watchdog registration failed: %d\n",
	536	ret);
	537
	538	davinci_serial_init(&da830_evm_uart_config);
	539	i2c_register_board_info(1, da830_evm_i2c_devices,
	540	ARRAY_SIZE(da830_evm_i2c_devices));
e33ef5e3	541
3821d10a	542	ret = davinci_cfg_reg_list(da830_evm_mcasp1_pins);
e33ef5e3 C	543	if (ret)
	544	pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
	545	ret);
	546
b8864aa4	547	da8xx_register_mcasp(1, &da830_evm_snd_data);
2eb30c81 DG	548
2eb30c81 DG	549	da830_evm_init_mmc();
13e1f044	550
c51df70b MG	551	ret = da8xx_register_rtc();
	552	if (ret)
	553	pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
8593790d MG	554	}
	555
	556	#ifdef CONFIG_SERIAL_8250_CONSOLE
	557	static int __init da830_evm_console_init(void)
	558	{
	559	return add_preferred_console("ttyS", 2, "115200");
	560	}
	561	console_initcall(da830_evm_console_init);
	562	#endif
	563
	564	static __init void da830_evm_irq_init(void)
	565	{
	566	struct davinci_soc_info *soc_info = &davinci_soc_info;
	567
	568	cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
449ef7f6	569	soc_info->intc_irq_prios, NULL);
8593790d MG	570	}
	571
	572	static void __init da830_evm_map_io(void)
	573	{
	574	da830_init();
	575	}
	576
6af6564d	577	MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
8593790d MG	578	.phys_io = IO_PHYS,
	579	.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	580	.boot_params = (DA8XX_DDR_BASE + 0x100),
	581	.map_io = da830_evm_map_io,
	582	.init_irq = da830_evm_irq_init,
	583	.timer = &davinci_timer,
	584	.init_machine = da830_evm_init,
	585	MACHINE_END