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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/livep...
[deliverable/linux.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
0fbc5592 14#include <linux/console.h>
6809084a
MP		 15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/gpio_keys.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
0fbc5592 20#include <linux/i2c.h>
25f73ed5 21#include <linux/platform_data/at24.h>
5877457a 22#include <linux/platform_data/pca953x.h>
75929f5e 23#include <linux/input.h>
6809084a 24#include <linux/input/tps6507x-ts.h>
0bc20bba 25#include <linux/mfd/tps6507x.h>
38beb929
SR		 26#include <linux/mtd/mtd.h>
27#include <linux/mtd/nand.h>
28#include <linux/mtd/partitions.h>
7c5ec609 29#include <linux/mtd/physmap.h>
6809084a 30#include <linux/platform_device.h>
b856671e 31#include <linux/platform_data/gpio-davinci.h>
6809084a
MP		 32#include <linux/platform_data/mtd-davinci.h>
33#include <linux/platform_data/mtd-davinci-aemif.h>
34#include <linux/platform_data/spi-davinci.h>
ae41d17a 35#include <linux/platform_data/uio_pruss.h>
a9eb1f67 36#include <linux/regulator/machine.h>
8b24599e 37#include <linux/regulator/tps6507x.h>
9e9bc235 38#include <linux/regulator/fixed.h>
fdce5568
SN		 39#include <linux/spi/spi.h>
40#include <linux/spi/flash.h>
0fbc5592 41
b856671e 42#include <mach/common.h>
3acf731c 43#include "cp_intc.h"
0fbc5592 44#include <mach/da8xx.h>
7761ef67 45#include <mach/mux.h>
3acf731c 46#include "sram.h"
6809084a
MP		 47
48#include <asm/mach-types.h>
49#include <asm/mach/arch.h>
50#include <asm/system_info.h>
0fbc5592 51
b5dcee22
MCC		 52#include <media/i2c/tvp514x.h>
53#include <media/i2c/adv7343.h>
1e046d17 54
f6f97588 55#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
7761ef67 56#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 57#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 58
700691f2
SR		 59#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
60#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
61
2206771c
C		 62#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
63
fdce5568
SN		 64static struct mtd_partition da850evm_spiflash_part[] = {
65 [0] = {
66 .name = "UBL",
67 .offset = 0,
68 .size = SZ_64K,
69 .mask_flags = MTD_WRITEABLE,
70 },
71 [1] = {
72 .name = "U-Boot",
73 .offset = MTDPART_OFS_APPEND,
74 .size = SZ_512K,
75 .mask_flags = MTD_WRITEABLE,
76 },
77 [2] = {
78 .name = "U-Boot-Env",
79 .offset = MTDPART_OFS_APPEND,
80 .size = SZ_64K,
81 .mask_flags = MTD_WRITEABLE,
82 },
83 [3] = {
84 .name = "Kernel",
85 .offset = MTDPART_OFS_APPEND,
86 .size = SZ_2M + SZ_512K,
87 .mask_flags = 0,
88 },
89 [4] = {
90 .name = "Filesystem",
91 .offset = MTDPART_OFS_APPEND,
92 .size = SZ_4M,
93 .mask_flags = 0,
94 },
95 [5] = {
96 .name = "MAC-Address",
97 .offset = SZ_8M - SZ_64K,
98 .size = SZ_64K,
99 .mask_flags = MTD_WRITEABLE,
100 },
101};
102
103static struct flash_platform_data da850evm_spiflash_data = {
104 .name = "m25p80",
105 .parts = da850evm_spiflash_part,
106 .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
107 .type = "m25p64",
108};
109
110static struct davinci_spi_config da850evm_spiflash_cfg = {
111 .io_type = SPI_IO_TYPE_DMA,
112 .c2tdelay = 8,
113 .t2cdelay = 8,
114};
115
116static struct spi_board_info da850evm_spi_info[] = {
117 {
118 .modalias = "m25p80",
119 .platform_data = &da850evm_spiflash_data,
120 .controller_data = &da850evm_spiflash_cfg,
121 .mode = SPI_MODE_0,
122 .max_speed_hz = 30000000,
123 .bus_num = 1,
124 .chip_select = 0,
125 },
126};
127
810198bc
RS		 128#ifdef CONFIG_MTD
129static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
130{
131 char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
132 size_t retlen;
133
134 if (!strcmp(mtd->name, "MAC-Address")) {
329ad399 135 mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
810198bc
RS		 136 if (retlen == ETH_ALEN)
137 pr_info("Read MAC addr from SPI Flash: %pM\n",
138 mac_addr);
139 }
140}
141
142static struct mtd_notifier da850evm_spi_notifier = {
143 .add = da850_evm_m25p80_notify_add,
144};
145
146static void da850_evm_setup_mac_addr(void)
147{
148 register_mtd_user(&da850evm_spi_notifier);
149}
150#else
151static void da850_evm_setup_mac_addr(void) { }
152#endif
153
7c5ec609
SR		 154static struct mtd_partition da850_evm_norflash_partition[] = {
155 {
e2abd5a2 156 .name = "bootloaders + env",
7c5ec609 157 .offset = 0,
e2abd5a2
SR		 158 .size = SZ_512K,
159 .mask_flags = MTD_WRITEABLE,
160 },
161 {
162 .name = "kernel",
163 .offset = MTDPART_OFS_APPEND,
164 .size = SZ_2M,
165 .mask_flags = 0,
166 },
167 {
168 .name = "filesystem",
169 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 170 .size = MTDPART_SIZ_FULL,
171 .mask_flags = 0,
172 },
173};
174
175static struct physmap_flash_data da850_evm_norflash_data = {
176 .width = 2,
177 .parts = da850_evm_norflash_partition,
178 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
179};
180
181static struct resource da850_evm_norflash_resource[] = {
182 {
183 .start = DA8XX_AEMIF_CS2_BASE,
184 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
185 .flags = IORESOURCE_MEM,
186 },
187};
188
189static struct platform_device da850_evm_norflash_device = {
190 .name = "physmap-flash",
191 .id = 0,
192 .dev = {
193 .platform_data = &da850_evm_norflash_data,
194 },
195 .num_resources = 1,
196 .resource = da850_evm_norflash_resource,
197};
198
63534443
SN		 199static struct davinci_pm_config da850_pm_pdata = {
200 .sleepcount = 128,
201};
202
203static struct platform_device da850_pm_device = {
204 .name = "pm-davinci",
205 .dev = {
206 .platform_data = &da850_pm_pdata,
207 },
208 .id = -1,
209};
210
38beb929
SR		 211/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
212 * (128K blocks). It may be used instead of the (default) SPI flash
213 * to boot, using TI's tools to install the secondary boot loader
214 * (UBL) and U-Boot.
215 */
db549d22 216static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 217 {
218 .name = "u-boot env",
219 .offset = 0,
220 .size = SZ_128K,
221 .mask_flags = MTD_WRITEABLE,
222 },
223 {
224 .name = "UBL",
225 .offset = MTDPART_OFS_APPEND,
226 .size = SZ_128K,
227 .mask_flags = MTD_WRITEABLE,
228 },
229 {
230 .name = "u-boot",
231 .offset = MTDPART_OFS_APPEND,
232 .size = 4 * SZ_128K,
233 .mask_flags = MTD_WRITEABLE,
234 },
235 {
236 .name = "kernel",
237 .offset = 0x200000,
238 .size = SZ_2M,
239 .mask_flags = 0,
240 },
241 {
242 .name = "filesystem",
243 .offset = MTDPART_OFS_APPEND,
244 .size = MTDPART_SIZ_FULL,
245 .mask_flags = 0,
246 },
247};
248
18a8505c
SN		 249static struct davinci_aemif_timing da850_evm_nandflash_timing = {
250 .wsetup = 24,
251 .wstrobe = 21,
252 .whold = 14,
253 .rsetup = 19,
254 .rstrobe = 50,
255 .rhold = 0,
256 .ta = 20,
257};
258
38beb929
SR		 259static struct davinci_nand_pdata da850_evm_nandflash_data = {
260 .parts = da850_evm_nandflash_partition,
261 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
262 .ecc_mode = NAND_ECC_HW,
fc42e335 263 .ecc_bits = 4,
bb9ebd4e 264 .bbt_options = NAND_BBT_USE_FLASH,
18a8505c 265 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 266};
267
268static struct resource da850_evm_nandflash_resource[] = {
269 {
270 .start = DA8XX_AEMIF_CS3_BASE,
271 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
272 .flags = IORESOURCE_MEM,
273 },
274 {
275 .start = DA8XX_AEMIF_CTL_BASE,
276 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
277 .flags = IORESOURCE_MEM,
278 },
279};
280
281static struct platform_device da850_evm_nandflash_device = {
282 .name = "davinci_nand",
283 .id = 1,
284 .dev = {
285 .platform_data = &da850_evm_nandflash_data,
286 },
287 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
288 .resource = da850_evm_nandflash_resource,
289};
290
59858b71 291static struct platform_device *da850_evm_devices[] = {
039c5ee3
SR		 292 &da850_evm_nandflash_device,
293 &da850_evm_norflash_device,
294};
295
296#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
297#define DA8XX_AEMIF_ASIZE_16BIT 0x1
298
299static void __init da850_evm_init_nor(void)
300{
301 void __iomem *aemif_addr;
302
303 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
304
305 /* Configure data bus width of CS2 to 16 bit */
306 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
307 DA8XX_AEMIF_ASIZE_16BIT,
308 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
309
310 iounmap(aemif_addr);
311}
312
f48ecc2f
SS		 313static const short da850_evm_nand_pins[] = {
314 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
315 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
316 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
317 DA850_NEMA_WE, DA850_NEMA_OE,
318 -1
319};
320
321static const short da850_evm_nor_pins[] = {
322 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
323 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
324 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
325 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
326 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
327 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
328 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
329 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
330 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
331 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
332 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
333 DA850_EMA_A_22, DA850_EMA_A_23,
334 -1
335};
336
a0a56db9 337#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
039c5ee3 338
f48ecc2f 339static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 340{
341 int ret = 0;
342
b688c2fb 343 if (!HAS_MMC) {
f48ecc2f 344 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3 345 if (ret)
6c7c23cc
RT		 346 pr_warn("%s: NAND mux setup failed: %d\n",
347 __func__, ret);
039c5ee3 348
f48ecc2f 349 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3 350 if (ret)
6c7c23cc
RT		 351 pr_warn("%s: NOR mux setup failed: %d\n",
352 __func__, ret);
039c5ee3
SR		 353
354 da850_evm_init_nor();
355
356 platform_add_devices(da850_evm_devices,
357 ARRAY_SIZE(da850_evm_devices));
67f5185c
IK		 358
359 if (davinci_aemif_setup(&da850_evm_nandflash_device))
360 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
039c5ee3
SR		 361 }
362}
75e2ea64 363
bae10587
SN		 364#ifdef CONFIG_DA850_UI_RMII
365static inline void da850_evm_setup_emac_rmii(int rmii_sel)
366{
367 struct davinci_soc_info *soc_info = &davinci_soc_info;
368
369 soc_info->emac_pdata->rmii_en = 1;
47e7cb14 370 gpio_set_value_cansleep(rmii_sel, 0);
bae10587
SN		 371}
372#else
373static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
374#endif
375
75929f5e
BG		 376
377#define DA850_KEYS_DEBOUNCE_MS 10
378/*
379 * At 200ms polling interval it is possible to miss an
380 * event by tapping very lightly on the push button but most
381 * pushes do result in an event; longer intervals require the
382 * user to hold the button whereas shorter intervals require
383 * more CPU time for polling.
384 */
385#define DA850_GPIO_KEYS_POLL_MS 200
386
387enum da850_evm_ui_exp_pins {
388 DA850_EVM_UI_EXP_SEL_C = 5,
389 DA850_EVM_UI_EXP_SEL_B,
390 DA850_EVM_UI_EXP_SEL_A,
391 DA850_EVM_UI_EXP_PB8,
392 DA850_EVM_UI_EXP_PB7,
393 DA850_EVM_UI_EXP_PB6,
394 DA850_EVM_UI_EXP_PB5,
395 DA850_EVM_UI_EXP_PB4,
396 DA850_EVM_UI_EXP_PB3,
397 DA850_EVM_UI_EXP_PB2,
398 DA850_EVM_UI_EXP_PB1,
399};
400
58b6c5a1 401static const char * const da850_evm_ui_exp[] = {
75929f5e
BG		 402 [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
403 [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
404 [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
405 [DA850_EVM_UI_EXP_PB8] = "pb8",
406 [DA850_EVM_UI_EXP_PB7] = "pb7",
407 [DA850_EVM_UI_EXP_PB6] = "pb6",
408 [DA850_EVM_UI_EXP_PB5] = "pb5",
409 [DA850_EVM_UI_EXP_PB4] = "pb4",
410 [DA850_EVM_UI_EXP_PB3] = "pb3",
411 [DA850_EVM_UI_EXP_PB2] = "pb2",
412 [DA850_EVM_UI_EXP_PB1] = "pb1",
413};
414
415#define DA850_N_UI_PB 8
416
417static struct gpio_keys_button da850_evm_ui_keys[] = {
418 [0 ... DA850_N_UI_PB - 1] = {
419 .type = EV_KEY,
420 .active_low = 1,
421 .wakeup = 0,
422 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
423 .code = -1, /* assigned at runtime */
424 .gpio = -1, /* assigned at runtime */
425 .desc = NULL, /* assigned at runtime */
426 },
427};
428
429static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
430 .buttons = da850_evm_ui_keys,
431 .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
432 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
433};
434
435static struct platform_device da850_evm_ui_keys_device = {
436 .name = "gpio-keys-polled",
437 .id = 0,
438 .dev = {
439 .platform_data = &da850_evm_ui_keys_pdata
440 },
441};
442
443static void da850_evm_ui_keys_init(unsigned gpio)
444{
445 int i;
446 struct gpio_keys_button *button;
447
448 for (i = 0; i < DA850_N_UI_PB; i++) {
449 button = &da850_evm_ui_keys[i];
450 button->code = KEY_F8 - i;
14f6aeb4 451 button->desc = da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
75929f5e
BG		 452 button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
453 }
454}
455
1e046d17
MH		 456#ifdef CONFIG_DA850_UI_SD_VIDEO_PORT
457static inline void da850_evm_setup_video_port(int video_sel)
458{
459 gpio_set_value_cansleep(video_sel, 0);
460}
461#else
462static inline void da850_evm_setup_video_port(int video_sel) { }
463#endif
464
75e2ea64
C		 465static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
466 unsigned ngpio, void *c)
467{
468 int sel_a, sel_b, sel_c, ret;
469
53c2897d
BG		 470 sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
471 sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
472 sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
75e2ea64 473
53c2897d 474 ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
75e2ea64 475 if (ret) {
6c7c23cc 476 pr_warn("Cannot open UI expander pin %d\n", sel_a);
75e2ea64
C		 477 goto exp_setup_sela_fail;
478 }
479
53c2897d 480 ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
75e2ea64 481 if (ret) {
6c7c23cc 482 pr_warn("Cannot open UI expander pin %d\n", sel_b);
75e2ea64
C		 483 goto exp_setup_selb_fail;
484 }
485
53c2897d 486 ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
75e2ea64 487 if (ret) {
6c7c23cc 488 pr_warn("Cannot open UI expander pin %d\n", sel_c);
75e2ea64
C		 489 goto exp_setup_selc_fail;
490 }
491
492 /* deselect all functionalities */
493 gpio_direction_output(sel_a, 1);
494 gpio_direction_output(sel_b, 1);
495 gpio_direction_output(sel_c, 1);
496
75929f5e
BG		 497 da850_evm_ui_keys_init(gpio);
498 ret = platform_device_register(&da850_evm_ui_keys_device);
499 if (ret) {
6c7c23cc 500 pr_warn("Could not register UI GPIO expander push-buttons");
75929f5e
BG		 501 goto exp_setup_keys_fail;
502 }
503
75e2ea64
C		 504 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
505
506 da850_evm_setup_nor_nand();
507
bae10587 508 da850_evm_setup_emac_rmii(sel_a);
2206771c 509
1e046d17
MH		 510 da850_evm_setup_video_port(sel_c);
511
75e2ea64
C		 512 return 0;
513
75929f5e
BG		 514exp_setup_keys_fail:
515 gpio_free(sel_c);
75e2ea64
C		 516exp_setup_selc_fail:
517 gpio_free(sel_b);
518exp_setup_selb_fail:
519 gpio_free(sel_a);
520exp_setup_sela_fail:
521 return ret;
522}
523
524static int da850_evm_ui_expander_teardown(struct i2c_client *client,
525 unsigned gpio, unsigned ngpio, void *c)
526{
75929f5e
BG		 527 platform_device_unregister(&da850_evm_ui_keys_device);
528
75e2ea64 529 /* deselect all functionalities */
53c2897d
BG		 530 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
531 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
532 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
75e2ea64 533
53c2897d
BG		 534 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
535 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
536 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
75e2ea64
C		 537
538 return 0;
539}
540
70b30939
BG		 541/* assign the baseboard expander's GPIOs after the UI board's */
542#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
543#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
544
545enum da850_evm_bb_exp_pins {
546 DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
547 DA850_EVM_BB_EXP_SW_RST,
548 DA850_EVM_BB_EXP_TP_23,
549 DA850_EVM_BB_EXP_TP_22,
550 DA850_EVM_BB_EXP_TP_21,
551 DA850_EVM_BB_EXP_USER_PB1,
552 DA850_EVM_BB_EXP_USER_LED2,
553 DA850_EVM_BB_EXP_USER_LED1,
554 DA850_EVM_BB_EXP_USER_SW1,
555 DA850_EVM_BB_EXP_USER_SW2,
556 DA850_EVM_BB_EXP_USER_SW3,
557 DA850_EVM_BB_EXP_USER_SW4,
558 DA850_EVM_BB_EXP_USER_SW5,
559 DA850_EVM_BB_EXP_USER_SW6,
560 DA850_EVM_BB_EXP_USER_SW7,
561 DA850_EVM_BB_EXP_USER_SW8
562};
563
58b6c5a1 564static const char * const da850_evm_bb_exp[] = {
70b30939
BG		 565 [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
566 [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
567 [DA850_EVM_BB_EXP_TP_23] = "tp_23",
568 [DA850_EVM_BB_EXP_TP_22] = "tp_22",
569 [DA850_EVM_BB_EXP_TP_21] = "tp_21",
570 [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
571 [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
572 [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
573 [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
574 [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
575 [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
576 [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
577 [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
578 [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
579 [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
580 [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
581};
582
583#define DA850_N_BB_USER_SW 8
584
585static struct gpio_keys_button da850_evm_bb_keys[] = {
586 [0] = {
587 .type = EV_KEY,
588 .active_low = 1,
589 .wakeup = 0,
590 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
591 .code = KEY_PROG1,
592 .desc = NULL, /* assigned at runtime */
593 .gpio = -1, /* assigned at runtime */
594 },
595 [1 ... DA850_N_BB_USER_SW] = {
596 .type = EV_SW,
597 .active_low = 1,
598 .wakeup = 0,
599 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
600 .code = -1, /* assigned at runtime */
601 .desc = NULL, /* assigned at runtime */
602 .gpio = -1, /* assigned at runtime */
603 },
604};
605
606static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
607 .buttons = da850_evm_bb_keys,
608 .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
609 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
610};
611
612static struct platform_device da850_evm_bb_keys_device = {
613 .name = "gpio-keys-polled",
614 .id = 1,
615 .dev = {
616 .platform_data = &da850_evm_bb_keys_pdata
617 },
618};
619
620static void da850_evm_bb_keys_init(unsigned gpio)
621{
622 int i;
623 struct gpio_keys_button *button;
624
625 button = &da850_evm_bb_keys[0];
14f6aeb4 626 button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
70b30939
BG		 627 button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
628
629 for (i = 0; i < DA850_N_BB_USER_SW; i++) {
630 button = &da850_evm_bb_keys[i + 1];
631 button->code = SW_LID + i;
14f6aeb4 632 button->desc = da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
70b30939
BG		 633 button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
634 }
635}
636
637#define DA850_N_BB_USER_LED 2
638
639static struct gpio_led da850_evm_bb_leds[] = {
640 [0 ... DA850_N_BB_USER_LED - 1] = {
641 .active_low = 1,
642 .gpio = -1, /* assigned at runtime */
643 .name = NULL, /* assigned at runtime */
644 },
645};
646
647static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
648 .leds = da850_evm_bb_leds,
649 .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
650};
651
652static struct platform_device da850_evm_bb_leds_device = {
653 .name = "leds-gpio",
654 .id = -1,
655 .dev = {
656 .platform_data = &da850_evm_bb_leds_pdata
657 }
658};
659
660static void da850_evm_bb_leds_init(unsigned gpio)
661{
662 int i;
663 struct gpio_led *led;
664
665 for (i = 0; i < DA850_N_BB_USER_LED; i++) {
666 led = &da850_evm_bb_leds[i];
667
668 led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
669 led->name =
670 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
671 }
672}
673
674static int da850_evm_bb_expander_setup(struct i2c_client *client,
675 unsigned gpio, unsigned ngpio,
676 void *c)
677{
678 int ret;
679
680 /*
681 * Register the switches and pushbutton on the baseboard as a gpio-keys
682 * device.
683 */
684 da850_evm_bb_keys_init(gpio);
685 ret = platform_device_register(&da850_evm_bb_keys_device);
686 if (ret) {
6c7c23cc 687 pr_warn("Could not register baseboard GPIO expander keys");
70b30939
BG		 688 goto io_exp_setup_sw_fail;
689 }
690
691 da850_evm_bb_leds_init(gpio);
692 ret = platform_device_register(&da850_evm_bb_leds_device);
693 if (ret) {
6c7c23cc 694 pr_warn("Could not register baseboard GPIO expander LEDs");
70b30939
BG		 695 goto io_exp_setup_leds_fail;
696 }
697
698 return 0;
699
700io_exp_setup_leds_fail:
701 platform_device_unregister(&da850_evm_bb_keys_device);
702io_exp_setup_sw_fail:
703 return ret;
704}
705
706static int da850_evm_bb_expander_teardown(struct i2c_client *client,
707 unsigned gpio, unsigned ngpio, void *c)
708{
709 platform_device_unregister(&da850_evm_bb_leds_device);
710 platform_device_unregister(&da850_evm_bb_keys_device);
711
712 return 0;
713}
714
75e2ea64
C		 715static struct pca953x_platform_data da850_evm_ui_expander_info = {
716 .gpio_base = DAVINCI_N_GPIO,
717 .setup = da850_evm_ui_expander_setup,
718 .teardown = da850_evm_ui_expander_teardown,
75929f5e 719 .names = da850_evm_ui_exp,
75e2ea64
C		 720};
721
70b30939
BG		 722static struct pca953x_platform_data da850_evm_bb_expander_info = {
723 .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
724 .setup = da850_evm_bb_expander_setup,
725 .teardown = da850_evm_bb_expander_teardown,
726 .names = da850_evm_bb_exp,
727};
728
1a7ff8ff
C		 729static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
730 {
731 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 732 },
733 {
734 I2C_BOARD_INFO("tca6416", 0x20),
735 .platform_data = &da850_evm_ui_expander_info,
736 },
70b30939
BG		 737 {
738 I2C_BOARD_INFO("tca6416", 0x21),
739 .platform_data = &da850_evm_bb_expander_info,
740 },
1a7ff8ff
C		 741};
742
0fbc5592
SR		 743static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
744 .bus_freq = 100, /* kHz */
745 .bus_delay = 0, /* usec */
746};
747
491214e1
C		 748/* davinci da850 evm audio machine driver */
749static u8 da850_iis_serializer_direction[] = {
750 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
751 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
752 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
753 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
754};
755
756static struct snd_platform_data da850_evm_snd_data = {
88abfd5b
MP		 757 .tx_dma_offset = 0x2000,
758 .rx_dma_offset = 0x2000,
759 .op_mode = DAVINCI_MCASP_IIS_MODE,
760 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
761 .tdm_slots = 2,
762 .serial_dir = da850_iis_serializer_direction,
763 .asp_chan_q = EVENTQ_0,
764 .ram_chan_q = EVENTQ_1,
765 .version = MCASP_VERSION_2,
766 .txnumevt = 1,
767 .rxnumevt = 1,
768 .sram_size_playback = SZ_8K,
769 .sram_size_capture = SZ_8K,
491214e1
C		 770};
771
c840fc74
MW		 772static const short da850_evm_mcasp_pins[] __initconst = {
773 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
774 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
775 DA850_AXR_11, DA850_AXR_12,
776 -1
777};
778
700691f2
SR		 779static int da850_evm_mmc_get_ro(int index)
780{
781 return gpio_get_value(DA850_MMCSD_WP_PIN);
782}
783
784static int da850_evm_mmc_get_cd(int index)
785{
786 return !gpio_get_value(DA850_MMCSD_CD_PIN);
787}
788
789static struct davinci_mmc_config da850_mmc_config = {
790 .get_ro = da850_evm_mmc_get_ro,
791 .get_cd = da850_evm_mmc_get_cd,
792 .wires = 4,
0046d0bf
C		 793 .max_freq = 50000000,
794 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 795};
796
5a0d80ea
MW		 797static const short da850_evm_mmcsd0_pins[] __initconst = {
798 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
799 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
800 DA850_GPIO4_0, DA850_GPIO4_1,
801 -1
802};
803
d52f235f
C		 804static void da850_panel_power_ctrl(int val)
805{
806 /* lcd backlight */
807 gpio_set_value(DA850_LCD_BL_PIN, val);
808
809 /* lcd power */
810 gpio_set_value(DA850_LCD_PWR_PIN, val);
811}
812
5cbdf276
SR		 813static int da850_lcd_hw_init(void)
814{
815 int status;
816
817 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
818 if (status < 0)
819 return status;
820
821 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
822 if (status < 0) {
823 gpio_free(DA850_LCD_BL_PIN);
824 return status;
825 }
826
827 gpio_direction_output(DA850_LCD_BL_PIN, 0);
828 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
829
d52f235f
C		 830 /* Switch off panel power and backlight */
831 da850_panel_power_ctrl(0);
5cbdf276 832
d52f235f
C		 833 /* Switch on panel power and backlight */
834 da850_panel_power_ctrl(1);
5cbdf276
SR		 835
836 return 0;
837}
491214e1 838
9e9bc235
PU		 839/* Fixed regulator support */
840static struct regulator_consumer_supply fixed_supplies[] = {
841 /* Baseboard 3.3V: 5V -> TPS73701DCQ -> 3.3V */
842 REGULATOR_SUPPLY("AVDD", "1-0018"),
843 REGULATOR_SUPPLY("DRVDD", "1-0018"),
844
845 /* Baseboard 1.8V: 5V -> TPS73701DCQ -> 1.8V */
846 REGULATOR_SUPPLY("DVDD", "1-0018"),
847};
848
a9eb1f67
SN		 849/* TPS65070 voltage regulator support */
850
851/* 3.3V */
db549d22 852static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 853 {
854 .supply = "usb0_vdda33",
855 },
856 {
857 .supply = "usb1_vdda33",
858 },
859};
860
861/* 3.3V or 1.8V */
db549d22 862static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 863 {
864 .supply = "dvdd3318_a",
865 },
866 {
867 .supply = "dvdd3318_b",
868 },
869 {
870 .supply = "dvdd3318_c",
871 },
9e9bc235 872 REGULATOR_SUPPLY("IOVDD", "1-0018"),
a9eb1f67
SN		 873};
874
875/* 1.2V */
db549d22 876static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 877 {
878 .supply = "cvdd",
879 },
880};
881
882/* 1.8V LDO */
db549d22 883static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 884 {
885 .supply = "sata_vddr",
886 },
887 {
888 .supply = "usb0_vdda18",
889 },
890 {
891 .supply = "usb1_vdda18",
892 },
893 {
894 .supply = "ddr_dvdd18",
895 },
896};
897
898/* 1.2V LDO */
db549d22 899static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 900 {
901 .supply = "sata_vdd",
902 },
903 {
904 .supply = "pll0_vdda",
905 },
906 {
907 .supply = "pll1_vdda",
908 },
909 {
910 .supply = "usbs_cvdd",
911 },
912 {
913 .supply = "vddarnwa1",
914 },
915};
916
8b24599e
SN		 917/* We take advantage of the fact that both defdcdc{2,3} are tied high */
918static struct tps6507x_reg_platform_data tps6507x_platform_data = {
919 .defdcdc_default = true,
920};
921
db549d22 922static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 923 /* dcdc1 */
924 {
925 .constraints = {
926 .min_uV = 3150000,
927 .max_uV = 3450000,
928 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
929 REGULATOR_CHANGE_STATUS),
930 .boot_on = 1,
931 },
932 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
933 .consumer_supplies = tps65070_dcdc1_consumers,
934 },
935
936 /* dcdc2 */
937 {
938 .constraints = {
939 .min_uV = 1710000,
940 .max_uV = 3450000,
941 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
942 REGULATOR_CHANGE_STATUS),
943 .boot_on = 1,
79436f87 944 .always_on = 1,
a9eb1f67
SN		 945 },
946 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
947 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 948 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 949 },
950
951 /* dcdc3 */
952 {
953 .constraints = {
954 .min_uV = 950000,
28bd2c34 955 .max_uV = 1350000,
a9eb1f67
SN		 956 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
957 REGULATOR_CHANGE_STATUS),
958 .boot_on = 1,
959 },
960 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
961 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 962 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 963 },
964
965 /* ldo1 */
966 {
967 .constraints = {
968 .min_uV = 1710000,
969 .max_uV = 1890000,
970 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
971 REGULATOR_CHANGE_STATUS),
972 .boot_on = 1,
973 },
974 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
975 .consumer_supplies = tps65070_ldo1_consumers,
976 },
977
978 /* ldo2 */
979 {
980 .constraints = {
981 .min_uV = 1140000,
982 .max_uV = 1320000,
983 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
984 REGULATOR_CHANGE_STATUS),
985 .boot_on = 1,
986 },
987 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
988 .consumer_supplies = tps65070_ldo2_consumers,
989 },
990};
991
da1e3680
TF		 992static struct touchscreen_init_data tps6507x_touchscreen_data = {
993 .poll_period = 30, /* ms between touch samples */
994 .min_pressure = 0x30, /* minimum pressure to trigger touch */
da1e3680
TF		 995 .vendor = 0, /* /sys/class/input/input?/id/vendor */
996 .product = 65070, /* /sys/class/input/input?/id/product */
997 .version = 0x100, /* /sys/class/input/input?/id/version */
998};
999
0bc20bba
TF		 1000static struct tps6507x_board tps_board = {
1001 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 1002 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 1003};
1004
3506f277 1005static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
a9eb1f67
SN		 1006 {
1007 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 1008 .platform_data = &tps_board,
a9eb1f67
SN		 1009 },
1010};
1011
1012static int __init pmic_tps65070_init(void)
1013{
3506f277
BG		 1014 return i2c_register_board_info(1, da850_evm_tps65070_info,
1015 ARRAY_SIZE(da850_evm_tps65070_info));
a9eb1f67
SN		 1016}
1017
7761ef67
SR		 1018static const short da850_evm_lcdc_pins[] = {
1019 DA850_GPIO2_8, DA850_GPIO2_15,
1020 -1
1021};
1022
85b8307f
SS		 1023static const short da850_evm_mii_pins[] = {
1024 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
1025 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
1026 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
1027 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
1028 DA850_MDIO_D,
1029 -1
1030};
1031
1032static const short da850_evm_rmii_pins[] = {
1033 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
1034 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
1035 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
1036 DA850_MDIO_D,
1037 -1
1038};
1039
bae10587 1040static int __init da850_evm_config_emac(void)
2206771c
C		 1041{
1042 void __iomem *cfg_chip3_base;
1043 int ret;
1044 u32 val;
bae10587
SN		 1045 struct davinci_soc_info *soc_info = &davinci_soc_info;
1046 u8 rmii_en = soc_info->emac_pdata->rmii_en;
1047
1048 if (!machine_is_davinci_da850_evm())
1049 return 0;
2206771c 1050
d2de0582 1051 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 1052
2206771c 1053 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 1054
1055 if (rmii_en) {
2206771c 1056 val |= BIT(8);
85b8307f 1057 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 1058 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
1059 " functional\n");
1060 } else {
2206771c 1061 val &= ~BIT(8);
85b8307f 1062 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 1063 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
1064 " functional\n");
1065 }
1066
2206771c 1067 if (ret)
6c7c23cc
RT		 1068 pr_warn("%s: CPGMAC/RMII mux setup failed: %d\n",
1069 __func__, ret);
2206771c 1070
17fadd9a
SN		 1071 /* configure the CFGCHIP3 register for RMII or MII */
1072 __raw_writel(val, cfg_chip3_base);
1073
2206771c
C		 1074 ret = davinci_cfg_reg(DA850_GPIO2_6);
1075 if (ret)
6c7c23cc 1076 pr_warn("%s:GPIO(2,6) mux setup failed\n", __func__);
2206771c
C		 1077
1078 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
1079 if (ret) {
6c7c23cc 1080 pr_warn("Cannot open GPIO %d\n", DA850_MII_MDIO_CLKEN_PIN);
2206771c
C		 1081 return ret;
1082 }
1083
17fadd9a
SN		 1084 /* Enable/Disable MII MDIO clock */
1085 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 1086
782f2d78 1087 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
bae10587
SN		 1088
1089 ret = da8xx_register_emac();
1090 if (ret)
6c7c23cc 1091 pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
bae10587 1092
2206771c
C		 1093 return 0;
1094}
bae10587 1095device_initcall(da850_evm_config_emac);
2206771c 1096
a941c503
RS		 1097/*
1098 * The following EDMA channels/slots are not being used by drivers (for
1099 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
1100 * they are being reserved for codecs on the DSP side.
1101 */
1102static const s16 da850_dma0_rsv_chans[][2] = {
1103 /* (offset, number) */
1104 { 8, 6},
1105 {24, 4},
1106 {30, 2},
1107 {-1, -1}
1108};
1109
1110static const s16 da850_dma0_rsv_slots[][2] = {
1111 /* (offset, number) */
1112 { 8, 6},
1113 {24, 4},
1114 {30, 50},
1115 {-1, -1}
1116};
1117
1118static const s16 da850_dma1_rsv_chans[][2] = {
1119 /* (offset, number) */
1120 { 0, 28},
1121 {30, 2},
1122 {-1, -1}
1123};
1124
1125static const s16 da850_dma1_rsv_slots[][2] = {
1126 /* (offset, number) */
1127 { 0, 28},
1128 {30, 90},
1129 {-1, -1}
1130};
1131
1132static struct edma_rsv_info da850_edma_cc0_rsv = {
1133 .rsv_chans = da850_dma0_rsv_chans,
1134 .rsv_slots = da850_dma0_rsv_slots,
1135};
1136
1137static struct edma_rsv_info da850_edma_cc1_rsv = {
1138 .rsv_chans = da850_dma1_rsv_chans,
1139 .rsv_slots = da850_dma1_rsv_slots,
1140};
1141
1142static struct edma_rsv_info *da850_edma_rsv[2] = {
1143 &da850_edma_cc0_rsv,
1144 &da850_edma_cc1_rsv,
1145};
1146
28bd2c34
SN		 1147#ifdef CONFIG_CPU_FREQ
1148static __init int da850_evm_init_cpufreq(void)
1149{
1150 switch (system_rev & 0xF) {
1151 case 3:
1152 da850_max_speed = 456000;
1153 break;
1154 case 2:
1155 da850_max_speed = 408000;
1156 break;
1157 case 1:
1158 da850_max_speed = 372000;
1159 break;
1160 }
1161
1162 return da850_register_cpufreq("pll0_sysclk3");
1163}
1164#else
1165static __init int da850_evm_init_cpufreq(void) { return 0; }
1166#endif
1167
1e046d17
MH		 1168#if defined(CONFIG_DA850_UI_SD_VIDEO_PORT)
1169
1170#define TVP5147_CH0 "tvp514x-0"
1171#define TVP5147_CH1 "tvp514x-1"
1172
1173/* VPIF capture configuration */
1174static struct tvp514x_platform_data tvp5146_pdata = {
1175 .clk_polarity = 0,
1176 .hs_polarity = 1,
1177 .vs_polarity = 1,
1178};
1179
1180#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
1181
1182static const struct vpif_input da850_ch0_inputs[] = {
1183 {
1184 .input = {
1185 .index = 0,
1186 .name = "Composite",
1187 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1188 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1189 .std = TVP514X_STD_ALL,
1190 },
7aaad131
HV		 1191 .input_route = INPUT_CVBS_VI2B,
1192 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1193 .subdev_name = TVP5147_CH0,
1194 },
1195};
1196
1197static const struct vpif_input da850_ch1_inputs[] = {
1198 {
1199 .input = {
1200 .index = 0,
1201 .name = "S-Video",
1202 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1203 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1204 .std = TVP514X_STD_ALL,
1205 },
7aaad131
HV		 1206 .input_route = INPUT_SVIDEO_VI2C_VI1C,
1207 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1208 .subdev_name = TVP5147_CH1,
1209 },
1210};
1211
1212static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
1213 {
1214 .name = TVP5147_CH0,
1215 .board_info = {
1216 I2C_BOARD_INFO("tvp5146", 0x5d),
1217 .platform_data = &tvp5146_pdata,
1218 },
1e046d17
MH		 1219 },
1220 {
1221 .name = TVP5147_CH1,
1222 .board_info = {
1223 I2C_BOARD_INFO("tvp5146", 0x5c),
1224 .platform_data = &tvp5146_pdata,
1225 },
1e046d17
MH		 1226 },
1227};
1228
1229static struct vpif_capture_config da850_vpif_capture_config = {
1230 .subdev_info = da850_vpif_capture_sdev_info,
1231 .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
1232 .chan_config[0] = {
1233 .inputs = da850_ch0_inputs,
1234 .input_count = ARRAY_SIZE(da850_ch0_inputs),
0d4f35f3
HV		 1235 .vpif_if = {
1236 .if_type = VPIF_IF_BT656,
1237 .hd_pol = 1,
1238 .vd_pol = 1,
1239 .fid_pol = 0,
1240 },
1e046d17
MH		 1241 },
1242 .chan_config[1] = {
1243 .inputs = da850_ch1_inputs,
1244 .input_count = ARRAY_SIZE(da850_ch1_inputs),
0d4f35f3
HV		 1245 .vpif_if = {
1246 .if_type = VPIF_IF_BT656,
1247 .hd_pol = 1,
1248 .vd_pol = 1,
1249 .fid_pol = 0,
1250 },
1e046d17
MH		 1251 },
1252 .card_name = "DA850/OMAP-L138 Video Capture",
1253};
1254
1255/* VPIF display configuration */
3e85a44a
LP		 1256
1257static struct adv7343_platform_data adv7343_pdata = {
1258 .mode_config = {
5e95814f 1259 .dac = { 1, 1, 1 },
3e85a44a
LP		 1260 },
1261 .sd_config = {
5e95814f 1262 .sd_dac_out = { 1 },
3e85a44a
LP		 1263 },
1264};
1265
1e046d17
MH		 1266static struct vpif_subdev_info da850_vpif_subdev[] = {
1267 {
1268 .name = "adv7343",
1269 .board_info = {
1270 I2C_BOARD_INFO("adv7343", 0x2a),
3e85a44a 1271 .platform_data = &adv7343_pdata,
1e046d17
MH		 1272 },
1273 },
1274};
1275
2bd4e58c
LP		 1276static const struct vpif_output da850_ch0_outputs[] = {
1277 {
1278 .output = {
1279 .index = 0,
1280 .name = "Composite",
1281 .type = V4L2_OUTPUT_TYPE_ANALOG,
1282 .capabilities = V4L2_OUT_CAP_STD,
1283 .std = V4L2_STD_ALL,
1284 },
1285 .subdev_name = "adv7343",
1286 .output_route = ADV7343_COMPOSITE_ID,
1287 },
1288 {
1289 .output = {
1290 .index = 1,
1291 .name = "S-Video",
1292 .type = V4L2_OUTPUT_TYPE_ANALOG,
1293 .capabilities = V4L2_OUT_CAP_STD,
1294 .std = V4L2_STD_ALL,
1295 },
1296 .subdev_name = "adv7343",
1297 .output_route = ADV7343_SVIDEO_ID,
1298 },
1e046d17
MH		 1299};
1300
1301static struct vpif_display_config da850_vpif_display_config = {
1302 .subdevinfo = da850_vpif_subdev,
1303 .subdev_count = ARRAY_SIZE(da850_vpif_subdev),
2bd4e58c
LP		 1304 .chan_config[0] = {
1305 .outputs = da850_ch0_outputs,
1306 .output_count = ARRAY_SIZE(da850_ch0_outputs),
1307 },
1e046d17
MH		 1308 .card_name = "DA850/OMAP-L138 Video Display",
1309};
1310
1311static __init void da850_vpif_init(void)
1312{
1313 int ret;
1314
1315 ret = da850_register_vpif();
1316 if (ret)
1317 pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret);
1318
1319 ret = davinci_cfg_reg_list(da850_vpif_capture_pins);
1320 if (ret)
1321 pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n",
1322 ret);
1323
1324 ret = da850_register_vpif_capture(&da850_vpif_capture_config);
1325 if (ret)
1326 pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret);
1327
1328 ret = davinci_cfg_reg_list(da850_vpif_display_pins);
1329 if (ret)
1330 pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n",
1331 ret);
1332
1333 ret = da850_register_vpif_display(&da850_vpif_display_config);
1334 if (ret)
1335 pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret);
1336}
1337
1338#else
1339static __init void da850_vpif_init(void) {}
1340#endif
1341
8bb2c481
SN		 1342#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
1343
0fbc5592
SR		 1344static __init void da850_evm_init(void)
1345{
1346 int ret;
1347
b856671e
PA		 1348 ret = da850_register_gpio();
1349 if (ret)
1350 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
1351
9e9bc235
PU		 1352 regulator_register_fixed(0, fixed_supplies, ARRAY_SIZE(fixed_supplies));
1353
a9eb1f67
SN		 1354 ret = pmic_tps65070_init();
1355 if (ret)
6c7c23cc 1356 pr_warn("%s: TPS65070 PMIC init failed: %d\n", __func__, ret);
a9eb1f67 1357
a941c503 1358 ret = da850_register_edma(da850_edma_rsv);
0fbc5592 1359 if (ret)
6c7c23cc 1360 pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
0fbc5592 1361
3821d10a 1362 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592 1363 if (ret)
6c7c23cc 1364 pr_warn("%s: I2C0 mux setup failed: %d\n", __func__, ret);
0fbc5592
SR		 1365
1366 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
1367 if (ret)
6c7c23cc 1368 pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret);
0fbc5592 1369
5a4b1315 1370
0fbc5592
SR		 1371 ret = da8xx_register_watchdog();
1372 if (ret)
6c7c23cc
RT		 1373 pr_warn("%s: watchdog registration failed: %d\n",
1374 __func__, ret);
0fbc5592 1375
820c4fe3 1376 if (HAS_MMC) {
5a0d80ea 1377 ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
820c4fe3 1378 if (ret)
6c7c23cc
RT		 1379 pr_warn("%s: MMCSD0 mux setup failed: %d\n",
1380 __func__, ret);
820c4fe3
SR		 1381
1382 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
1383 if (ret)
6c7c23cc
RT		 1384 pr_warn("%s: can not open GPIO %d\n",
1385 __func__, DA850_MMCSD_CD_PIN);
820c4fe3
SR		 1386 gpio_direction_input(DA850_MMCSD_CD_PIN);
1387
1388 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
1389 if (ret)
6c7c23cc
RT		 1390 pr_warn("%s: can not open GPIO %d\n",
1391 __func__, DA850_MMCSD_WP_PIN);
820c4fe3
SR		 1392 gpio_direction_input(DA850_MMCSD_WP_PIN);
1393
1394 ret = da8xx_register_mmcsd0(&da850_mmc_config);
1395 if (ret)
6c7c23cc
RT		 1396 pr_warn("%s: MMCSD0 registration failed: %d\n",
1397 __func__, ret);
820c4fe3 1398 }
700691f2 1399
fcf7157b 1400 davinci_serial_init(da8xx_serial_device);
0fbc5592 1401
1a7ff8ff
C		 1402 i2c_register_board_info(1, da850_evm_i2c_devices,
1403 ARRAY_SIZE(da850_evm_i2c_devices));
1404
0fbc5592
SR		 1405 /*
1406 * shut down uart 0 and 1; they are not used on the board and
1407 * accessing them causes endless "too much work in irq53" messages
1408 * with arago fs
1409 */
1410 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1411 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 1412
c840fc74 1413 ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
491214e1 1414 if (ret)
6c7c23cc 1415 pr_warn("%s: McASP mux setup failed: %d\n", __func__, ret);
491214e1 1416
88abfd5b 1417 da850_evm_snd_data.sram_pool = sram_get_gen_pool();
b8864aa4 1418 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 1419
3821d10a 1420 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276 1421 if (ret)
6c7c23cc 1422 pr_warn("%s: LCDC mux setup failed: %d\n", __func__, ret);
5cbdf276 1423
ae41d17a
MP		 1424 ret = da8xx_register_uio_pruss();
1425 if (ret)
1426 pr_warn("da850_evm_init: pruss initialization failed: %d\n",
1427 ret);
1428
7761ef67 1429 /* Handle board specific muxing for LCD here */
3821d10a 1430 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67 1431 if (ret)
6c7c23cc
RT		 1432 pr_warn("%s: EVM specific LCD mux setup failed: %d\n",
1433 __func__, ret);
7761ef67 1434
5cbdf276
SR		 1435 ret = da850_lcd_hw_init();
1436 if (ret)
6c7c23cc 1437 pr_warn("%s: LCD initialization failed: %d\n", __func__, ret);
5cbdf276 1438
d52f235f 1439 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 1440 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276 1441 if (ret)
6c7c23cc 1442 pr_warn("%s: LCDC registration failed: %d\n", __func__, ret);
c51df70b
MG		 1443
1444 ret = da8xx_register_rtc();
1445 if (ret)
6c7c23cc 1446 pr_warn("%s: RTC setup failed: %d\n", __func__, ret);
09dc2d45 1447
28bd2c34 1448 ret = da850_evm_init_cpufreq();
09dc2d45 1449 if (ret)
6c7c23cc 1450 pr_warn("%s: cpufreq registration failed: %d\n", __func__, ret);
5aeb15aa
SN		 1451
1452 ret = da8xx_register_cpuidle();
1453 if (ret)
6c7c23cc 1454 pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret);
63534443
SN		 1455
1456 ret = da850_register_pm(&da850_pm_device);
1457 if (ret)
6c7c23cc 1458 pr_warn("%s: suspend registration failed: %d\n", __func__, ret);
fdce5568 1459
1e046d17
MH		 1460 da850_vpif_init();
1461
0273612c
VD		 1462 ret = spi_register_board_info(da850evm_spi_info,
1463 ARRAY_SIZE(da850evm_spi_info));
1464 if (ret)
1465 pr_warn("%s: spi info registration failed: %d\n", __func__,
1466 ret);
1467
1468 ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info));
fdce5568 1469 if (ret)
6c7c23cc 1470 pr_warn("%s: SPI 1 registration failed: %d\n", __func__, ret);
8bb2c481
SN		 1471
1472 ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
1473 if (ret)
6c7c23cc 1474 pr_warn("%s: SATA registration failed: %d\n", __func__, ret);
810198bc
RS		 1475
1476 da850_evm_setup_mac_addr();
54288134
RT		 1477
1478 ret = da8xx_register_rproc();
1479 if (ret)
1480 pr_warn("%s: dsp/rproc registration failed: %d\n",
1481 __func__, ret);
0fbc5592
SR		 1482}
1483
1484#ifdef CONFIG_SERIAL_8250_CONSOLE
1485static int __init da850_evm_console_init(void)
1486{
1aa5f2a9
MW		 1487 if (!machine_is_davinci_da850_evm())
1488 return 0;
1489
0fbc5592
SR		 1490 return add_preferred_console("ttyS", 2, "115200");
1491}
1492console_initcall(da850_evm_console_init);
1493#endif
1494
0fbc5592
SR		 1495static void __init da850_evm_map_io(void)
1496{
1497 da850_init();
1498}
1499
48ea89ea 1500MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
e7e56014 1501 .atag_offset = 0x100,
0fbc5592 1502 .map_io = da850_evm_map_io,
bd808947 1503 .init_irq = cp_intc_init,
6bb27d73 1504 .init_time = davinci_timer_init,
0fbc5592 1505 .init_machine = da850_evm_init,
3aa3e840 1506 .init_late = davinci_init_late,
f68deabf 1507 .dma_zone_size = SZ_128M,
c6121ddd 1508 .restart = da8xx_restart,
54288134 1509 .reserve = da8xx_rproc_reserve_cma,
0fbc5592 1510MACHINE_END
Linux kernel - Deliverables
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