projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge branch 'v3.4/features' of git://gitorious.org/linux-davinci/linux-davinci into...
[deliverable/linux.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14#include <linux/kernel.h>
0fbc5592
SR		 15#include <linux/init.h>
16#include <linux/console.h>
17#include <linux/i2c.h>
18#include <linux/i2c/at24.h>
75e2ea64 19#include <linux/i2c/pca953x.h>
75929f5e 20#include <linux/input.h>
0bc20bba 21#include <linux/mfd/tps6507x.h>
5cbdf276 22#include <linux/gpio.h>
75929f5e 23#include <linux/gpio_keys.h>
38beb929
SR		 24#include <linux/platform_device.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h>
7c5ec609 28#include <linux/mtd/physmap.h>
a9eb1f67 29#include <linux/regulator/machine.h>
8b24599e 30#include <linux/regulator/tps6507x.h>
da1e3680 31#include <linux/input/tps6507x-ts.h>
fdce5568
SN		 32#include <linux/spi/spi.h>
33#include <linux/spi/flash.h>
ab3f5c1f
IY		 34#include <linux/delay.h>
35#include <linux/wl12xx.h>
0fbc5592
SR		 36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39
0fbc5592
SR		 40#include <mach/cp_intc.h>
41#include <mach/da8xx.h>
38beb929 42#include <mach/nand.h>
7761ef67 43#include <mach/mux.h>
18a8505c 44#include <mach/aemif.h>
fdce5568 45#include <mach/spi.h>
0fbc5592 46
f6f97588 47#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
7761ef67 48#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 49#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 50
700691f2
SR		 51#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
52#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
53
ab3f5c1f
IY		 54#define DA850_WLAN_EN GPIO_TO_PIN(6, 9)
55#define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10)
56
2206771c
C		 57#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
58
fdce5568
SN		 59static struct mtd_partition da850evm_spiflash_part[] = {
60 [0] = {
61 .name = "UBL",
62 .offset = 0,
63 .size = SZ_64K,
64 .mask_flags = MTD_WRITEABLE,
65 },
66 [1] = {
67 .name = "U-Boot",
68 .offset = MTDPART_OFS_APPEND,
69 .size = SZ_512K,
70 .mask_flags = MTD_WRITEABLE,
71 },
72 [2] = {
73 .name = "U-Boot-Env",
74 .offset = MTDPART_OFS_APPEND,
75 .size = SZ_64K,
76 .mask_flags = MTD_WRITEABLE,
77 },
78 [3] = {
79 .name = "Kernel",
80 .offset = MTDPART_OFS_APPEND,
81 .size = SZ_2M + SZ_512K,
82 .mask_flags = 0,
83 },
84 [4] = {
85 .name = "Filesystem",
86 .offset = MTDPART_OFS_APPEND,
87 .size = SZ_4M,
88 .mask_flags = 0,
89 },
90 [5] = {
91 .name = "MAC-Address",
92 .offset = SZ_8M - SZ_64K,
93 .size = SZ_64K,
94 .mask_flags = MTD_WRITEABLE,
95 },
96};
97
98static struct flash_platform_data da850evm_spiflash_data = {
99 .name = "m25p80",
100 .parts = da850evm_spiflash_part,
101 .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
102 .type = "m25p64",
103};
104
105static struct davinci_spi_config da850evm_spiflash_cfg = {
106 .io_type = SPI_IO_TYPE_DMA,
107 .c2tdelay = 8,
108 .t2cdelay = 8,
109};
110
111static struct spi_board_info da850evm_spi_info[] = {
112 {
113 .modalias = "m25p80",
114 .platform_data = &da850evm_spiflash_data,
115 .controller_data = &da850evm_spiflash_cfg,
116 .mode = SPI_MODE_0,
117 .max_speed_hz = 30000000,
118 .bus_num = 1,
119 .chip_select = 0,
120 },
121};
122
810198bc
RS		 123#ifdef CONFIG_MTD
124static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
125{
126 char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
127 size_t retlen;
128
129 if (!strcmp(mtd->name, "MAC-Address")) {
329ad399 130 mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
810198bc
RS		 131 if (retlen == ETH_ALEN)
132 pr_info("Read MAC addr from SPI Flash: %pM\n",
133 mac_addr);
134 }
135}
136
137static struct mtd_notifier da850evm_spi_notifier = {
138 .add = da850_evm_m25p80_notify_add,
139};
140
141static void da850_evm_setup_mac_addr(void)
142{
143 register_mtd_user(&da850evm_spi_notifier);
144}
145#else
146static void da850_evm_setup_mac_addr(void) { }
147#endif
148
7c5ec609
SR		 149static struct mtd_partition da850_evm_norflash_partition[] = {
150 {
e2abd5a2 151 .name = "bootloaders + env",
7c5ec609 152 .offset = 0,
e2abd5a2
SR		 153 .size = SZ_512K,
154 .mask_flags = MTD_WRITEABLE,
155 },
156 {
157 .name = "kernel",
158 .offset = MTDPART_OFS_APPEND,
159 .size = SZ_2M,
160 .mask_flags = 0,
161 },
162 {
163 .name = "filesystem",
164 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 165 .size = MTDPART_SIZ_FULL,
166 .mask_flags = 0,
167 },
168};
169
170static struct physmap_flash_data da850_evm_norflash_data = {
171 .width = 2,
172 .parts = da850_evm_norflash_partition,
173 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
174};
175
176static struct resource da850_evm_norflash_resource[] = {
177 {
178 .start = DA8XX_AEMIF_CS2_BASE,
179 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
180 .flags = IORESOURCE_MEM,
181 },
182};
183
184static struct platform_device da850_evm_norflash_device = {
185 .name = "physmap-flash",
186 .id = 0,
187 .dev = {
188 .platform_data = &da850_evm_norflash_data,
189 },
190 .num_resources = 1,
191 .resource = da850_evm_norflash_resource,
192};
193
63534443
SN		 194static struct davinci_pm_config da850_pm_pdata = {
195 .sleepcount = 128,
196};
197
198static struct platform_device da850_pm_device = {
199 .name = "pm-davinci",
200 .dev = {
201 .platform_data = &da850_pm_pdata,
202 },
203 .id = -1,
204};
205
38beb929
SR		 206/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
207 * (128K blocks). It may be used instead of the (default) SPI flash
208 * to boot, using TI's tools to install the secondary boot loader
209 * (UBL) and U-Boot.
210 */
db549d22 211static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 212 {
213 .name = "u-boot env",
214 .offset = 0,
215 .size = SZ_128K,
216 .mask_flags = MTD_WRITEABLE,
217 },
218 {
219 .name = "UBL",
220 .offset = MTDPART_OFS_APPEND,
221 .size = SZ_128K,
222 .mask_flags = MTD_WRITEABLE,
223 },
224 {
225 .name = "u-boot",
226 .offset = MTDPART_OFS_APPEND,
227 .size = 4 * SZ_128K,
228 .mask_flags = MTD_WRITEABLE,
229 },
230 {
231 .name = "kernel",
232 .offset = 0x200000,
233 .size = SZ_2M,
234 .mask_flags = 0,
235 },
236 {
237 .name = "filesystem",
238 .offset = MTDPART_OFS_APPEND,
239 .size = MTDPART_SIZ_FULL,
240 .mask_flags = 0,
241 },
242};
243
18a8505c
SN		 244static struct davinci_aemif_timing da850_evm_nandflash_timing = {
245 .wsetup = 24,
246 .wstrobe = 21,
247 .whold = 14,
248 .rsetup = 19,
249 .rstrobe = 50,
250 .rhold = 0,
251 .ta = 20,
252};
253
38beb929
SR		 254static struct davinci_nand_pdata da850_evm_nandflash_data = {
255 .parts = da850_evm_nandflash_partition,
256 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
257 .ecc_mode = NAND_ECC_HW,
fc42e335 258 .ecc_bits = 4,
bb9ebd4e 259 .bbt_options = NAND_BBT_USE_FLASH,
18a8505c 260 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 261};
262
263static struct resource da850_evm_nandflash_resource[] = {
264 {
265 .start = DA8XX_AEMIF_CS3_BASE,
266 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
267 .flags = IORESOURCE_MEM,
268 },
269 {
270 .start = DA8XX_AEMIF_CTL_BASE,
271 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
272 .flags = IORESOURCE_MEM,
273 },
274};
275
276static struct platform_device da850_evm_nandflash_device = {
277 .name = "davinci_nand",
278 .id = 1,
279 .dev = {
280 .platform_data = &da850_evm_nandflash_data,
281 },
282 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
283 .resource = da850_evm_nandflash_resource,
284};
285
039c5ee3
SR		 286static struct platform_device *da850_evm_devices[] __initdata = {
287 &da850_evm_nandflash_device,
288 &da850_evm_norflash_device,
289};
290
291#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
292#define DA8XX_AEMIF_ASIZE_16BIT 0x1
293
294static void __init da850_evm_init_nor(void)
295{
296 void __iomem *aemif_addr;
297
298 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
299
300 /* Configure data bus width of CS2 to 16 bit */
301 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
302 DA8XX_AEMIF_ASIZE_16BIT,
303 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
304
305 iounmap(aemif_addr);
306}
307
f48ecc2f
SS		 308static const short da850_evm_nand_pins[] = {
309 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
310 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
311 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
312 DA850_NEMA_WE, DA850_NEMA_OE,
313 -1
314};
315
316static const short da850_evm_nor_pins[] = {
317 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
318 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
319 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
320 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
321 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
322 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
323 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
324 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
325 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
326 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
327 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
328 DA850_EMA_A_22, DA850_EMA_A_23,
329 -1
330};
331
039c5ee3
SR		 332#if defined(CONFIG_MMC_DAVINCI) || \
333 defined(CONFIG_MMC_DAVINCI_MODULE)
334#define HAS_MMC 1
335#else
336#define HAS_MMC 0
337#endif
338
f48ecc2f 339static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 340{
341 int ret = 0;
342
b688c2fb 343 if (!HAS_MMC) {
f48ecc2f 344 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3
SR		 345 if (ret)
346 pr_warning("da850_evm_init: nand mux setup failed: "
347 "%d\n", ret);
348
f48ecc2f 349 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3
SR		 350 if (ret)
351 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
352 ret);
353
354 da850_evm_init_nor();
355
356 platform_add_devices(da850_evm_devices,
357 ARRAY_SIZE(da850_evm_devices));
358 }
359}
75e2ea64 360
bae10587
SN		 361#ifdef CONFIG_DA850_UI_RMII
362static inline void da850_evm_setup_emac_rmii(int rmii_sel)
363{
364 struct davinci_soc_info *soc_info = &davinci_soc_info;
365
366 soc_info->emac_pdata->rmii_en = 1;
47e7cb14 367 gpio_set_value_cansleep(rmii_sel, 0);
bae10587
SN		 368}
369#else
370static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
371#endif
372
75929f5e
BG		 373
374#define DA850_KEYS_DEBOUNCE_MS 10
375/*
376 * At 200ms polling interval it is possible to miss an
377 * event by tapping very lightly on the push button but most
378 * pushes do result in an event; longer intervals require the
379 * user to hold the button whereas shorter intervals require
380 * more CPU time for polling.
381 */
382#define DA850_GPIO_KEYS_POLL_MS 200
383
384enum da850_evm_ui_exp_pins {
385 DA850_EVM_UI_EXP_SEL_C = 5,
386 DA850_EVM_UI_EXP_SEL_B,
387 DA850_EVM_UI_EXP_SEL_A,
388 DA850_EVM_UI_EXP_PB8,
389 DA850_EVM_UI_EXP_PB7,
390 DA850_EVM_UI_EXP_PB6,
391 DA850_EVM_UI_EXP_PB5,
392 DA850_EVM_UI_EXP_PB4,
393 DA850_EVM_UI_EXP_PB3,
394 DA850_EVM_UI_EXP_PB2,
395 DA850_EVM_UI_EXP_PB1,
396};
397
398static const char const *da850_evm_ui_exp[] = {
399 [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
400 [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
401 [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
402 [DA850_EVM_UI_EXP_PB8] = "pb8",
403 [DA850_EVM_UI_EXP_PB7] = "pb7",
404 [DA850_EVM_UI_EXP_PB6] = "pb6",
405 [DA850_EVM_UI_EXP_PB5] = "pb5",
406 [DA850_EVM_UI_EXP_PB4] = "pb4",
407 [DA850_EVM_UI_EXP_PB3] = "pb3",
408 [DA850_EVM_UI_EXP_PB2] = "pb2",
409 [DA850_EVM_UI_EXP_PB1] = "pb1",
410};
411
412#define DA850_N_UI_PB 8
413
414static struct gpio_keys_button da850_evm_ui_keys[] = {
415 [0 ... DA850_N_UI_PB - 1] = {
416 .type = EV_KEY,
417 .active_low = 1,
418 .wakeup = 0,
419 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
420 .code = -1, /* assigned at runtime */
421 .gpio = -1, /* assigned at runtime */
422 .desc = NULL, /* assigned at runtime */
423 },
424};
425
426static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
427 .buttons = da850_evm_ui_keys,
428 .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
429 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
430};
431
432static struct platform_device da850_evm_ui_keys_device = {
433 .name = "gpio-keys-polled",
434 .id = 0,
435 .dev = {
436 .platform_data = &da850_evm_ui_keys_pdata
437 },
438};
439
440static void da850_evm_ui_keys_init(unsigned gpio)
441{
442 int i;
443 struct gpio_keys_button *button;
444
445 for (i = 0; i < DA850_N_UI_PB; i++) {
446 button = &da850_evm_ui_keys[i];
447 button->code = KEY_F8 - i;
448 button->desc = (char *)
449 da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
450 button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
451 }
452}
453
75e2ea64
C		 454static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
455 unsigned ngpio, void *c)
456{
457 int sel_a, sel_b, sel_c, ret;
458
53c2897d
BG		 459 sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
460 sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
461 sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
75e2ea64 462
53c2897d 463 ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
75e2ea64
C		 464 if (ret) {
465 pr_warning("Cannot open UI expander pin %d\n", sel_a);
466 goto exp_setup_sela_fail;
467 }
468
53c2897d 469 ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
75e2ea64
C		 470 if (ret) {
471 pr_warning("Cannot open UI expander pin %d\n", sel_b);
472 goto exp_setup_selb_fail;
473 }
474
53c2897d 475 ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
75e2ea64
C		 476 if (ret) {
477 pr_warning("Cannot open UI expander pin %d\n", sel_c);
478 goto exp_setup_selc_fail;
479 }
480
481 /* deselect all functionalities */
482 gpio_direction_output(sel_a, 1);
483 gpio_direction_output(sel_b, 1);
484 gpio_direction_output(sel_c, 1);
485
75929f5e
BG		 486 da850_evm_ui_keys_init(gpio);
487 ret = platform_device_register(&da850_evm_ui_keys_device);
488 if (ret) {
489 pr_warning("Could not register UI GPIO expander push-buttons");
490 goto exp_setup_keys_fail;
491 }
492
75e2ea64
C		 493 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
494
495 da850_evm_setup_nor_nand();
496
bae10587 497 da850_evm_setup_emac_rmii(sel_a);
2206771c 498
75e2ea64
C		 499 return 0;
500
75929f5e
BG		 501exp_setup_keys_fail:
502 gpio_free(sel_c);
75e2ea64
C		 503exp_setup_selc_fail:
504 gpio_free(sel_b);
505exp_setup_selb_fail:
506 gpio_free(sel_a);
507exp_setup_sela_fail:
508 return ret;
509}
510
511static int da850_evm_ui_expander_teardown(struct i2c_client *client,
512 unsigned gpio, unsigned ngpio, void *c)
513{
75929f5e
BG		 514 platform_device_unregister(&da850_evm_ui_keys_device);
515
75e2ea64 516 /* deselect all functionalities */
53c2897d
BG		 517 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
518 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
519 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
75e2ea64 520
53c2897d
BG		 521 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
522 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
523 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
75e2ea64
C		 524
525 return 0;
526}
527
70b30939
BG		 528/* assign the baseboard expander's GPIOs after the UI board's */
529#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
530#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
531
532enum da850_evm_bb_exp_pins {
533 DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
534 DA850_EVM_BB_EXP_SW_RST,
535 DA850_EVM_BB_EXP_TP_23,
536 DA850_EVM_BB_EXP_TP_22,
537 DA850_EVM_BB_EXP_TP_21,
538 DA850_EVM_BB_EXP_USER_PB1,
539 DA850_EVM_BB_EXP_USER_LED2,
540 DA850_EVM_BB_EXP_USER_LED1,
541 DA850_EVM_BB_EXP_USER_SW1,
542 DA850_EVM_BB_EXP_USER_SW2,
543 DA850_EVM_BB_EXP_USER_SW3,
544 DA850_EVM_BB_EXP_USER_SW4,
545 DA850_EVM_BB_EXP_USER_SW5,
546 DA850_EVM_BB_EXP_USER_SW6,
547 DA850_EVM_BB_EXP_USER_SW7,
548 DA850_EVM_BB_EXP_USER_SW8
549};
550
551static const char const *da850_evm_bb_exp[] = {
552 [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
553 [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
554 [DA850_EVM_BB_EXP_TP_23] = "tp_23",
555 [DA850_EVM_BB_EXP_TP_22] = "tp_22",
556 [DA850_EVM_BB_EXP_TP_21] = "tp_21",
557 [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
558 [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
559 [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
560 [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
561 [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
562 [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
563 [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
564 [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
565 [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
566 [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
567 [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
568};
569
570#define DA850_N_BB_USER_SW 8
571
572static struct gpio_keys_button da850_evm_bb_keys[] = {
573 [0] = {
574 .type = EV_KEY,
575 .active_low = 1,
576 .wakeup = 0,
577 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
578 .code = KEY_PROG1,
579 .desc = NULL, /* assigned at runtime */
580 .gpio = -1, /* assigned at runtime */
581 },
582 [1 ... DA850_N_BB_USER_SW] = {
583 .type = EV_SW,
584 .active_low = 1,
585 .wakeup = 0,
586 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
587 .code = -1, /* assigned at runtime */
588 .desc = NULL, /* assigned at runtime */
589 .gpio = -1, /* assigned at runtime */
590 },
591};
592
593static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
594 .buttons = da850_evm_bb_keys,
595 .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
596 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
597};
598
599static struct platform_device da850_evm_bb_keys_device = {
600 .name = "gpio-keys-polled",
601 .id = 1,
602 .dev = {
603 .platform_data = &da850_evm_bb_keys_pdata
604 },
605};
606
607static void da850_evm_bb_keys_init(unsigned gpio)
608{
609 int i;
610 struct gpio_keys_button *button;
611
612 button = &da850_evm_bb_keys[0];
613 button->desc = (char *)
614 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
615 button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
616
617 for (i = 0; i < DA850_N_BB_USER_SW; i++) {
618 button = &da850_evm_bb_keys[i + 1];
619 button->code = SW_LID + i;
620 button->desc = (char *)
621 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
622 button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
623 }
624}
625
626#define DA850_N_BB_USER_LED 2
627
628static struct gpio_led da850_evm_bb_leds[] = {
629 [0 ... DA850_N_BB_USER_LED - 1] = {
630 .active_low = 1,
631 .gpio = -1, /* assigned at runtime */
632 .name = NULL, /* assigned at runtime */
633 },
634};
635
636static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
637 .leds = da850_evm_bb_leds,
638 .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
639};
640
641static struct platform_device da850_evm_bb_leds_device = {
642 .name = "leds-gpio",
643 .id = -1,
644 .dev = {
645 .platform_data = &da850_evm_bb_leds_pdata
646 }
647};
648
649static void da850_evm_bb_leds_init(unsigned gpio)
650{
651 int i;
652 struct gpio_led *led;
653
654 for (i = 0; i < DA850_N_BB_USER_LED; i++) {
655 led = &da850_evm_bb_leds[i];
656
657 led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
658 led->name =
659 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
660 }
661}
662
663static int da850_evm_bb_expander_setup(struct i2c_client *client,
664 unsigned gpio, unsigned ngpio,
665 void *c)
666{
667 int ret;
668
669 /*
670 * Register the switches and pushbutton on the baseboard as a gpio-keys
671 * device.
672 */
673 da850_evm_bb_keys_init(gpio);
674 ret = platform_device_register(&da850_evm_bb_keys_device);
675 if (ret) {
676 pr_warning("Could not register baseboard GPIO expander keys");
677 goto io_exp_setup_sw_fail;
678 }
679
680 da850_evm_bb_leds_init(gpio);
681 ret = platform_device_register(&da850_evm_bb_leds_device);
682 if (ret) {
683 pr_warning("Could not register baseboard GPIO expander LEDS");
684 goto io_exp_setup_leds_fail;
685 }
686
687 return 0;
688
689io_exp_setup_leds_fail:
690 platform_device_unregister(&da850_evm_bb_keys_device);
691io_exp_setup_sw_fail:
692 return ret;
693}
694
695static int da850_evm_bb_expander_teardown(struct i2c_client *client,
696 unsigned gpio, unsigned ngpio, void *c)
697{
698 platform_device_unregister(&da850_evm_bb_leds_device);
699 platform_device_unregister(&da850_evm_bb_keys_device);
700
701 return 0;
702}
703
75e2ea64
C		 704static struct pca953x_platform_data da850_evm_ui_expander_info = {
705 .gpio_base = DAVINCI_N_GPIO,
706 .setup = da850_evm_ui_expander_setup,
707 .teardown = da850_evm_ui_expander_teardown,
75929f5e 708 .names = da850_evm_ui_exp,
75e2ea64
C		 709};
710
70b30939
BG		 711static struct pca953x_platform_data da850_evm_bb_expander_info = {
712 .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
713 .setup = da850_evm_bb_expander_setup,
714 .teardown = da850_evm_bb_expander_teardown,
715 .names = da850_evm_bb_exp,
716};
717
1a7ff8ff
C		 718static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
719 {
720 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 721 },
722 {
723 I2C_BOARD_INFO("tca6416", 0x20),
724 .platform_data = &da850_evm_ui_expander_info,
725 },
70b30939
BG		 726 {
727 I2C_BOARD_INFO("tca6416", 0x21),
728 .platform_data = &da850_evm_bb_expander_info,
729 },
1a7ff8ff
C		 730};
731
0fbc5592
SR		 732static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
733 .bus_freq = 100, /* kHz */
734 .bus_delay = 0, /* usec */
735};
736
737static struct davinci_uart_config da850_evm_uart_config __initdata = {
738 .enabled_uarts = 0x7,
739};
740
491214e1
C		 741/* davinci da850 evm audio machine driver */
742static u8 da850_iis_serializer_direction[] = {
743 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
744 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
745 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
746 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
747};
748
749static struct snd_platform_data da850_evm_snd_data = {
750 .tx_dma_offset = 0x2000,
751 .rx_dma_offset = 0x2000,
752 .op_mode = DAVINCI_MCASP_IIS_MODE,
753 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
754 .tdm_slots = 2,
755 .serial_dir = da850_iis_serializer_direction,
f1b21c52 756 .asp_chan_q = EVENTQ_0,
491214e1
C		 757 .version = MCASP_VERSION_2,
758 .txnumevt = 1,
759 .rxnumevt = 1,
760};
761
c840fc74
MW		 762static const short da850_evm_mcasp_pins[] __initconst = {
763 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
764 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
765 DA850_AXR_11, DA850_AXR_12,
766 -1
767};
768
700691f2
SR		 769static int da850_evm_mmc_get_ro(int index)
770{
771 return gpio_get_value(DA850_MMCSD_WP_PIN);
772}
773
774static int da850_evm_mmc_get_cd(int index)
775{
776 return !gpio_get_value(DA850_MMCSD_CD_PIN);
777}
778
779static struct davinci_mmc_config da850_mmc_config = {
780 .get_ro = da850_evm_mmc_get_ro,
781 .get_cd = da850_evm_mmc_get_cd,
782 .wires = 4,
0046d0bf
C		 783 .max_freq = 50000000,
784 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 785 .version = MMC_CTLR_VERSION_2,
786};
787
5a0d80ea
MW		 788static const short da850_evm_mmcsd0_pins[] __initconst = {
789 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
790 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
791 DA850_GPIO4_0, DA850_GPIO4_1,
792 -1
793};
794
d52f235f
C		 795static void da850_panel_power_ctrl(int val)
796{
797 /* lcd backlight */
798 gpio_set_value(DA850_LCD_BL_PIN, val);
799
800 /* lcd power */
801 gpio_set_value(DA850_LCD_PWR_PIN, val);
802}
803
5cbdf276
SR		 804static int da850_lcd_hw_init(void)
805{
806 int status;
807
808 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
809 if (status < 0)
810 return status;
811
812 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
813 if (status < 0) {
814 gpio_free(DA850_LCD_BL_PIN);
815 return status;
816 }
817
818 gpio_direction_output(DA850_LCD_BL_PIN, 0);
819 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
820
d52f235f
C		 821 /* Switch off panel power and backlight */
822 da850_panel_power_ctrl(0);
5cbdf276 823
d52f235f
C		 824 /* Switch on panel power and backlight */
825 da850_panel_power_ctrl(1);
5cbdf276
SR		 826
827 return 0;
828}
491214e1 829
a9eb1f67
SN		 830/* TPS65070 voltage regulator support */
831
832/* 3.3V */
db549d22 833static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 834 {
835 .supply = "usb0_vdda33",
836 },
837 {
838 .supply = "usb1_vdda33",
839 },
840};
841
842/* 3.3V or 1.8V */
db549d22 843static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 844 {
845 .supply = "dvdd3318_a",
846 },
847 {
848 .supply = "dvdd3318_b",
849 },
850 {
851 .supply = "dvdd3318_c",
852 },
853};
854
855/* 1.2V */
db549d22 856static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 857 {
858 .supply = "cvdd",
859 },
860};
861
862/* 1.8V LDO */
db549d22 863static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 864 {
865 .supply = "sata_vddr",
866 },
867 {
868 .supply = "usb0_vdda18",
869 },
870 {
871 .supply = "usb1_vdda18",
872 },
873 {
874 .supply = "ddr_dvdd18",
875 },
876};
877
878/* 1.2V LDO */
db549d22 879static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 880 {
881 .supply = "sata_vdd",
882 },
883 {
884 .supply = "pll0_vdda",
885 },
886 {
887 .supply = "pll1_vdda",
888 },
889 {
890 .supply = "usbs_cvdd",
891 },
892 {
893 .supply = "vddarnwa1",
894 },
895};
896
8b24599e
SN		 897/* We take advantage of the fact that both defdcdc{2,3} are tied high */
898static struct tps6507x_reg_platform_data tps6507x_platform_data = {
899 .defdcdc_default = true,
900};
901
db549d22 902static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 903 /* dcdc1 */
904 {
905 .constraints = {
906 .min_uV = 3150000,
907 .max_uV = 3450000,
908 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
909 REGULATOR_CHANGE_STATUS),
910 .boot_on = 1,
911 },
912 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
913 .consumer_supplies = tps65070_dcdc1_consumers,
914 },
915
916 /* dcdc2 */
917 {
918 .constraints = {
919 .min_uV = 1710000,
920 .max_uV = 3450000,
921 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
922 REGULATOR_CHANGE_STATUS),
923 .boot_on = 1,
924 },
925 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
926 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 927 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 928 },
929
930 /* dcdc3 */
931 {
932 .constraints = {
933 .min_uV = 950000,
28bd2c34 934 .max_uV = 1350000,
a9eb1f67
SN		 935 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
936 REGULATOR_CHANGE_STATUS),
937 .boot_on = 1,
938 },
939 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
940 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 941 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 942 },
943
944 /* ldo1 */
945 {
946 .constraints = {
947 .min_uV = 1710000,
948 .max_uV = 1890000,
949 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
950 REGULATOR_CHANGE_STATUS),
951 .boot_on = 1,
952 },
953 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
954 .consumer_supplies = tps65070_ldo1_consumers,
955 },
956
957 /* ldo2 */
958 {
959 .constraints = {
960 .min_uV = 1140000,
961 .max_uV = 1320000,
962 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
963 REGULATOR_CHANGE_STATUS),
964 .boot_on = 1,
965 },
966 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
967 .consumer_supplies = tps65070_ldo2_consumers,
968 },
969};
970
da1e3680
TF		 971static struct touchscreen_init_data tps6507x_touchscreen_data = {
972 .poll_period = 30, /* ms between touch samples */
973 .min_pressure = 0x30, /* minimum pressure to trigger touch */
974 .vref = 0, /* turn off vref when not using A/D */
975 .vendor = 0, /* /sys/class/input/input?/id/vendor */
976 .product = 65070, /* /sys/class/input/input?/id/product */
977 .version = 0x100, /* /sys/class/input/input?/id/version */
978};
979
0bc20bba
TF		 980static struct tps6507x_board tps_board = {
981 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 982 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 983};
984
3506f277 985static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
a9eb1f67
SN		 986 {
987 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 988 .platform_data = &tps_board,
a9eb1f67
SN		 989 },
990};
991
992static int __init pmic_tps65070_init(void)
993{
3506f277
BG		 994 return i2c_register_board_info(1, da850_evm_tps65070_info,
995 ARRAY_SIZE(da850_evm_tps65070_info));
a9eb1f67
SN		 996}
997
7761ef67
SR		 998static const short da850_evm_lcdc_pins[] = {
999 DA850_GPIO2_8, DA850_GPIO2_15,
1000 -1
1001};
1002
85b8307f
SS		 1003static const short da850_evm_mii_pins[] = {
1004 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
1005 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
1006 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
1007 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
1008 DA850_MDIO_D,
1009 -1
1010};
1011
1012static const short da850_evm_rmii_pins[] = {
1013 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
1014 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
1015 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
1016 DA850_MDIO_D,
1017 -1
1018};
1019
bae10587 1020static int __init da850_evm_config_emac(void)
2206771c
C		 1021{
1022 void __iomem *cfg_chip3_base;
1023 int ret;
1024 u32 val;
bae10587
SN		 1025 struct davinci_soc_info *soc_info = &davinci_soc_info;
1026 u8 rmii_en = soc_info->emac_pdata->rmii_en;
1027
1028 if (!machine_is_davinci_da850_evm())
1029 return 0;
2206771c 1030
d2de0582 1031 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 1032
2206771c 1033 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 1034
1035 if (rmii_en) {
2206771c 1036 val |= BIT(8);
85b8307f 1037 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 1038 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
1039 " functional\n");
1040 } else {
2206771c 1041 val &= ~BIT(8);
85b8307f 1042 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 1043 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
1044 " functional\n");
1045 }
1046
2206771c
C		 1047 if (ret)
1048 pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
1049 ret);
1050
17fadd9a
SN		 1051 /* configure the CFGCHIP3 register for RMII or MII */
1052 __raw_writel(val, cfg_chip3_base);
1053
2206771c
C		 1054 ret = davinci_cfg_reg(DA850_GPIO2_6);
1055 if (ret)
1056 pr_warning("da850_evm_init:GPIO(2,6) mux setup "
1057 "failed\n");
1058
1059 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
1060 if (ret) {
1061 pr_warning("Cannot open GPIO %d\n",
1062 DA850_MII_MDIO_CLKEN_PIN);
1063 return ret;
1064 }
1065
17fadd9a
SN		 1066 /* Enable/Disable MII MDIO clock */
1067 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 1068
782f2d78 1069 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
bae10587
SN		 1070
1071 ret = da8xx_register_emac();
1072 if (ret)
1073 pr_warning("da850_evm_init: emac registration failed: %d\n",
1074 ret);
1075
2206771c
C		 1076 return 0;
1077}
bae10587 1078device_initcall(da850_evm_config_emac);
2206771c 1079
a941c503
RS		 1080/*
1081 * The following EDMA channels/slots are not being used by drivers (for
1082 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
1083 * they are being reserved for codecs on the DSP side.
1084 */
1085static const s16 da850_dma0_rsv_chans[][2] = {
1086 /* (offset, number) */
1087 { 8, 6},
1088 {24, 4},
1089 {30, 2},
1090 {-1, -1}
1091};
1092
1093static const s16 da850_dma0_rsv_slots[][2] = {
1094 /* (offset, number) */
1095 { 8, 6},
1096 {24, 4},
1097 {30, 50},
1098 {-1, -1}
1099};
1100
1101static const s16 da850_dma1_rsv_chans[][2] = {
1102 /* (offset, number) */
1103 { 0, 28},
1104 {30, 2},
1105 {-1, -1}
1106};
1107
1108static const s16 da850_dma1_rsv_slots[][2] = {
1109 /* (offset, number) */
1110 { 0, 28},
1111 {30, 90},
1112 {-1, -1}
1113};
1114
1115static struct edma_rsv_info da850_edma_cc0_rsv = {
1116 .rsv_chans = da850_dma0_rsv_chans,
1117 .rsv_slots = da850_dma0_rsv_slots,
1118};
1119
1120static struct edma_rsv_info da850_edma_cc1_rsv = {
1121 .rsv_chans = da850_dma1_rsv_chans,
1122 .rsv_slots = da850_dma1_rsv_slots,
1123};
1124
1125static struct edma_rsv_info *da850_edma_rsv[2] = {
1126 &da850_edma_cc0_rsv,
1127 &da850_edma_cc1_rsv,
1128};
1129
28bd2c34
SN		 1130#ifdef CONFIG_CPU_FREQ
1131static __init int da850_evm_init_cpufreq(void)
1132{
1133 switch (system_rev & 0xF) {
1134 case 3:
1135 da850_max_speed = 456000;
1136 break;
1137 case 2:
1138 da850_max_speed = 408000;
1139 break;
1140 case 1:
1141 da850_max_speed = 372000;
1142 break;
1143 }
1144
1145 return da850_register_cpufreq("pll0_sysclk3");
1146}
1147#else
1148static __init int da850_evm_init_cpufreq(void) { return 0; }
1149#endif
1150
ab3f5c1f
IY		 1151#ifdef CONFIG_DA850_WL12XX
1152
1153static void wl12xx_set_power(int index, bool power_on)
1154{
1155 static bool power_state;
1156
1157 pr_debug("Powering %s wl12xx", power_on ? "on" : "off");
1158
1159 if (power_on == power_state)
1160 return;
1161 power_state = power_on;
1162
1163 if (power_on) {
1164 /* Power up sequence required for wl127x devices */
1165 gpio_set_value(DA850_WLAN_EN, 1);
1166 usleep_range(15000, 15000);
1167 gpio_set_value(DA850_WLAN_EN, 0);
1168 usleep_range(1000, 1000);
1169 gpio_set_value(DA850_WLAN_EN, 1);
1170 msleep(70);
1171 } else {
1172 gpio_set_value(DA850_WLAN_EN, 0);
1173 }
1174}
1175
1176static struct davinci_mmc_config da850_wl12xx_mmc_config = {
1177 .set_power = wl12xx_set_power,
1178 .wires = 4,
1179 .max_freq = 25000000,
1180 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE |
1181 MMC_CAP_POWER_OFF_CARD,
1182 .version = MMC_CTLR_VERSION_2,
1183};
1184
1185static const short da850_wl12xx_pins[] __initconst = {
1186 DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2,
1187 DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD,
1188 DA850_GPIO6_9, DA850_GPIO6_10,
1189 -1
1190};
1191
1192static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = {
1193 .irq = -1,
1194 .board_ref_clock = WL12XX_REFCLOCK_38,
1195 .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ,
1196};
1197
1198static __init int da850_wl12xx_init(void)
1199{
1200 int ret;
1201
1202 ret = davinci_cfg_reg_list(da850_wl12xx_pins);
1203 if (ret) {
1204 pr_err("wl12xx/mmc mux setup failed: %d\n", ret);
1205 goto exit;
1206 }
1207
1208 ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config);
1209 if (ret) {
1210 pr_err("wl12xx/mmc registration failed: %d\n", ret);
1211 goto exit;
1212 }
1213
1214 ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en");
1215 if (ret) {
1216 pr_err("Could not request wl12xx enable gpio: %d\n", ret);
1217 goto exit;
1218 }
1219
1220 ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq");
1221 if (ret) {
1222 pr_err("Could not request wl12xx irq gpio: %d\n", ret);
1223 goto free_wlan_en;
1224 }
1225
1226 da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ);
1227
1228 ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data);
1229 if (ret) {
1230 pr_err("Could not set wl12xx data: %d\n", ret);
1231 goto free_wlan_irq;
1232 }
1233
1234 return 0;
1235
1236free_wlan_irq:
1237 gpio_free(DA850_WLAN_IRQ);
1238
1239free_wlan_en:
1240 gpio_free(DA850_WLAN_EN);
1241
1242exit:
1243 return ret;
1244}
1245
1246#else /* CONFIG_DA850_WL12XX */
1247
1248static __init int da850_wl12xx_init(void)
1249{
1250 return 0;
1251}
1252
1253#endif /* CONFIG_DA850_WL12XX */
1254
8bb2c481
SN		 1255#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
1256
0fbc5592
SR		 1257static __init void da850_evm_init(void)
1258{
1259 int ret;
1260
a9eb1f67
SN		 1261 ret = pmic_tps65070_init();
1262 if (ret)
1263 pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
1264 ret);
1265
a941c503 1266 ret = da850_register_edma(da850_edma_rsv);
0fbc5592
SR		 1267 if (ret)
1268 pr_warning("da850_evm_init: edma registration failed: %d\n",
1269 ret);
1270
3821d10a 1271 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592
SR		 1272 if (ret)
1273 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
1274 ret);
1275
1276 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
1277 if (ret)
1278 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
1279 ret);
1280
5a4b1315 1281
0fbc5592
SR		 1282 ret = da8xx_register_watchdog();
1283 if (ret)
1284 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
1285 ret);
1286
820c4fe3 1287 if (HAS_MMC) {
5a0d80ea 1288 ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
820c4fe3
SR		 1289 if (ret)
1290 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
1291 " %d\n", ret);
1292
1293 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
1294 if (ret)
1295 pr_warning("da850_evm_init: can not open GPIO %d\n",
1296 DA850_MMCSD_CD_PIN);
1297 gpio_direction_input(DA850_MMCSD_CD_PIN);
1298
1299 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
1300 if (ret)
1301 pr_warning("da850_evm_init: can not open GPIO %d\n",
1302 DA850_MMCSD_WP_PIN);
1303 gpio_direction_input(DA850_MMCSD_WP_PIN);
1304
1305 ret = da8xx_register_mmcsd0(&da850_mmc_config);
1306 if (ret)
1307 pr_warning("da850_evm_init: mmcsd0 registration failed:"
1308 " %d\n", ret);
ab3f5c1f
IY		 1309
1310 ret = da850_wl12xx_init();
1311 if (ret)
1312 pr_warning("da850_evm_init: wl12xx initialization"
1313 " failed: %d\n", ret);
820c4fe3 1314 }
700691f2 1315
0fbc5592
SR		 1316 davinci_serial_init(&da850_evm_uart_config);
1317
1a7ff8ff
C		 1318 i2c_register_board_info(1, da850_evm_i2c_devices,
1319 ARRAY_SIZE(da850_evm_i2c_devices));
1320
0fbc5592
SR		 1321 /*
1322 * shut down uart 0 and 1; they are not used on the board and
1323 * accessing them causes endless "too much work in irq53" messages
1324 * with arago fs
1325 */
1326 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1327 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 1328
c840fc74 1329 ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
491214e1
C		 1330 if (ret)
1331 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
1332 ret);
1333
b8864aa4 1334 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 1335
3821d10a 1336 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276
SR		 1337 if (ret)
1338 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
1339 ret);
1340
7761ef67 1341 /* Handle board specific muxing for LCD here */
3821d10a 1342 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67
SR		 1343 if (ret)
1344 pr_warning("da850_evm_init: evm specific lcd mux setup "
1345 "failed: %d\n", ret);
1346
5cbdf276
SR		 1347 ret = da850_lcd_hw_init();
1348 if (ret)
1349 pr_warning("da850_evm_init: lcd initialization failed: %d\n",
1350 ret);
1351
d52f235f 1352 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 1353 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276
SR		 1354 if (ret)
1355 pr_warning("da850_evm_init: lcdc registration failed: %d\n",
1356 ret);
c51df70b
MG		 1357
1358 ret = da8xx_register_rtc();
1359 if (ret)
1360 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 1361
28bd2c34 1362 ret = da850_evm_init_cpufreq();
09dc2d45
SN		 1363 if (ret)
1364 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
1365 ret);
5aeb15aa
SN		 1366
1367 ret = da8xx_register_cpuidle();
1368 if (ret)
1369 pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
1370 ret);
63534443
SN		 1371
1372 ret = da850_register_pm(&da850_pm_device);
1373 if (ret)
1374 pr_warning("da850_evm_init: suspend registration failed: %d\n",
1375 ret);
fdce5568
SN		 1376
1377 ret = da8xx_register_spi(1, da850evm_spi_info,
1378 ARRAY_SIZE(da850evm_spi_info));
1379 if (ret)
1380 pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
1381 ret);
8bb2c481
SN		 1382
1383 ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
1384 if (ret)
1385 pr_warning("da850_evm_init: sata registration failed: %d\n",
1386 ret);
810198bc
RS		 1387
1388 da850_evm_setup_mac_addr();
0fbc5592
SR		 1389}
1390
1391#ifdef CONFIG_SERIAL_8250_CONSOLE
1392static int __init da850_evm_console_init(void)
1393{
1aa5f2a9
MW		 1394 if (!machine_is_davinci_da850_evm())
1395 return 0;
1396
0fbc5592
SR		 1397 return add_preferred_console("ttyS", 2, "115200");
1398}
1399console_initcall(da850_evm_console_init);
1400#endif
1401
0fbc5592
SR		 1402static void __init da850_evm_map_io(void)
1403{
1404 da850_init();
1405}
1406
48ea89ea 1407MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
e7e56014 1408 .atag_offset = 0x100,
0fbc5592 1409 .map_io = da850_evm_map_io,
bd808947 1410 .init_irq = cp_intc_init,
0fbc5592
SR		 1411 .timer = &davinci_timer,
1412 .init_machine = da850_evm_init,
f68deabf 1413 .dma_zone_size = SZ_128M,
c6121ddd 1414 .restart = da8xx_restart,
0fbc5592 1415MACHINE_END
Linux kernel - Deliverables
This page took 0.314674 seconds and 5 git commands to generate.