[deliverable/linux.git] / arch / arm / mach-davinci / board-da850-evm.c

/*
 * TI DA850/OMAP-L138 EVM board
 *
 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
 * Original Copyrights follow:
 *
 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/pca953x.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/regulator/machine.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <mach/cp_intc.h>
#include <mach/da8xx.h>
#include <mach/nand.h>
#include <mach/mux.h>

#define DA850_EVM_PHY_MASK		0x1
#define DA850_EVM_MDIO_FREQUENCY	2200000 /* PHY bus frequency */

#define DA850_LCD_PWR_PIN		GPIO_TO_PIN(2, 8)
#define DA850_LCD_BL_PIN		GPIO_TO_PIN(2, 15)

#define DA850_MMCSD_CD_PIN		GPIO_TO_PIN(4, 0)
#define DA850_MMCSD_WP_PIN		GPIO_TO_PIN(4, 1)

#define DA850_MII_MDIO_CLKEN_PIN	GPIO_TO_PIN(2, 6)

static struct mtd_partition da850_evm_norflash_partition[] = {
	{
		.name           = "bootloaders + env",
		.offset         = 0,
		.size           = SZ_512K,
		.mask_flags     = MTD_WRITEABLE,
	},
	{
		.name           = "kernel",
		.offset         = MTDPART_OFS_APPEND,
		.size           = SZ_2M,
		.mask_flags     = 0,
	},
	{
		.name           = "filesystem",
		.offset         = MTDPART_OFS_APPEND,
		.size           = MTDPART_SIZ_FULL,
		.mask_flags     = 0,
	},
};

static struct physmap_flash_data da850_evm_norflash_data = {
	.width		= 2,
	.parts		= da850_evm_norflash_partition,
	.nr_parts	= ARRAY_SIZE(da850_evm_norflash_partition),
};

static struct resource da850_evm_norflash_resource[] = {
	{
		.start	= DA8XX_AEMIF_CS2_BASE,
		.end	= DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da850_evm_norflash_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data  = &da850_evm_norflash_data,
	},
	.num_resources	= 1,
	.resource	= da850_evm_norflash_resource,
};

/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
 * (128K blocks). It may be used instead of the (default) SPI flash
 * to boot, using TI's tools to install the secondary boot loader
 * (UBL) and U-Boot.
 */
struct mtd_partition da850_evm_nandflash_partition[] = {
	{
		.name		= "u-boot env",
		.offset		= 0,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	 },
	{
		.name		= "UBL",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	},
	{
		.name		= "u-boot",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 4 * SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	},
	{
		.name		= "kernel",
		.offset		= 0x200000,
		.size		= SZ_2M,
		.mask_flags	= 0,
	},
	{
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	},
};

static struct davinci_nand_pdata da850_evm_nandflash_data = {
	.parts		= da850_evm_nandflash_partition,
	.nr_parts	= ARRAY_SIZE(da850_evm_nandflash_partition),
	.ecc_mode	= NAND_ECC_HW,
	.ecc_bits	= 4,
	.options	= NAND_USE_FLASH_BBT,
};

static struct resource da850_evm_nandflash_resource[] = {
	{
		.start	= DA8XX_AEMIF_CS3_BASE,
		.end	= DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= DA8XX_AEMIF_CTL_BASE,
		.end	= DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da850_evm_nandflash_device = {
	.name		= "davinci_nand",
	.id		= 1,
	.dev		= {
		.platform_data	= &da850_evm_nandflash_data,
	},
	.num_resources	= ARRAY_SIZE(da850_evm_nandflash_resource),
	.resource	= da850_evm_nandflash_resource,
};

static struct platform_device *da850_evm_devices[] __initdata = {
	&da850_evm_nandflash_device,
	&da850_evm_norflash_device,
};

#define DA8XX_AEMIF_CE2CFG_OFFSET	0x10
#define DA8XX_AEMIF_ASIZE_16BIT		0x1

static void __init da850_evm_init_nor(void)
{
	void __iomem *aemif_addr;

	aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);

	/* Configure data bus width of CS2 to 16 bit */
	writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
		DA8XX_AEMIF_ASIZE_16BIT,
		aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);

	iounmap(aemif_addr);
}

static u32 ui_card_detected;

#if defined(CONFIG_MMC_DAVINCI) || \
    defined(CONFIG_MMC_DAVINCI_MODULE)
#define HAS_MMC 1
#else
#define HAS_MMC 0
#endif

static __init void da850_evm_setup_nor_nand(void)
{
	int ret = 0;

	if (ui_card_detected & !HAS_MMC) {
		ret = da8xx_pinmux_setup(da850_nand_pins);
		if (ret)
			pr_warning("da850_evm_init: nand mux setup failed: "
					"%d\n", ret);

		ret = da8xx_pinmux_setup(da850_nor_pins);
		if (ret)
			pr_warning("da850_evm_init: nor mux setup failed: %d\n",
				ret);

		da850_evm_init_nor();

		platform_add_devices(da850_evm_devices,
					ARRAY_SIZE(da850_evm_devices));
	}
}

#ifdef CONFIG_DA850_UI_RMII
static inline void da850_evm_setup_emac_rmii(int rmii_sel)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	soc_info->emac_pdata->rmii_en = 1;
	gpio_set_value(rmii_sel, 0);
}
#else
static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
#endif

static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
						unsigned ngpio, void *c)
{
	int sel_a, sel_b, sel_c, ret;

	sel_a = gpio + 7;
	sel_b = gpio + 6;
	sel_c = gpio + 5;

	ret = gpio_request(sel_a, "sel_a");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_a);
		goto exp_setup_sela_fail;
	}

	ret = gpio_request(sel_b, "sel_b");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_b);
		goto exp_setup_selb_fail;
	}

	ret = gpio_request(sel_c, "sel_c");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_c);
		goto exp_setup_selc_fail;
	}

	/* deselect all functionalities */
	gpio_direction_output(sel_a, 1);
	gpio_direction_output(sel_b, 1);
	gpio_direction_output(sel_c, 1);

	ui_card_detected = 1;
	pr_info("DA850/OMAP-L138 EVM UI card detected\n");

	da850_evm_setup_nor_nand();

	da850_evm_setup_emac_rmii(sel_a);

	return 0;

exp_setup_selc_fail:
	gpio_free(sel_b);
exp_setup_selb_fail:
	gpio_free(sel_a);
exp_setup_sela_fail:
	return ret;
}

static int da850_evm_ui_expander_teardown(struct i2c_client *client,
					unsigned gpio, unsigned ngpio, void *c)
{
	/* deselect all functionalities */
	gpio_set_value(gpio + 5, 1);
	gpio_set_value(gpio + 6, 1);
	gpio_set_value(gpio + 7, 1);

	gpio_free(gpio + 5);
	gpio_free(gpio + 6);
	gpio_free(gpio + 7);

	return 0;
}

static struct pca953x_platform_data da850_evm_ui_expander_info = {
	.gpio_base	= DAVINCI_N_GPIO,
	.setup		= da850_evm_ui_expander_setup,
	.teardown	= da850_evm_ui_expander_teardown,
};

static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
	{
		I2C_BOARD_INFO("tlv320aic3x", 0x18),
	},
	{
		I2C_BOARD_INFO("tca6416", 0x20),
		.platform_data = &da850_evm_ui_expander_info,
	},
};

static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
	.bus_freq	= 100,	/* kHz */
	.bus_delay	= 0,	/* usec */
};

static struct davinci_uart_config da850_evm_uart_config __initdata = {
	.enabled_uarts = 0x7,
};

/* davinci da850 evm audio machine driver */
static u8 da850_iis_serializer_direction[] = {
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	TX_MODE,
	RX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
};

static struct snd_platform_data da850_evm_snd_data = {
	.tx_dma_offset	= 0x2000,
	.rx_dma_offset	= 0x2000,
	.op_mode	= DAVINCI_MCASP_IIS_MODE,
	.num_serializer	= ARRAY_SIZE(da850_iis_serializer_direction),
	.tdm_slots	= 2,
	.serial_dir	= da850_iis_serializer_direction,
	.eventq_no	= EVENTQ_1,
	.version	= MCASP_VERSION_2,
	.txnumevt	= 1,
	.rxnumevt	= 1,
};

static int da850_evm_mmc_get_ro(int index)
{
	return gpio_get_value(DA850_MMCSD_WP_PIN);
}

static int da850_evm_mmc_get_cd(int index)
{
	return !gpio_get_value(DA850_MMCSD_CD_PIN);
}

static struct davinci_mmc_config da850_mmc_config = {
	.get_ro		= da850_evm_mmc_get_ro,
	.get_cd		= da850_evm_mmc_get_cd,
	.wires		= 4,
	.max_freq	= 50000000,
	.caps		= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
	.version	= MMC_CTLR_VERSION_2,
};

static void da850_panel_power_ctrl(int val)
{
	/* lcd backlight */
	gpio_set_value(DA850_LCD_BL_PIN, val);

	/* lcd power */
	gpio_set_value(DA850_LCD_PWR_PIN, val);
}

static int da850_lcd_hw_init(void)
{
	int status;

	status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
	if (status < 0)
		return status;

	status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
	if (status < 0) {
		gpio_free(DA850_LCD_BL_PIN);
		return status;
	}

	gpio_direction_output(DA850_LCD_BL_PIN, 0);
	gpio_direction_output(DA850_LCD_PWR_PIN, 0);

	/* Switch off panel power and backlight */
	da850_panel_power_ctrl(0);

	/* Switch on panel power and backlight */
	da850_panel_power_ctrl(1);

	return 0;
}

/* TPS65070 voltage regulator support */

/* 3.3V */
struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
	{
		.supply = "usb0_vdda33",
	},
	{
		.supply = "usb1_vdda33",
	},
};

/* 3.3V or 1.8V */
struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
	{
		.supply = "dvdd3318_a",
	},
	{
		.supply = "dvdd3318_b",
	},
	{
		.supply = "dvdd3318_c",
	},
};

/* 1.2V */
struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
	{
		.supply = "cvdd",
	},
};

/* 1.8V LDO */
struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
	{
		.supply = "sata_vddr",
	},
	{
		.supply = "usb0_vdda18",
	},
	{
		.supply = "usb1_vdda18",
	},
	{
		.supply = "ddr_dvdd18",
	},
};

/* 1.2V LDO */
struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
	{
		.supply = "sata_vdd",
	},
	{
		.supply = "pll0_vdda",
	},
	{
		.supply = "pll1_vdda",
	},
	{
		.supply = "usbs_cvdd",
	},
	{
		.supply = "vddarnwa1",
	},
};

struct regulator_init_data tps65070_regulator_data[] = {
	/* dcdc1 */
	{
		.constraints = {
			.min_uV = 3150000,
			.max_uV = 3450000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
		.consumer_supplies = tps65070_dcdc1_consumers,
	},

	/* dcdc2 */
	{
		.constraints = {
			.min_uV = 1710000,
			.max_uV = 3450000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
		.consumer_supplies = tps65070_dcdc2_consumers,
	},

	/* dcdc3 */
	{
		.constraints = {
			.min_uV = 950000,
			.max_uV = 1320000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
		.consumer_supplies = tps65070_dcdc3_consumers,
	},

	/* ldo1 */
	{
		.constraints = {
			.min_uV = 1710000,
			.max_uV = 1890000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
		.consumer_supplies = tps65070_ldo1_consumers,
	},

	/* ldo2 */
	{
		.constraints = {
			.min_uV = 1140000,
			.max_uV = 1320000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
		.consumer_supplies = tps65070_ldo2_consumers,
	},
};

static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
	{
		I2C_BOARD_INFO("tps6507x", 0x48),
		.platform_data = &tps65070_regulator_data[0],
	},
};

static int __init pmic_tps65070_init(void)
{
	return i2c_register_board_info(1, da850evm_tps65070_info,
					ARRAY_SIZE(da850evm_tps65070_info));
}

static const short da850_evm_lcdc_pins[] = {
	DA850_GPIO2_8, DA850_GPIO2_15,
	-1
};

static int __init da850_evm_config_emac(void)
{
	void __iomem *cfg_chip3_base;
	int ret;
	u32 val;
	struct davinci_soc_info *soc_info = &davinci_soc_info;
	u8 rmii_en = soc_info->emac_pdata->rmii_en;

	if (!machine_is_davinci_da850_evm())
		return 0;

	cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);

	val = __raw_readl(cfg_chip3_base);

	if (rmii_en) {
		val |= BIT(8);
		ret = da8xx_pinmux_setup(da850_rmii_pins);
		pr_info("EMAC: RMII PHY configured, MII PHY will not be"
							" functional\n");
	} else {
		val &= ~BIT(8);
		ret = da8xx_pinmux_setup(da850_cpgmac_pins);
		pr_info("EMAC: MII PHY configured, RMII PHY will not be"
							" functional\n");
	}

	if (ret)
		pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
				ret);

	/* configure the CFGCHIP3 register for RMII or MII */
	__raw_writel(val, cfg_chip3_base);

	ret = davinci_cfg_reg(DA850_GPIO2_6);
	if (ret)
		pr_warning("da850_evm_init:GPIO(2,6) mux setup "
							"failed\n");

	ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
	if (ret) {
		pr_warning("Cannot open GPIO %d\n",
					DA850_MII_MDIO_CLKEN_PIN);
		return ret;
	}

	/* Enable/Disable MII MDIO clock */
	gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);

	soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
	soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;

	ret = da8xx_register_emac();
	if (ret)
		pr_warning("da850_evm_init: emac registration failed: %d\n",
				ret);

	return 0;
}
device_initcall(da850_evm_config_emac);

static __init void da850_evm_init(void)
{
	int ret;

	ret = pmic_tps65070_init();
	if (ret)
		pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
				ret);

	ret = da8xx_register_edma();
	if (ret)
		pr_warning("da850_evm_init: edma registration failed: %d\n",
				ret);

	ret = da8xx_pinmux_setup(da850_i2c0_pins);
	if (ret)
		pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
				ret);

	ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
	if (ret)
		pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
				ret);


	ret = da8xx_register_watchdog();
	if (ret)
		pr_warning("da830_evm_init: watchdog registration failed: %d\n",
				ret);

	if (HAS_MMC) {
		ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
		if (ret)
			pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
					" %d\n", ret);

		ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
		if (ret)
			pr_warning("da850_evm_init: can not open GPIO %d\n",
					DA850_MMCSD_CD_PIN);
		gpio_direction_input(DA850_MMCSD_CD_PIN);

		ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
		if (ret)
			pr_warning("da850_evm_init: can not open GPIO %d\n",
					DA850_MMCSD_WP_PIN);
		gpio_direction_input(DA850_MMCSD_WP_PIN);

		ret = da8xx_register_mmcsd0(&da850_mmc_config);
		if (ret)
			pr_warning("da850_evm_init: mmcsd0 registration failed:"
					" %d\n", ret);
	}

	davinci_serial_init(&da850_evm_uart_config);

	i2c_register_board_info(1, da850_evm_i2c_devices,
			ARRAY_SIZE(da850_evm_i2c_devices));

	/*
	 * shut down uart 0 and 1; they are not used on the board and
	 * accessing them causes endless "too much work in irq53" messages
	 * with arago fs
	 */
	__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
	__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);

	ret = da8xx_pinmux_setup(da850_mcasp_pins);
	if (ret)
		pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
				ret);

	da8xx_register_mcasp(0, &da850_evm_snd_data);

	ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
	if (ret)
		pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
				ret);

	/* Handle board specific muxing for LCD here */
	ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
	if (ret)
		pr_warning("da850_evm_init: evm specific lcd mux setup "
				"failed: %d\n",	ret);

	ret = da850_lcd_hw_init();
	if (ret)
		pr_warning("da850_evm_init: lcd initialization failed: %d\n",
				ret);

	sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
	ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
	if (ret)
		pr_warning("da850_evm_init: lcdc registration failed: %d\n",
				ret);

	ret = da8xx_register_rtc();
	if (ret)
		pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);

	ret = da850_register_cpufreq();
	if (ret)
		pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
				ret);

	ret = da8xx_register_cpuidle();
	if (ret)
		pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
				ret);
}

#ifdef CONFIG_SERIAL_8250_CONSOLE
static int __init da850_evm_console_init(void)
{
	return add_preferred_console("ttyS", 2, "115200");
}
console_initcall(da850_evm_console_init);
#endif

static __init void da850_evm_irq_init(void)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
			soc_info->intc_irq_prios);
}

static void __init da850_evm_map_io(void)
{
	da850_init();
}

MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
	.phys_io	= IO_PHYS,
	.io_pg_offst	= (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	.boot_params	= (DA8XX_DDR_BASE + 0x100),
	.map_io		= da850_evm_map_io,
	.init_irq	= da850_evm_irq_init,
	.timer		= &davinci_timer,
	.init_machine	= da850_evm_init,
MACHINE_END
Commit	Line	Data
0fbc5592 SR	1	/*
	2	* TI DA850/OMAP-L138 EVM board
	3	*
	4	* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* Derived from: arch/arm/mach-davinci/board-da830-evm.c
	7	* Original Copyrights follow:
	8	*
	9	* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
	10	* the terms of the GNU General Public License version 2. This program
	11	* is licensed "as is" without any warranty of any kind, whether express
	12	* or implied.
	13	*/
	14	#include <linux/kernel.h>
0fbc5592 SR	15	#include <linux/init.h>
	16	#include <linux/console.h>
	17	#include <linux/i2c.h>
	18	#include <linux/i2c/at24.h>
75e2ea64	19	#include <linux/i2c/pca953x.h>
5cbdf276	20	#include <linux/gpio.h>
38beb929 SR	21	#include <linux/platform_device.h>
	22	#include <linux/mtd/mtd.h>
	23	#include <linux/mtd/nand.h>
	24	#include <linux/mtd/partitions.h>
7c5ec609	25	#include <linux/mtd/physmap.h>
a9eb1f67	26	#include <linux/regulator/machine.h>
0fbc5592 SR	27
	28	#include <asm/mach-types.h>
	29	#include <asm/mach/arch.h>
	30
0fbc5592 SR	31	#include <mach/cp_intc.h>
0fbc5592 SR	32	#include <mach/da8xx.h>
38beb929	33	#include <mach/nand.h>
7761ef67	34	#include <mach/mux.h>
0fbc5592	35
5a4b1315 SR	36	#define DA850_EVM_PHY_MASK 0x1
	37	#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
	38
7761ef67	39	#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276	40	#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276	41
700691f2 SR	42	#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
	43	#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
	44
2206771c C	45	#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
2206771c C	46
7c5ec609 SR	47	static struct mtd_partition da850_evm_norflash_partition[] = {
7c5ec609 SR	48	{
e2abd5a2	49	.name = "bootloaders + env",
7c5ec609	50	.offset = 0,
e2abd5a2 SR	51	.size = SZ_512K,
	52	.mask_flags = MTD_WRITEABLE,
	53	},
	54	{
	55	.name = "kernel",
	56	.offset = MTDPART_OFS_APPEND,
	57	.size = SZ_2M,
	58	.mask_flags = 0,
	59	},
	60	{
	61	.name = "filesystem",
	62	.offset = MTDPART_OFS_APPEND,
7c5ec609 SR	63	.size = MTDPART_SIZ_FULL,
	64	.mask_flags = 0,
	65	},
	66	};
	67
	68	static struct physmap_flash_data da850_evm_norflash_data = {
	69	.width = 2,
	70	.parts = da850_evm_norflash_partition,
	71	.nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
	72	};
	73
	74	static struct resource da850_evm_norflash_resource[] = {
	75	{
	76	.start = DA8XX_AEMIF_CS2_BASE,
	77	.end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
	78	.flags = IORESOURCE_MEM,
	79	},
	80	};
	81
	82	static struct platform_device da850_evm_norflash_device = {
	83	.name = "physmap-flash",
	84	.id = 0,
	85	.dev = {
	86	.platform_data = &da850_evm_norflash_data,
	87	},
	88	.num_resources = 1,
	89	.resource = da850_evm_norflash_resource,
	90	};
	91
38beb929 SR	92	/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
	93	* (128K blocks). It may be used instead of the (default) SPI flash
	94	* to boot, using TI's tools to install the secondary boot loader
	95	* (UBL) and U-Boot.
	96	*/
	97	struct mtd_partition da850_evm_nandflash_partition[] = {
	98	{
	99	.name = "u-boot env",
	100	.offset = 0,
	101	.size = SZ_128K,
	102	.mask_flags = MTD_WRITEABLE,
	103	},
	104	{
	105	.name = "UBL",
	106	.offset = MTDPART_OFS_APPEND,
	107	.size = SZ_128K,
	108	.mask_flags = MTD_WRITEABLE,
	109	},
	110	{
	111	.name = "u-boot",
	112	.offset = MTDPART_OFS_APPEND,
	113	.size = 4 * SZ_128K,
	114	.mask_flags = MTD_WRITEABLE,
	115	},
	116	{
	117	.name = "kernel",
	118	.offset = 0x200000,
	119	.size = SZ_2M,
	120	.mask_flags = 0,
	121	},
	122	{
	123	.name = "filesystem",
	124	.offset = MTDPART_OFS_APPEND,
	125	.size = MTDPART_SIZ_FULL,
	126	.mask_flags = 0,
	127	},
	128	};
	129
	130	static struct davinci_nand_pdata da850_evm_nandflash_data = {
	131	.parts = da850_evm_nandflash_partition,
	132	.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
	133	.ecc_mode = NAND_ECC_HW,
fc42e335	134	.ecc_bits = 4,
38beb929 SR	135	.options = NAND_USE_FLASH_BBT,
	136	};
	137
	138	static struct resource da850_evm_nandflash_resource[] = {
	139	{
	140	.start = DA8XX_AEMIF_CS3_BASE,
	141	.end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
	142	.flags = IORESOURCE_MEM,
	143	},
	144	{
	145	.start = DA8XX_AEMIF_CTL_BASE,
	146	.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
	147	.flags = IORESOURCE_MEM,
	148	},
	149	};
	150
	151	static struct platform_device da850_evm_nandflash_device = {
	152	.name = "davinci_nand",
	153	.id = 1,
	154	.dev = {
	155	.platform_data = &da850_evm_nandflash_data,
	156	},
	157	.num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
	158	.resource = da850_evm_nandflash_resource,
	159	};
	160
039c5ee3 SR	161	static struct platform_device *da850_evm_devices[] __initdata = {
	162	&da850_evm_nandflash_device,
	163	&da850_evm_norflash_device,
	164	};
	165
	166	#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
	167	#define DA8XX_AEMIF_ASIZE_16BIT 0x1
	168
	169	static void __init da850_evm_init_nor(void)
	170	{
	171	void __iomem *aemif_addr;
	172
	173	aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
	174
	175	/* Configure data bus width of CS2 to 16 bit */
	176	writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) \|
	177	DA8XX_AEMIF_ASIZE_16BIT,
	178	aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
	179
	180	iounmap(aemif_addr);
	181	}
	182
75e2ea64	183	static u32 ui_card_detected;
039c5ee3 SR	184
	185	#if defined(CONFIG_MMC_DAVINCI) \|\| \
	186	defined(CONFIG_MMC_DAVINCI_MODULE)
	187	#define HAS_MMC 1
	188	#else
	189	#define HAS_MMC 0
	190	#endif
	191
1ef203c3	192	static __init void da850_evm_setup_nor_nand(void)
039c5ee3 SR	193	{
	194	int ret = 0;
	195
	196	if (ui_card_detected & !HAS_MMC) {
	197	ret = da8xx_pinmux_setup(da850_nand_pins);
	198	if (ret)
	199	pr_warning("da850_evm_init: nand mux setup failed: "
	200	"%d\n", ret);
	201
	202	ret = da8xx_pinmux_setup(da850_nor_pins);
	203	if (ret)
	204	pr_warning("da850_evm_init: nor mux setup failed: %d\n",
	205	ret);
	206
	207	da850_evm_init_nor();
	208
	209	platform_add_devices(da850_evm_devices,
	210	ARRAY_SIZE(da850_evm_devices));
	211	}
	212	}
75e2ea64	213
bae10587 SN	214	#ifdef CONFIG_DA850_UI_RMII
	215	static inline void da850_evm_setup_emac_rmii(int rmii_sel)
	216	{
	217	struct davinci_soc_info *soc_info = &davinci_soc_info;
	218
	219	soc_info->emac_pdata->rmii_en = 1;
	220	gpio_set_value(rmii_sel, 0);
	221	}
	222	#else
	223	static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
	224	#endif
	225
75e2ea64 C	226	static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
	227	unsigned ngpio, void *c)
	228	{
	229	int sel_a, sel_b, sel_c, ret;
	230
	231	sel_a = gpio + 7;
	232	sel_b = gpio + 6;
	233	sel_c = gpio + 5;
	234
	235	ret = gpio_request(sel_a, "sel_a");
	236	if (ret) {
	237	pr_warning("Cannot open UI expander pin %d\n", sel_a);
	238	goto exp_setup_sela_fail;
	239	}
	240
	241	ret = gpio_request(sel_b, "sel_b");
	242	if (ret) {
	243	pr_warning("Cannot open UI expander pin %d\n", sel_b);
	244	goto exp_setup_selb_fail;
	245	}
	246
	247	ret = gpio_request(sel_c, "sel_c");
	248	if (ret) {
	249	pr_warning("Cannot open UI expander pin %d\n", sel_c);
	250	goto exp_setup_selc_fail;
	251	}
	252
	253	/* deselect all functionalities */
	254	gpio_direction_output(sel_a, 1);
	255	gpio_direction_output(sel_b, 1);
	256	gpio_direction_output(sel_c, 1);
	257
	258	ui_card_detected = 1;
	259	pr_info("DA850/OMAP-L138 EVM UI card detected\n");
	260
	261	da850_evm_setup_nor_nand();
	262
bae10587	263	da850_evm_setup_emac_rmii(sel_a);
2206771c	264
75e2ea64 C	265	return 0;
	266
	267	exp_setup_selc_fail:
	268	gpio_free(sel_b);
	269	exp_setup_selb_fail:
	270	gpio_free(sel_a);
	271	exp_setup_sela_fail:
	272	return ret;
	273	}
	274
	275	static int da850_evm_ui_expander_teardown(struct i2c_client *client,
	276	unsigned gpio, unsigned ngpio, void *c)
	277	{
	278	/* deselect all functionalities */
	279	gpio_set_value(gpio + 5, 1);
	280	gpio_set_value(gpio + 6, 1);
	281	gpio_set_value(gpio + 7, 1);
	282
	283	gpio_free(gpio + 5);
	284	gpio_free(gpio + 6);
	285	gpio_free(gpio + 7);
	286
	287	return 0;
	288	}
	289
	290	static struct pca953x_platform_data da850_evm_ui_expander_info = {
	291	.gpio_base = DAVINCI_N_GPIO,
	292	.setup = da850_evm_ui_expander_setup,
	293	.teardown = da850_evm_ui_expander_teardown,
	294	};
	295
1a7ff8ff C	296	static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
	297	{
	298	I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64 C	299	},
	300	{
	301	I2C_BOARD_INFO("tca6416", 0x20),
	302	.platform_data = &da850_evm_ui_expander_info,
	303	},
1a7ff8ff C	304	};
1a7ff8ff C	305
0fbc5592 SR	306	static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
	307	.bus_freq = 100, /* kHz */
	308	.bus_delay = 0, /* usec */
	309	};
	310
	311	static struct davinci_uart_config da850_evm_uart_config __initdata = {
	312	.enabled_uarts = 0x7,
	313	};
	314
491214e1 C	315	/* davinci da850 evm audio machine driver */
	316	static u8 da850_iis_serializer_direction[] = {
	317	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	318	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	319	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
	320	RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	321	};
	322
	323	static struct snd_platform_data da850_evm_snd_data = {
	324	.tx_dma_offset = 0x2000,
	325	.rx_dma_offset = 0x2000,
	326	.op_mode = DAVINCI_MCASP_IIS_MODE,
	327	.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
	328	.tdm_slots = 2,
	329	.serial_dir = da850_iis_serializer_direction,
	330	.eventq_no = EVENTQ_1,
	331	.version = MCASP_VERSION_2,
	332	.txnumevt = 1,
	333	.rxnumevt = 1,
	334	};
	335
700691f2 SR	336	static int da850_evm_mmc_get_ro(int index)
	337	{
	338	return gpio_get_value(DA850_MMCSD_WP_PIN);
	339	}
	340
	341	static int da850_evm_mmc_get_cd(int index)
	342	{
	343	return !gpio_get_value(DA850_MMCSD_CD_PIN);
	344	}
	345
	346	static struct davinci_mmc_config da850_mmc_config = {
	347	.get_ro = da850_evm_mmc_get_ro,
	348	.get_cd = da850_evm_mmc_get_cd,
	349	.wires = 4,
0046d0bf C	350	.max_freq = 50000000,
0046d0bf C	351	.caps = MMC_CAP_MMC_HIGHSPEED \| MMC_CAP_SD_HIGHSPEED,
700691f2 SR	352	.version = MMC_CTLR_VERSION_2,
	353	};
	354
d52f235f C	355	static void da850_panel_power_ctrl(int val)
	356	{
	357	/* lcd backlight */
	358	gpio_set_value(DA850_LCD_BL_PIN, val);
	359
	360	/* lcd power */
	361	gpio_set_value(DA850_LCD_PWR_PIN, val);
	362	}
	363
5cbdf276 SR	364	static int da850_lcd_hw_init(void)
	365	{
	366	int status;
	367
	368	status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
	369	if (status < 0)
	370	return status;
	371
	372	status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
	373	if (status < 0) {
	374	gpio_free(DA850_LCD_BL_PIN);
	375	return status;
	376	}
	377
	378	gpio_direction_output(DA850_LCD_BL_PIN, 0);
	379	gpio_direction_output(DA850_LCD_PWR_PIN, 0);
	380
d52f235f C	381	/* Switch off panel power and backlight */
d52f235f C	382	da850_panel_power_ctrl(0);
5cbdf276	383
d52f235f C	384	/* Switch on panel power and backlight */
d52f235f C	385	da850_panel_power_ctrl(1);
5cbdf276 SR	386
	387	return 0;
	388	}
491214e1	389
a9eb1f67 SN	390	/* TPS65070 voltage regulator support */
	391
	392	/* 3.3V */
	393	struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
	394	{
	395	.supply = "usb0_vdda33",
	396	},
	397	{
	398	.supply = "usb1_vdda33",
	399	},
	400	};
	401
	402	/* 3.3V or 1.8V */
	403	struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
	404	{
	405	.supply = "dvdd3318_a",
	406	},
	407	{
	408	.supply = "dvdd3318_b",
	409	},
	410	{
	411	.supply = "dvdd3318_c",
	412	},
	413	};
	414
	415	/* 1.2V */
	416	struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
	417	{
	418	.supply = "cvdd",
	419	},
	420	};
	421
	422	/* 1.8V LDO */
	423	struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
	424	{
	425	.supply = "sata_vddr",
	426	},
	427	{
	428	.supply = "usb0_vdda18",
	429	},
	430	{
	431	.supply = "usb1_vdda18",
	432	},
	433	{
	434	.supply = "ddr_dvdd18",
	435	},
	436	};
	437
	438	/* 1.2V LDO */
	439	struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
	440	{
	441	.supply = "sata_vdd",
	442	},
	443	{
	444	.supply = "pll0_vdda",
	445	},
	446	{
	447	.supply = "pll1_vdda",
	448	},
	449	{
	450	.supply = "usbs_cvdd",
	451	},
	452	{
	453	.supply = "vddarnwa1",
454	},
455	};
456
457	struct regulator_init_data tps65070_regulator_data[] = {
458	/* dcdc1 */
459	{
460	.constraints = {
461	.min_uV = 3150000,
462	.max_uV = 3450000,
463	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
464	REGULATOR_CHANGE_STATUS),
465	.boot_on = 1,
466	},
467	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
468	.consumer_supplies = tps65070_dcdc1_consumers,
469	},
470
471	/* dcdc2 */
472	{
473	.constraints = {
474	.min_uV = 1710000,
475	.max_uV = 3450000,
476	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
477	REGULATOR_CHANGE_STATUS),
478	.boot_on = 1,
479	},
480	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
481	.consumer_supplies = tps65070_dcdc2_consumers,
482	},
483
484	/* dcdc3 */
485	{
486	.constraints = {
487	.min_uV = 950000,
488	.max_uV = 1320000,
489	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
490	REGULATOR_CHANGE_STATUS),
491	.boot_on = 1,
492	},
493	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
494	.consumer_supplies = tps65070_dcdc3_consumers,
495	},
496
497	/* ldo1 */
498	{
499	.constraints = {
500	.min_uV = 1710000,
501	.max_uV = 1890000,
502	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
503	REGULATOR_CHANGE_STATUS),
504	.boot_on = 1,
505	},
506	.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
507	.consumer_supplies = tps65070_ldo1_consumers,
508	},
509
510	/* ldo2 */
511	{
512	.constraints = {
513	.min_uV = 1140000,
514	.max_uV = 1320000,
515	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
516	REGULATOR_CHANGE_STATUS),
517	.boot_on = 1,
518	},
519	.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
520	.consumer_supplies = tps65070_ldo2_consumers,
521	},
522	};
523
524	static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
525	{
526	I2C_BOARD_INFO("tps6507x", 0x48),
527	.platform_data = &tps65070_regulator_data[0],
528	},
529	};
530
531	static int __init pmic_tps65070_init(void)
532	{
533	return i2c_register_board_info(1, da850evm_tps65070_info,
534	ARRAY_SIZE(da850evm_tps65070_info));
535	}
536
7761ef67 SR	537	static const short da850_evm_lcdc_pins[] = {
	538	DA850_GPIO2_8, DA850_GPIO2_15,
	539	-1
	540	};
	541
bae10587	542	static int __init da850_evm_config_emac(void)
2206771c C	543	{
	544	void __iomem *cfg_chip3_base;
	545	int ret;
	546	u32 val;
bae10587 SN	547	struct davinci_soc_info *soc_info = &davinci_soc_info;
	548	u8 rmii_en = soc_info->emac_pdata->rmii_en;
	549
	550	if (!machine_is_davinci_da850_evm())
	551	return 0;
2206771c	552
d2de0582	553	cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c	554
2206771c	555	val = __raw_readl(cfg_chip3_base);
17fadd9a SN	556
17fadd9a SN	557	if (rmii_en) {
2206771c	558	val \|= BIT(8);
17fadd9a SN	559	ret = da8xx_pinmux_setup(da850_rmii_pins);
	560	pr_info("EMAC: RMII PHY configured, MII PHY will not be"
	561	" functional\n");
	562	} else {
2206771c	563	val &= ~BIT(8);
2206771c	564	ret = da8xx_pinmux_setup(da850_cpgmac_pins);
17fadd9a SN	565	pr_info("EMAC: MII PHY configured, RMII PHY will not be"
	566	" functional\n");
	567	}
	568
2206771c C	569	if (ret)
	570	pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
	571	ret);
	572
17fadd9a SN	573	/* configure the CFGCHIP3 register for RMII or MII */
	574	__raw_writel(val, cfg_chip3_base);
	575
2206771c C	576	ret = davinci_cfg_reg(DA850_GPIO2_6);
	577	if (ret)
	578	pr_warning("da850_evm_init:GPIO(2,6) mux setup "
	579	"failed\n");
	580
	581	ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
	582	if (ret) {
	583	pr_warning("Cannot open GPIO %d\n",
	584	DA850_MII_MDIO_CLKEN_PIN);
	585	return ret;
	586	}
	587
17fadd9a SN	588	/* Enable/Disable MII MDIO clock */
17fadd9a SN	589	gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c	590
bae10587 SN	591	soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
	592	soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
	593
	594	ret = da8xx_register_emac();
	595	if (ret)
	596	pr_warning("da850_evm_init: emac registration failed: %d\n",
	597	ret);
	598
2206771c C	599	return 0;
2206771c C	600	}
bae10587	601	device_initcall(da850_evm_config_emac);
2206771c	602
0fbc5592 SR	603	static __init void da850_evm_init(void)
	604	{
	605	int ret;
	606
a9eb1f67 SN	607	ret = pmic_tps65070_init();
	608	if (ret)
	609	pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
	610	ret);
	611
0fbc5592 SR	612	ret = da8xx_register_edma();
	613	if (ret)
	614	pr_warning("da850_evm_init: edma registration failed: %d\n",
	615	ret);
	616
	617	ret = da8xx_pinmux_setup(da850_i2c0_pins);
	618	if (ret)
	619	pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
	620	ret);
	621
	622	ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
	623	if (ret)
	624	pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
	625	ret);
	626
5a4b1315	627
0fbc5592 SR	628	ret = da8xx_register_watchdog();
	629	if (ret)
	630	pr_warning("da830_evm_init: watchdog registration failed: %d\n",
	631	ret);
	632
820c4fe3	633	if (HAS_MMC) {
820c4fe3 SR	634	ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
	635	if (ret)
	636	pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
	637	" %d\n", ret);
	638
	639	ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
	640	if (ret)
	641	pr_warning("da850_evm_init: can not open GPIO %d\n",
	642	DA850_MMCSD_CD_PIN);
	643	gpio_direction_input(DA850_MMCSD_CD_PIN);
	644
	645	ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
	646	if (ret)
	647	pr_warning("da850_evm_init: can not open GPIO %d\n",
	648	DA850_MMCSD_WP_PIN);
	649	gpio_direction_input(DA850_MMCSD_WP_PIN);
	650
	651	ret = da8xx_register_mmcsd0(&da850_mmc_config);
	652	if (ret)
	653	pr_warning("da850_evm_init: mmcsd0 registration failed:"
	654	" %d\n", ret);
	655	}
700691f2	656
0fbc5592 SR	657	davinci_serial_init(&da850_evm_uart_config);
0fbc5592 SR	658
1a7ff8ff C	659	i2c_register_board_info(1, da850_evm_i2c_devices,
	660	ARRAY_SIZE(da850_evm_i2c_devices));
	661
0fbc5592 SR	662	/*
	663	* shut down uart 0 and 1; they are not used on the board and
	664	* accessing them causes endless "too much work in irq53" messages
	665	* with arago fs
	666	*/
	667	__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
	668	__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 C	669
	670	ret = da8xx_pinmux_setup(da850_mcasp_pins);
	671	if (ret)
	672	pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
	673	ret);
	674
b8864aa4	675	da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 SR	676
	677	ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
	678	if (ret)
	679	pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
	680	ret);
	681
7761ef67 SR	682	/* Handle board specific muxing for LCD here */
	683	ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
	684	if (ret)
	685	pr_warning("da850_evm_init: evm specific lcd mux setup "
	686	"failed: %d\n", ret);
	687
5cbdf276 SR	688	ret = da850_lcd_hw_init();
	689	if (ret)
	690	pr_warning("da850_evm_init: lcd initialization failed: %d\n",
	691	ret);
	692
d52f235f	693	sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b	694	ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276 SR	695	if (ret)
	696	pr_warning("da850_evm_init: lcdc registration failed: %d\n",
	697	ret);
c51df70b MG	698
	699	ret = da8xx_register_rtc();
	700	if (ret)
	701	pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 SN	702
	703	ret = da850_register_cpufreq();
	704	if (ret)
	705	pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
	706	ret);
5aeb15aa SN	707
	708	ret = da8xx_register_cpuidle();
	709	if (ret)
	710	pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
	711	ret);
0fbc5592 SR	712	}
	713
	714	#ifdef CONFIG_SERIAL_8250_CONSOLE
	715	static int __init da850_evm_console_init(void)
	716	{
	717	return add_preferred_console("ttyS", 2, "115200");
	718	}
	719	console_initcall(da850_evm_console_init);
	720	#endif
	721
	722	static __init void da850_evm_irq_init(void)
	723	{
	724	struct davinci_soc_info *soc_info = &davinci_soc_info;
	725
	726	cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
	727	soc_info->intc_irq_prios);
	728	}
	729
	730	static void __init da850_evm_map_io(void)
	731	{
	732	da850_init();
	733	}
	734
	735	MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
	736	.phys_io = IO_PHYS,
	737	.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	738	.boot_params = (DA8XX_DDR_BASE + 0x100),
	739	.map_io = da850_evm_map_io,
	740	.init_irq = da850_evm_irq_init,
	741	.timer = &davinci_timer,
	742	.init_machine = da850_evm_init,
	743	MACHINE_END