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net: davinci_emac: switch to new mdio
[deliverable/linux.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14#include <linux/kernel.h>
0fbc5592
SR		 15#include <linux/init.h>
16#include <linux/console.h>
17#include <linux/i2c.h>
18#include <linux/i2c/at24.h>
75e2ea64 19#include <linux/i2c/pca953x.h>
0bc20bba 20#include <linux/mfd/tps6507x.h>
5cbdf276 21#include <linux/gpio.h>
38beb929
SR		 22#include <linux/platform_device.h>
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/nand.h>
25#include <linux/mtd/partitions.h>
7c5ec609 26#include <linux/mtd/physmap.h>
a9eb1f67 27#include <linux/regulator/machine.h>
8b24599e 28#include <linux/regulator/tps6507x.h>
da1e3680
TF		 29#include <linux/mfd/tps6507x.h>
30#include <linux/input/tps6507x-ts.h>
0fbc5592
SR		 31
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34
0fbc5592
SR		 35#include <mach/cp_intc.h>
36#include <mach/da8xx.h>
38beb929 37#include <mach/nand.h>
7761ef67 38#include <mach/mux.h>
18a8505c 39#include <mach/aemif.h>
0fbc5592 40
5a4b1315
SR		 41#define DA850_EVM_PHY_MASK 0x1
42#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
43
7761ef67 44#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 45#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 46
700691f2
SR		 47#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
48#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
49
2206771c
C		 50#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
51
7c5ec609
SR		 52static struct mtd_partition da850_evm_norflash_partition[] = {
53 {
e2abd5a2 54 .name = "bootloaders + env",
7c5ec609 55 .offset = 0,
e2abd5a2
SR		 56 .size = SZ_512K,
57 .mask_flags = MTD_WRITEABLE,
58 },
59 {
60 .name = "kernel",
61 .offset = MTDPART_OFS_APPEND,
62 .size = SZ_2M,
63 .mask_flags = 0,
64 },
65 {
66 .name = "filesystem",
67 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 68 .size = MTDPART_SIZ_FULL,
69 .mask_flags = 0,
70 },
71};
72
73static struct physmap_flash_data da850_evm_norflash_data = {
74 .width = 2,
75 .parts = da850_evm_norflash_partition,
76 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
77};
78
79static struct resource da850_evm_norflash_resource[] = {
80 {
81 .start = DA8XX_AEMIF_CS2_BASE,
82 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
83 .flags = IORESOURCE_MEM,
84 },
85};
86
87static struct platform_device da850_evm_norflash_device = {
88 .name = "physmap-flash",
89 .id = 0,
90 .dev = {
91 .platform_data = &da850_evm_norflash_data,
92 },
93 .num_resources = 1,
94 .resource = da850_evm_norflash_resource,
95};
96
63534443
SN		 97static struct davinci_pm_config da850_pm_pdata = {
98 .sleepcount = 128,
99};
100
101static struct platform_device da850_pm_device = {
102 .name = "pm-davinci",
103 .dev = {
104 .platform_data = &da850_pm_pdata,
105 },
106 .id = -1,
107};
108
38beb929
SR		 109/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
110 * (128K blocks). It may be used instead of the (default) SPI flash
111 * to boot, using TI's tools to install the secondary boot loader
112 * (UBL) and U-Boot.
113 */
db549d22 114static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 115 {
116 .name = "u-boot env",
117 .offset = 0,
118 .size = SZ_128K,
119 .mask_flags = MTD_WRITEABLE,
120 },
121 {
122 .name = "UBL",
123 .offset = MTDPART_OFS_APPEND,
124 .size = SZ_128K,
125 .mask_flags = MTD_WRITEABLE,
126 },
127 {
128 .name = "u-boot",
129 .offset = MTDPART_OFS_APPEND,
130 .size = 4 * SZ_128K,
131 .mask_flags = MTD_WRITEABLE,
132 },
133 {
134 .name = "kernel",
135 .offset = 0x200000,
136 .size = SZ_2M,
137 .mask_flags = 0,
138 },
139 {
140 .name = "filesystem",
141 .offset = MTDPART_OFS_APPEND,
142 .size = MTDPART_SIZ_FULL,
143 .mask_flags = 0,
144 },
145};
146
18a8505c
SN		 147static struct davinci_aemif_timing da850_evm_nandflash_timing = {
148 .wsetup = 24,
149 .wstrobe = 21,
150 .whold = 14,
151 .rsetup = 19,
152 .rstrobe = 50,
153 .rhold = 0,
154 .ta = 20,
155};
156
38beb929
SR		 157static struct davinci_nand_pdata da850_evm_nandflash_data = {
158 .parts = da850_evm_nandflash_partition,
159 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
160 .ecc_mode = NAND_ECC_HW,
fc42e335 161 .ecc_bits = 4,
38beb929 162 .options = NAND_USE_FLASH_BBT,
18a8505c 163 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 164};
165
166static struct resource da850_evm_nandflash_resource[] = {
167 {
168 .start = DA8XX_AEMIF_CS3_BASE,
169 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
170 .flags = IORESOURCE_MEM,
171 },
172 {
173 .start = DA8XX_AEMIF_CTL_BASE,
174 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
175 .flags = IORESOURCE_MEM,
176 },
177};
178
179static struct platform_device da850_evm_nandflash_device = {
180 .name = "davinci_nand",
181 .id = 1,
182 .dev = {
183 .platform_data = &da850_evm_nandflash_data,
184 },
185 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
186 .resource = da850_evm_nandflash_resource,
187};
188
039c5ee3
SR		 189static struct platform_device *da850_evm_devices[] __initdata = {
190 &da850_evm_nandflash_device,
191 &da850_evm_norflash_device,
192};
193
194#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
195#define DA8XX_AEMIF_ASIZE_16BIT 0x1
196
197static void __init da850_evm_init_nor(void)
198{
199 void __iomem *aemif_addr;
200
201 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
202
203 /* Configure data bus width of CS2 to 16 bit */
204 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
205 DA8XX_AEMIF_ASIZE_16BIT,
206 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
207
208 iounmap(aemif_addr);
209}
210
f48ecc2f
SS		 211static const short da850_evm_nand_pins[] = {
212 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
213 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
214 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
215 DA850_NEMA_WE, DA850_NEMA_OE,
216 -1
217};
218
219static const short da850_evm_nor_pins[] = {
220 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
221 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
222 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
223 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
224 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
225 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
226 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
227 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
228 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
229 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
230 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
231 DA850_EMA_A_22, DA850_EMA_A_23,
232 -1
233};
234
75e2ea64 235static u32 ui_card_detected;
039c5ee3
SR		 236
237#if defined(CONFIG_MMC_DAVINCI) || \
238 defined(CONFIG_MMC_DAVINCI_MODULE)
239#define HAS_MMC 1
240#else
241#define HAS_MMC 0
242#endif
243
f48ecc2f 244static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 245{
246 int ret = 0;
247
248 if (ui_card_detected & !HAS_MMC) {
f48ecc2f 249 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3
SR		 250 if (ret)
251 pr_warning("da850_evm_init: nand mux setup failed: "
252 "%d\n", ret);
253
f48ecc2f 254 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3
SR		 255 if (ret)
256 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
257 ret);
258
259 da850_evm_init_nor();
260
261 platform_add_devices(da850_evm_devices,
262 ARRAY_SIZE(da850_evm_devices));
263 }
264}
75e2ea64 265
bae10587
SN		 266#ifdef CONFIG_DA850_UI_RMII
267static inline void da850_evm_setup_emac_rmii(int rmii_sel)
268{
269 struct davinci_soc_info *soc_info = &davinci_soc_info;
270
271 soc_info->emac_pdata->rmii_en = 1;
272 gpio_set_value(rmii_sel, 0);
273}
274#else
275static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
276#endif
277
75e2ea64
C		 278static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
279 unsigned ngpio, void *c)
280{
281 int sel_a, sel_b, sel_c, ret;
282
283 sel_a = gpio + 7;
284 sel_b = gpio + 6;
285 sel_c = gpio + 5;
286
287 ret = gpio_request(sel_a, "sel_a");
288 if (ret) {
289 pr_warning("Cannot open UI expander pin %d\n", sel_a);
290 goto exp_setup_sela_fail;
291 }
292
293 ret = gpio_request(sel_b, "sel_b");
294 if (ret) {
295 pr_warning("Cannot open UI expander pin %d\n", sel_b);
296 goto exp_setup_selb_fail;
297 }
298
299 ret = gpio_request(sel_c, "sel_c");
300 if (ret) {
301 pr_warning("Cannot open UI expander pin %d\n", sel_c);
302 goto exp_setup_selc_fail;
303 }
304
305 /* deselect all functionalities */
306 gpio_direction_output(sel_a, 1);
307 gpio_direction_output(sel_b, 1);
308 gpio_direction_output(sel_c, 1);
309
310 ui_card_detected = 1;
311 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
312
313 da850_evm_setup_nor_nand();
314
bae10587 315 da850_evm_setup_emac_rmii(sel_a);
2206771c 316
75e2ea64
C		 317 return 0;
318
319exp_setup_selc_fail:
320 gpio_free(sel_b);
321exp_setup_selb_fail:
322 gpio_free(sel_a);
323exp_setup_sela_fail:
324 return ret;
325}
326
327static int da850_evm_ui_expander_teardown(struct i2c_client *client,
328 unsigned gpio, unsigned ngpio, void *c)
329{
330 /* deselect all functionalities */
331 gpio_set_value(gpio + 5, 1);
332 gpio_set_value(gpio + 6, 1);
333 gpio_set_value(gpio + 7, 1);
334
335 gpio_free(gpio + 5);
336 gpio_free(gpio + 6);
337 gpio_free(gpio + 7);
338
339 return 0;
340}
341
342static struct pca953x_platform_data da850_evm_ui_expander_info = {
343 .gpio_base = DAVINCI_N_GPIO,
344 .setup = da850_evm_ui_expander_setup,
345 .teardown = da850_evm_ui_expander_teardown,
346};
347
1a7ff8ff
C		 348static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
349 {
350 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 351 },
352 {
353 I2C_BOARD_INFO("tca6416", 0x20),
354 .platform_data = &da850_evm_ui_expander_info,
355 },
1a7ff8ff
C		 356};
357
0fbc5592
SR		 358static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
359 .bus_freq = 100, /* kHz */
360 .bus_delay = 0, /* usec */
361};
362
363static struct davinci_uart_config da850_evm_uart_config __initdata = {
364 .enabled_uarts = 0x7,
365};
366
491214e1
C		 367/* davinci da850 evm audio machine driver */
368static u8 da850_iis_serializer_direction[] = {
369 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
370 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
371 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
372 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
373};
374
375static struct snd_platform_data da850_evm_snd_data = {
376 .tx_dma_offset = 0x2000,
377 .rx_dma_offset = 0x2000,
378 .op_mode = DAVINCI_MCASP_IIS_MODE,
379 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
380 .tdm_slots = 2,
381 .serial_dir = da850_iis_serializer_direction,
48519f0a 382 .asp_chan_q = EVENTQ_1,
491214e1
C		 383 .version = MCASP_VERSION_2,
384 .txnumevt = 1,
385 .rxnumevt = 1,
386};
387
700691f2
SR		 388static int da850_evm_mmc_get_ro(int index)
389{
390 return gpio_get_value(DA850_MMCSD_WP_PIN);
391}
392
393static int da850_evm_mmc_get_cd(int index)
394{
395 return !gpio_get_value(DA850_MMCSD_CD_PIN);
396}
397
398static struct davinci_mmc_config da850_mmc_config = {
399 .get_ro = da850_evm_mmc_get_ro,
400 .get_cd = da850_evm_mmc_get_cd,
401 .wires = 4,
0046d0bf
C		 402 .max_freq = 50000000,
403 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 404 .version = MMC_CTLR_VERSION_2,
405};
406
d52f235f
C		 407static void da850_panel_power_ctrl(int val)
408{
409 /* lcd backlight */
410 gpio_set_value(DA850_LCD_BL_PIN, val);
411
412 /* lcd power */
413 gpio_set_value(DA850_LCD_PWR_PIN, val);
414}
415
5cbdf276
SR		 416static int da850_lcd_hw_init(void)
417{
418 int status;
419
420 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
421 if (status < 0)
422 return status;
423
424 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
425 if (status < 0) {
426 gpio_free(DA850_LCD_BL_PIN);
427 return status;
428 }
429
430 gpio_direction_output(DA850_LCD_BL_PIN, 0);
431 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
432
d52f235f
C		 433 /* Switch off panel power and backlight */
434 da850_panel_power_ctrl(0);
5cbdf276 435
d52f235f
C		 436 /* Switch on panel power and backlight */
437 da850_panel_power_ctrl(1);
5cbdf276
SR		 438
439 return 0;
440}
491214e1 441
a9eb1f67
SN		 442/* TPS65070 voltage regulator support */
443
444/* 3.3V */
db549d22 445static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 446 {
447 .supply = "usb0_vdda33",
448 },
449 {
450 .supply = "usb1_vdda33",
451 },
452};
453
454/* 3.3V or 1.8V */
db549d22 455static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 456 {
457 .supply = "dvdd3318_a",
458 },
459 {
460 .supply = "dvdd3318_b",
461 },
462 {
463 .supply = "dvdd3318_c",
464 },
465};
466
467/* 1.2V */
db549d22 468static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 469 {
470 .supply = "cvdd",
471 },
472};
473
474/* 1.8V LDO */
db549d22 475static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 476 {
477 .supply = "sata_vddr",
478 },
479 {
480 .supply = "usb0_vdda18",
481 },
482 {
483 .supply = "usb1_vdda18",
484 },
485 {
486 .supply = "ddr_dvdd18",
487 },
488};
489
490/* 1.2V LDO */
db549d22 491static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 492 {
493 .supply = "sata_vdd",
494 },
495 {
496 .supply = "pll0_vdda",
497 },
498 {
499 .supply = "pll1_vdda",
500 },
501 {
502 .supply = "usbs_cvdd",
503 },
504 {
505 .supply = "vddarnwa1",
506 },
507};
508
8b24599e
SN		 509/* We take advantage of the fact that both defdcdc{2,3} are tied high */
510static struct tps6507x_reg_platform_data tps6507x_platform_data = {
511 .defdcdc_default = true,
512};
513
db549d22 514static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 515 /* dcdc1 */
516 {
517 .constraints = {
518 .min_uV = 3150000,
519 .max_uV = 3450000,
520 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
521 REGULATOR_CHANGE_STATUS),
522 .boot_on = 1,
523 },
524 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
525 .consumer_supplies = tps65070_dcdc1_consumers,
526 },
527
528 /* dcdc2 */
529 {
530 .constraints = {
531 .min_uV = 1710000,
532 .max_uV = 3450000,
533 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
534 REGULATOR_CHANGE_STATUS),
535 .boot_on = 1,
536 },
537 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
538 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 539 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 540 },
541
542 /* dcdc3 */
543 {
544 .constraints = {
545 .min_uV = 950000,
546 .max_uV = 1320000,
547 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
548 REGULATOR_CHANGE_STATUS),
549 .boot_on = 1,
550 },
551 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
552 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 553 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 554 },
555
556 /* ldo1 */
557 {
558 .constraints = {
559 .min_uV = 1710000,
560 .max_uV = 1890000,
561 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
562 REGULATOR_CHANGE_STATUS),
563 .boot_on = 1,
564 },
565 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
566 .consumer_supplies = tps65070_ldo1_consumers,
567 },
568
569 /* ldo2 */
570 {
571 .constraints = {
572 .min_uV = 1140000,
573 .max_uV = 1320000,
574 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
575 REGULATOR_CHANGE_STATUS),
576 .boot_on = 1,
577 },
578 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
579 .consumer_supplies = tps65070_ldo2_consumers,
580 },
581};
582
da1e3680
TF		 583static struct touchscreen_init_data tps6507x_touchscreen_data = {
584 .poll_period = 30, /* ms between touch samples */
585 .min_pressure = 0x30, /* minimum pressure to trigger touch */
586 .vref = 0, /* turn off vref when not using A/D */
587 .vendor = 0, /* /sys/class/input/input?/id/vendor */
588 .product = 65070, /* /sys/class/input/input?/id/product */
589 .version = 0x100, /* /sys/class/input/input?/id/version */
590};
591
0bc20bba
TF		 592static struct tps6507x_board tps_board = {
593 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 594 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 595};
596
a9eb1f67
SN		 597static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
598 {
599 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 600 .platform_data = &tps_board,
a9eb1f67
SN		 601 },
602};
603
604static int __init pmic_tps65070_init(void)
605{
606 return i2c_register_board_info(1, da850evm_tps65070_info,
607 ARRAY_SIZE(da850evm_tps65070_info));
608}
609
7761ef67
SR		 610static const short da850_evm_lcdc_pins[] = {
611 DA850_GPIO2_8, DA850_GPIO2_15,
612 -1
613};
614
85b8307f
SS		 615static const short da850_evm_mii_pins[] = {
616 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
617 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
618 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
619 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
620 DA850_MDIO_D,
621 -1
622};
623
624static const short da850_evm_rmii_pins[] = {
625 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
626 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
627 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
628 DA850_MDIO_D,
629 -1
630};
631
bae10587 632static int __init da850_evm_config_emac(void)
2206771c
C		 633{
634 void __iomem *cfg_chip3_base;
635 int ret;
636 u32 val;
bae10587
SN		 637 struct davinci_soc_info *soc_info = &davinci_soc_info;
638 u8 rmii_en = soc_info->emac_pdata->rmii_en;
639
640 if (!machine_is_davinci_da850_evm())
641 return 0;
2206771c 642
d2de0582 643 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 644
2206771c 645 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 646
647 if (rmii_en) {
2206771c 648 val |= BIT(8);
85b8307f 649 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 650 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
651 " functional\n");
652 } else {
2206771c 653 val &= ~BIT(8);
85b8307f 654 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 655 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
656 " functional\n");
657 }
658
2206771c
C		 659 if (ret)
660 pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
661 ret);
662
17fadd9a
SN		 663 /* configure the CFGCHIP3 register for RMII or MII */
664 __raw_writel(val, cfg_chip3_base);
665
2206771c
C		 666 ret = davinci_cfg_reg(DA850_GPIO2_6);
667 if (ret)
668 pr_warning("da850_evm_init:GPIO(2,6) mux setup "
669 "failed\n");
670
671 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
672 if (ret) {
673 pr_warning("Cannot open GPIO %d\n",
674 DA850_MII_MDIO_CLKEN_PIN);
675 return ret;
676 }
677
17fadd9a
SN		 678 /* Enable/Disable MII MDIO clock */
679 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 680
bae10587
SN		 681 soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
682 soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
683
684 ret = da8xx_register_emac();
685 if (ret)
686 pr_warning("da850_evm_init: emac registration failed: %d\n",
687 ret);
688
2206771c
C		 689 return 0;
690}
bae10587 691device_initcall(da850_evm_config_emac);
2206771c 692
a941c503
RS		 693/*
694 * The following EDMA channels/slots are not being used by drivers (for
695 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
696 * they are being reserved for codecs on the DSP side.
697 */
698static const s16 da850_dma0_rsv_chans[][2] = {
699 /* (offset, number) */
700 { 8, 6},
701 {24, 4},
702 {30, 2},
703 {-1, -1}
704};
705
706static const s16 da850_dma0_rsv_slots[][2] = {
707 /* (offset, number) */
708 { 8, 6},
709 {24, 4},
710 {30, 50},
711 {-1, -1}
712};
713
714static const s16 da850_dma1_rsv_chans[][2] = {
715 /* (offset, number) */
716 { 0, 28},
717 {30, 2},
718 {-1, -1}
719};
720
721static const s16 da850_dma1_rsv_slots[][2] = {
722 /* (offset, number) */
723 { 0, 28},
724 {30, 90},
725 {-1, -1}
726};
727
728static struct edma_rsv_info da850_edma_cc0_rsv = {
729 .rsv_chans = da850_dma0_rsv_chans,
730 .rsv_slots = da850_dma0_rsv_slots,
731};
732
733static struct edma_rsv_info da850_edma_cc1_rsv = {
734 .rsv_chans = da850_dma1_rsv_chans,
735 .rsv_slots = da850_dma1_rsv_slots,
736};
737
738static struct edma_rsv_info *da850_edma_rsv[2] = {
739 &da850_edma_cc0_rsv,
740 &da850_edma_cc1_rsv,
741};
742
0fbc5592
SR		 743static __init void da850_evm_init(void)
744{
745 int ret;
746
a9eb1f67
SN		 747 ret = pmic_tps65070_init();
748 if (ret)
749 pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
750 ret);
751
a941c503 752 ret = da850_register_edma(da850_edma_rsv);
0fbc5592
SR		 753 if (ret)
754 pr_warning("da850_evm_init: edma registration failed: %d\n",
755 ret);
756
3821d10a 757 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592
SR		 758 if (ret)
759 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
760 ret);
761
762 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
763 if (ret)
764 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
765 ret);
766
5a4b1315 767
0fbc5592
SR		 768 ret = da8xx_register_watchdog();
769 if (ret)
770 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
771 ret);
772
820c4fe3 773 if (HAS_MMC) {
3821d10a 774 ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
820c4fe3
SR		 775 if (ret)
776 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
777 " %d\n", ret);
778
779 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
780 if (ret)
781 pr_warning("da850_evm_init: can not open GPIO %d\n",
782 DA850_MMCSD_CD_PIN);
783 gpio_direction_input(DA850_MMCSD_CD_PIN);
784
785 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
786 if (ret)
787 pr_warning("da850_evm_init: can not open GPIO %d\n",
788 DA850_MMCSD_WP_PIN);
789 gpio_direction_input(DA850_MMCSD_WP_PIN);
790
791 ret = da8xx_register_mmcsd0(&da850_mmc_config);
792 if (ret)
793 pr_warning("da850_evm_init: mmcsd0 registration failed:"
794 " %d\n", ret);
795 }
700691f2 796
0fbc5592
SR		 797 davinci_serial_init(&da850_evm_uart_config);
798
1a7ff8ff
C		 799 i2c_register_board_info(1, da850_evm_i2c_devices,
800 ARRAY_SIZE(da850_evm_i2c_devices));
801
0fbc5592
SR		 802 /*
803 * shut down uart 0 and 1; they are not used on the board and
804 * accessing them causes endless "too much work in irq53" messages
805 * with arago fs
806 */
807 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
808 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 809
3821d10a 810 ret = davinci_cfg_reg_list(da850_mcasp_pins);
491214e1
C		 811 if (ret)
812 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
813 ret);
814
b8864aa4 815 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 816
3821d10a 817 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276
SR		 818 if (ret)
819 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
820 ret);
821
7761ef67 822 /* Handle board specific muxing for LCD here */
3821d10a 823 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67
SR		 824 if (ret)
825 pr_warning("da850_evm_init: evm specific lcd mux setup "
826 "failed: %d\n", ret);
827
5cbdf276
SR		 828 ret = da850_lcd_hw_init();
829 if (ret)
830 pr_warning("da850_evm_init: lcd initialization failed: %d\n",
831 ret);
832
d52f235f 833 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 834 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276
SR		 835 if (ret)
836 pr_warning("da850_evm_init: lcdc registration failed: %d\n",
837 ret);
c51df70b
MG		 838
839 ret = da8xx_register_rtc();
840 if (ret)
841 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 842
b987c4b2 843 ret = da850_register_cpufreq("pll0_sysclk3");
09dc2d45
SN		 844 if (ret)
845 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
846 ret);
5aeb15aa
SN		 847
848 ret = da8xx_register_cpuidle();
849 if (ret)
850 pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
851 ret);
63534443
SN		 852
853 ret = da850_register_pm(&da850_pm_device);
854 if (ret)
855 pr_warning("da850_evm_init: suspend registration failed: %d\n",
856 ret);
0fbc5592
SR		 857}
858
859#ifdef CONFIG_SERIAL_8250_CONSOLE
860static int __init da850_evm_console_init(void)
861{
1aa5f2a9
MW		 862 if (!machine_is_davinci_da850_evm())
863 return 0;
864
0fbc5592
SR		 865 return add_preferred_console("ttyS", 2, "115200");
866}
867console_initcall(da850_evm_console_init);
868#endif
869
0fbc5592
SR		 870static void __init da850_evm_map_io(void)
871{
872 da850_init();
873}
874
48ea89ea 875MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
0fbc5592
SR		 876 .phys_io = IO_PHYS,
877 .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
878 .boot_params = (DA8XX_DDR_BASE + 0x100),
879 .map_io = da850_evm_map_io,
bd808947 880 .init_irq = cp_intc_init,
0fbc5592
SR		 881 .timer = &davinci_timer,
882 .init_machine = da850_evm_init,
883MACHINE_END
Linux kernel - Deliverables
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