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Linux 3.17-rc1
[deliverable/linux.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
0fbc5592 14#include <linux/console.h>
6809084a
MP		 15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/gpio_keys.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
0fbc5592 20#include <linux/i2c.h>
25f73ed5 21#include <linux/platform_data/at24.h>
5877457a 22#include <linux/platform_data/pca953x.h>
75929f5e 23#include <linux/input.h>
6809084a 24#include <linux/input/tps6507x-ts.h>
0bc20bba 25#include <linux/mfd/tps6507x.h>
38beb929
SR		 26#include <linux/mtd/mtd.h>
27#include <linux/mtd/nand.h>
28#include <linux/mtd/partitions.h>
7c5ec609 29#include <linux/mtd/physmap.h>
6809084a 30#include <linux/platform_device.h>
b856671e 31#include <linux/platform_data/gpio-davinci.h>
6809084a
MP		 32#include <linux/platform_data/mtd-davinci.h>
33#include <linux/platform_data/mtd-davinci-aemif.h>
34#include <linux/platform_data/spi-davinci.h>
ae41d17a 35#include <linux/platform_data/uio_pruss.h>
a9eb1f67 36#include <linux/regulator/machine.h>
8b24599e 37#include <linux/regulator/tps6507x.h>
fdce5568
SN		 38#include <linux/spi/spi.h>
39#include <linux/spi/flash.h>
ab3f5c1f 40#include <linux/wl12xx.h>
0fbc5592 41
b856671e 42#include <mach/common.h>
0fbc5592
SR		 43#include <mach/cp_intc.h>
44#include <mach/da8xx.h>
7761ef67 45#include <mach/mux.h>
6a2461a4 46#include <mach/sram.h>
6809084a
MP		 47
48#include <asm/mach-types.h>
49#include <asm/mach/arch.h>
50#include <asm/system_info.h>
0fbc5592 51
1e046d17 52#include <media/tvp514x.h>
2bd4e58c 53#include <media/adv7343.h>
1e046d17 54
f6f97588 55#define DA850_EVM_PHY_ID "davinci_mdio-0:00"
7761ef67 56#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 57#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 58
700691f2
SR		 59#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
60#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
61
ab3f5c1f
IY		 62#define DA850_WLAN_EN GPIO_TO_PIN(6, 9)
63#define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10)
64
2206771c
C		 65#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
66
fdce5568
SN		 67static struct mtd_partition da850evm_spiflash_part[] = {
68 [0] = {
69 .name = "UBL",
70 .offset = 0,
71 .size = SZ_64K,
72 .mask_flags = MTD_WRITEABLE,
73 },
74 [1] = {
75 .name = "U-Boot",
76 .offset = MTDPART_OFS_APPEND,
77 .size = SZ_512K,
78 .mask_flags = MTD_WRITEABLE,
79 },
80 [2] = {
81 .name = "U-Boot-Env",
82 .offset = MTDPART_OFS_APPEND,
83 .size = SZ_64K,
84 .mask_flags = MTD_WRITEABLE,
85 },
86 [3] = {
87 .name = "Kernel",
88 .offset = MTDPART_OFS_APPEND,
89 .size = SZ_2M + SZ_512K,
90 .mask_flags = 0,
91 },
92 [4] = {
93 .name = "Filesystem",
94 .offset = MTDPART_OFS_APPEND,
95 .size = SZ_4M,
96 .mask_flags = 0,
97 },
98 [5] = {
99 .name = "MAC-Address",
100 .offset = SZ_8M - SZ_64K,
101 .size = SZ_64K,
102 .mask_flags = MTD_WRITEABLE,
103 },
104};
105
106static struct flash_platform_data da850evm_spiflash_data = {
107 .name = "m25p80",
108 .parts = da850evm_spiflash_part,
109 .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
110 .type = "m25p64",
111};
112
113static struct davinci_spi_config da850evm_spiflash_cfg = {
114 .io_type = SPI_IO_TYPE_DMA,
115 .c2tdelay = 8,
116 .t2cdelay = 8,
117};
118
119static struct spi_board_info da850evm_spi_info[] = {
120 {
121 .modalias = "m25p80",
122 .platform_data = &da850evm_spiflash_data,
123 .controller_data = &da850evm_spiflash_cfg,
124 .mode = SPI_MODE_0,
125 .max_speed_hz = 30000000,
126 .bus_num = 1,
127 .chip_select = 0,
128 },
129};
130
810198bc
RS		 131#ifdef CONFIG_MTD
132static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
133{
134 char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
135 size_t retlen;
136
137 if (!strcmp(mtd->name, "MAC-Address")) {
329ad399 138 mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
810198bc
RS		 139 if (retlen == ETH_ALEN)
140 pr_info("Read MAC addr from SPI Flash: %pM\n",
141 mac_addr);
142 }
143}
144
145static struct mtd_notifier da850evm_spi_notifier = {
146 .add = da850_evm_m25p80_notify_add,
147};
148
149static void da850_evm_setup_mac_addr(void)
150{
151 register_mtd_user(&da850evm_spi_notifier);
152}
153#else
154static void da850_evm_setup_mac_addr(void) { }
155#endif
156
7c5ec609
SR		 157static struct mtd_partition da850_evm_norflash_partition[] = {
158 {
e2abd5a2 159 .name = "bootloaders + env",
7c5ec609 160 .offset = 0,
e2abd5a2
SR		 161 .size = SZ_512K,
162 .mask_flags = MTD_WRITEABLE,
163 },
164 {
165 .name = "kernel",
166 .offset = MTDPART_OFS_APPEND,
167 .size = SZ_2M,
168 .mask_flags = 0,
169 },
170 {
171 .name = "filesystem",
172 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 173 .size = MTDPART_SIZ_FULL,
174 .mask_flags = 0,
175 },
176};
177
178static struct physmap_flash_data da850_evm_norflash_data = {
179 .width = 2,
180 .parts = da850_evm_norflash_partition,
181 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
182};
183
184static struct resource da850_evm_norflash_resource[] = {
185 {
186 .start = DA8XX_AEMIF_CS2_BASE,
187 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
188 .flags = IORESOURCE_MEM,
189 },
190};
191
192static struct platform_device da850_evm_norflash_device = {
193 .name = "physmap-flash",
194 .id = 0,
195 .dev = {
196 .platform_data = &da850_evm_norflash_data,
197 },
198 .num_resources = 1,
199 .resource = da850_evm_norflash_resource,
200};
201
63534443
SN		 202static struct davinci_pm_config da850_pm_pdata = {
203 .sleepcount = 128,
204};
205
206static struct platform_device da850_pm_device = {
207 .name = "pm-davinci",
208 .dev = {
209 .platform_data = &da850_pm_pdata,
210 },
211 .id = -1,
212};
213
38beb929
SR		 214/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
215 * (128K blocks). It may be used instead of the (default) SPI flash
216 * to boot, using TI's tools to install the secondary boot loader
217 * (UBL) and U-Boot.
218 */
db549d22 219static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 220 {
221 .name = "u-boot env",
222 .offset = 0,
223 .size = SZ_128K,
224 .mask_flags = MTD_WRITEABLE,
225 },
226 {
227 .name = "UBL",
228 .offset = MTDPART_OFS_APPEND,
229 .size = SZ_128K,
230 .mask_flags = MTD_WRITEABLE,
231 },
232 {
233 .name = "u-boot",
234 .offset = MTDPART_OFS_APPEND,
235 .size = 4 * SZ_128K,
236 .mask_flags = MTD_WRITEABLE,
237 },
238 {
239 .name = "kernel",
240 .offset = 0x200000,
241 .size = SZ_2M,
242 .mask_flags = 0,
243 },
244 {
245 .name = "filesystem",
246 .offset = MTDPART_OFS_APPEND,
247 .size = MTDPART_SIZ_FULL,
248 .mask_flags = 0,
249 },
250};
251
18a8505c
SN		 252static struct davinci_aemif_timing da850_evm_nandflash_timing = {
253 .wsetup = 24,
254 .wstrobe = 21,
255 .whold = 14,
256 .rsetup = 19,
257 .rstrobe = 50,
258 .rhold = 0,
259 .ta = 20,
260};
261
38beb929
SR		 262static struct davinci_nand_pdata da850_evm_nandflash_data = {
263 .parts = da850_evm_nandflash_partition,
264 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
265 .ecc_mode = NAND_ECC_HW,
fc42e335 266 .ecc_bits = 4,
bb9ebd4e 267 .bbt_options = NAND_BBT_USE_FLASH,
18a8505c 268 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 269};
270
271static struct resource da850_evm_nandflash_resource[] = {
272 {
273 .start = DA8XX_AEMIF_CS3_BASE,
274 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
275 .flags = IORESOURCE_MEM,
276 },
277 {
278 .start = DA8XX_AEMIF_CTL_BASE,
279 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
280 .flags = IORESOURCE_MEM,
281 },
282};
283
284static struct platform_device da850_evm_nandflash_device = {
285 .name = "davinci_nand",
286 .id = 1,
287 .dev = {
288 .platform_data = &da850_evm_nandflash_data,
289 },
290 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
291 .resource = da850_evm_nandflash_resource,
292};
293
59858b71 294static struct platform_device *da850_evm_devices[] = {
039c5ee3
SR		 295 &da850_evm_nandflash_device,
296 &da850_evm_norflash_device,
297};
298
299#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
300#define DA8XX_AEMIF_ASIZE_16BIT 0x1
301
302static void __init da850_evm_init_nor(void)
303{
304 void __iomem *aemif_addr;
305
306 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
307
308 /* Configure data bus width of CS2 to 16 bit */
309 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
310 DA8XX_AEMIF_ASIZE_16BIT,
311 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
312
313 iounmap(aemif_addr);
314}
315
f48ecc2f
SS		 316static const short da850_evm_nand_pins[] = {
317 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
318 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
319 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
320 DA850_NEMA_WE, DA850_NEMA_OE,
321 -1
322};
323
324static const short da850_evm_nor_pins[] = {
325 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
326 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
327 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
328 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
329 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
330 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
331 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
332 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
333 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
334 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
335 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
336 DA850_EMA_A_22, DA850_EMA_A_23,
337 -1
338};
339
a0a56db9 340#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI)
039c5ee3 341
f48ecc2f 342static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 343{
344 int ret = 0;
345
b688c2fb 346 if (!HAS_MMC) {
f48ecc2f 347 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3 348 if (ret)
6c7c23cc
RT		 349 pr_warn("%s: NAND mux setup failed: %d\n",
350 __func__, ret);
039c5ee3 351
f48ecc2f 352 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3 353 if (ret)
6c7c23cc
RT		 354 pr_warn("%s: NOR mux setup failed: %d\n",
355 __func__, ret);
039c5ee3
SR		 356
357 da850_evm_init_nor();
358
359 platform_add_devices(da850_evm_devices,
360 ARRAY_SIZE(da850_evm_devices));
67f5185c
IK		 361
362 if (davinci_aemif_setup(&da850_evm_nandflash_device))
363 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
039c5ee3
SR		 364 }
365}
75e2ea64 366
bae10587
SN		 367#ifdef CONFIG_DA850_UI_RMII
368static inline void da850_evm_setup_emac_rmii(int rmii_sel)
369{
370 struct davinci_soc_info *soc_info = &davinci_soc_info;
371
372 soc_info->emac_pdata->rmii_en = 1;
47e7cb14 373 gpio_set_value_cansleep(rmii_sel, 0);
bae10587
SN		 374}
375#else
376static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
377#endif
378
75929f5e
BG		 379
380#define DA850_KEYS_DEBOUNCE_MS 10
381/*
382 * At 200ms polling interval it is possible to miss an
383 * event by tapping very lightly on the push button but most
384 * pushes do result in an event; longer intervals require the
385 * user to hold the button whereas shorter intervals require
386 * more CPU time for polling.
387 */
388#define DA850_GPIO_KEYS_POLL_MS 200
389
390enum da850_evm_ui_exp_pins {
391 DA850_EVM_UI_EXP_SEL_C = 5,
392 DA850_EVM_UI_EXP_SEL_B,
393 DA850_EVM_UI_EXP_SEL_A,
394 DA850_EVM_UI_EXP_PB8,
395 DA850_EVM_UI_EXP_PB7,
396 DA850_EVM_UI_EXP_PB6,
397 DA850_EVM_UI_EXP_PB5,
398 DA850_EVM_UI_EXP_PB4,
399 DA850_EVM_UI_EXP_PB3,
400 DA850_EVM_UI_EXP_PB2,
401 DA850_EVM_UI_EXP_PB1,
402};
403
58b6c5a1 404static const char * const da850_evm_ui_exp[] = {
75929f5e
BG		 405 [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
406 [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
407 [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
408 [DA850_EVM_UI_EXP_PB8] = "pb8",
409 [DA850_EVM_UI_EXP_PB7] = "pb7",
410 [DA850_EVM_UI_EXP_PB6] = "pb6",
411 [DA850_EVM_UI_EXP_PB5] = "pb5",
412 [DA850_EVM_UI_EXP_PB4] = "pb4",
413 [DA850_EVM_UI_EXP_PB3] = "pb3",
414 [DA850_EVM_UI_EXP_PB2] = "pb2",
415 [DA850_EVM_UI_EXP_PB1] = "pb1",
416};
417
418#define DA850_N_UI_PB 8
419
420static struct gpio_keys_button da850_evm_ui_keys[] = {
421 [0 ... DA850_N_UI_PB - 1] = {
422 .type = EV_KEY,
423 .active_low = 1,
424 .wakeup = 0,
425 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
426 .code = -1, /* assigned at runtime */
427 .gpio = -1, /* assigned at runtime */
428 .desc = NULL, /* assigned at runtime */
429 },
430};
431
432static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
433 .buttons = da850_evm_ui_keys,
434 .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
435 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
436};
437
438static struct platform_device da850_evm_ui_keys_device = {
439 .name = "gpio-keys-polled",
440 .id = 0,
441 .dev = {
442 .platform_data = &da850_evm_ui_keys_pdata
443 },
444};
445
446static void da850_evm_ui_keys_init(unsigned gpio)
447{
448 int i;
449 struct gpio_keys_button *button;
450
451 for (i = 0; i < DA850_N_UI_PB; i++) {
452 button = &da850_evm_ui_keys[i];
453 button->code = KEY_F8 - i;
454 button->desc = (char *)
455 da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
456 button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
457 }
458}
459
1e046d17
MH		 460#ifdef CONFIG_DA850_UI_SD_VIDEO_PORT
461static inline void da850_evm_setup_video_port(int video_sel)
462{
463 gpio_set_value_cansleep(video_sel, 0);
464}
465#else
466static inline void da850_evm_setup_video_port(int video_sel) { }
467#endif
468
75e2ea64
C		 469static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
470 unsigned ngpio, void *c)
471{
472 int sel_a, sel_b, sel_c, ret;
473
53c2897d
BG		 474 sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
475 sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
476 sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
75e2ea64 477
53c2897d 478 ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
75e2ea64 479 if (ret) {
6c7c23cc 480 pr_warn("Cannot open UI expander pin %d\n", sel_a);
75e2ea64
C		 481 goto exp_setup_sela_fail;
482 }
483
53c2897d 484 ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
75e2ea64 485 if (ret) {
6c7c23cc 486 pr_warn("Cannot open UI expander pin %d\n", sel_b);
75e2ea64
C		 487 goto exp_setup_selb_fail;
488 }
489
53c2897d 490 ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
75e2ea64 491 if (ret) {
6c7c23cc 492 pr_warn("Cannot open UI expander pin %d\n", sel_c);
75e2ea64
C		 493 goto exp_setup_selc_fail;
494 }
495
496 /* deselect all functionalities */
497 gpio_direction_output(sel_a, 1);
498 gpio_direction_output(sel_b, 1);
499 gpio_direction_output(sel_c, 1);
500
75929f5e
BG		 501 da850_evm_ui_keys_init(gpio);
502 ret = platform_device_register(&da850_evm_ui_keys_device);
503 if (ret) {
6c7c23cc 504 pr_warn("Could not register UI GPIO expander push-buttons");
75929f5e
BG		 505 goto exp_setup_keys_fail;
506 }
507
75e2ea64
C		 508 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
509
510 da850_evm_setup_nor_nand();
511
bae10587 512 da850_evm_setup_emac_rmii(sel_a);
2206771c 513
1e046d17
MH		 514 da850_evm_setup_video_port(sel_c);
515
75e2ea64
C		 516 return 0;
517
75929f5e
BG		 518exp_setup_keys_fail:
519 gpio_free(sel_c);
75e2ea64
C		 520exp_setup_selc_fail:
521 gpio_free(sel_b);
522exp_setup_selb_fail:
523 gpio_free(sel_a);
524exp_setup_sela_fail:
525 return ret;
526}
527
528static int da850_evm_ui_expander_teardown(struct i2c_client *client,
529 unsigned gpio, unsigned ngpio, void *c)
530{
75929f5e
BG		 531 platform_device_unregister(&da850_evm_ui_keys_device);
532
75e2ea64 533 /* deselect all functionalities */
53c2897d
BG		 534 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
535 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
536 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
75e2ea64 537
53c2897d
BG		 538 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
539 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
540 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
75e2ea64
C		 541
542 return 0;
543}
544
70b30939
BG		 545/* assign the baseboard expander's GPIOs after the UI board's */
546#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
547#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
548
549enum da850_evm_bb_exp_pins {
550 DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
551 DA850_EVM_BB_EXP_SW_RST,
552 DA850_EVM_BB_EXP_TP_23,
553 DA850_EVM_BB_EXP_TP_22,
554 DA850_EVM_BB_EXP_TP_21,
555 DA850_EVM_BB_EXP_USER_PB1,
556 DA850_EVM_BB_EXP_USER_LED2,
557 DA850_EVM_BB_EXP_USER_LED1,
558 DA850_EVM_BB_EXP_USER_SW1,
559 DA850_EVM_BB_EXP_USER_SW2,
560 DA850_EVM_BB_EXP_USER_SW3,
561 DA850_EVM_BB_EXP_USER_SW4,
562 DA850_EVM_BB_EXP_USER_SW5,
563 DA850_EVM_BB_EXP_USER_SW6,
564 DA850_EVM_BB_EXP_USER_SW7,
565 DA850_EVM_BB_EXP_USER_SW8
566};
567
58b6c5a1 568static const char * const da850_evm_bb_exp[] = {
70b30939
BG		 569 [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
570 [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
571 [DA850_EVM_BB_EXP_TP_23] = "tp_23",
572 [DA850_EVM_BB_EXP_TP_22] = "tp_22",
573 [DA850_EVM_BB_EXP_TP_21] = "tp_21",
574 [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
575 [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
576 [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
577 [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
578 [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
579 [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
580 [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
581 [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
582 [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
583 [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
584 [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
585};
586
587#define DA850_N_BB_USER_SW 8
588
589static struct gpio_keys_button da850_evm_bb_keys[] = {
590 [0] = {
591 .type = EV_KEY,
592 .active_low = 1,
593 .wakeup = 0,
594 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
595 .code = KEY_PROG1,
596 .desc = NULL, /* assigned at runtime */
597 .gpio = -1, /* assigned at runtime */
598 },
599 [1 ... DA850_N_BB_USER_SW] = {
600 .type = EV_SW,
601 .active_low = 1,
602 .wakeup = 0,
603 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
604 .code = -1, /* assigned at runtime */
605 .desc = NULL, /* assigned at runtime */
606 .gpio = -1, /* assigned at runtime */
607 },
608};
609
610static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
611 .buttons = da850_evm_bb_keys,
612 .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
613 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
614};
615
616static struct platform_device da850_evm_bb_keys_device = {
617 .name = "gpio-keys-polled",
618 .id = 1,
619 .dev = {
620 .platform_data = &da850_evm_bb_keys_pdata
621 },
622};
623
624static void da850_evm_bb_keys_init(unsigned gpio)
625{
626 int i;
627 struct gpio_keys_button *button;
628
629 button = &da850_evm_bb_keys[0];
630 button->desc = (char *)
631 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
632 button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
633
634 for (i = 0; i < DA850_N_BB_USER_SW; i++) {
635 button = &da850_evm_bb_keys[i + 1];
636 button->code = SW_LID + i;
637 button->desc = (char *)
638 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
639 button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
640 }
641}
642
643#define DA850_N_BB_USER_LED 2
644
645static struct gpio_led da850_evm_bb_leds[] = {
646 [0 ... DA850_N_BB_USER_LED - 1] = {
647 .active_low = 1,
648 .gpio = -1, /* assigned at runtime */
649 .name = NULL, /* assigned at runtime */
650 },
651};
652
653static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
654 .leds = da850_evm_bb_leds,
655 .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
656};
657
658static struct platform_device da850_evm_bb_leds_device = {
659 .name = "leds-gpio",
660 .id = -1,
661 .dev = {
662 .platform_data = &da850_evm_bb_leds_pdata
663 }
664};
665
666static void da850_evm_bb_leds_init(unsigned gpio)
667{
668 int i;
669 struct gpio_led *led;
670
671 for (i = 0; i < DA850_N_BB_USER_LED; i++) {
672 led = &da850_evm_bb_leds[i];
673
674 led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
675 led->name =
676 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
677 }
678}
679
680static int da850_evm_bb_expander_setup(struct i2c_client *client,
681 unsigned gpio, unsigned ngpio,
682 void *c)
683{
684 int ret;
685
686 /*
687 * Register the switches and pushbutton on the baseboard as a gpio-keys
688 * device.
689 */
690 da850_evm_bb_keys_init(gpio);
691 ret = platform_device_register(&da850_evm_bb_keys_device);
692 if (ret) {
6c7c23cc 693 pr_warn("Could not register baseboard GPIO expander keys");
70b30939
BG		 694 goto io_exp_setup_sw_fail;
695 }
696
697 da850_evm_bb_leds_init(gpio);
698 ret = platform_device_register(&da850_evm_bb_leds_device);
699 if (ret) {
6c7c23cc 700 pr_warn("Could not register baseboard GPIO expander LEDs");
70b30939
BG		 701 goto io_exp_setup_leds_fail;
702 }
703
704 return 0;
705
706io_exp_setup_leds_fail:
707 platform_device_unregister(&da850_evm_bb_keys_device);
708io_exp_setup_sw_fail:
709 return ret;
710}
711
712static int da850_evm_bb_expander_teardown(struct i2c_client *client,
713 unsigned gpio, unsigned ngpio, void *c)
714{
715 platform_device_unregister(&da850_evm_bb_leds_device);
716 platform_device_unregister(&da850_evm_bb_keys_device);
717
718 return 0;
719}
720
75e2ea64
C		 721static struct pca953x_platform_data da850_evm_ui_expander_info = {
722 .gpio_base = DAVINCI_N_GPIO,
723 .setup = da850_evm_ui_expander_setup,
724 .teardown = da850_evm_ui_expander_teardown,
75929f5e 725 .names = da850_evm_ui_exp,
75e2ea64
C		 726};
727
70b30939
BG		 728static struct pca953x_platform_data da850_evm_bb_expander_info = {
729 .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
730 .setup = da850_evm_bb_expander_setup,
731 .teardown = da850_evm_bb_expander_teardown,
732 .names = da850_evm_bb_exp,
733};
734
1a7ff8ff
C		 735static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
736 {
737 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 738 },
739 {
740 I2C_BOARD_INFO("tca6416", 0x20),
741 .platform_data = &da850_evm_ui_expander_info,
742 },
70b30939
BG		 743 {
744 I2C_BOARD_INFO("tca6416", 0x21),
745 .platform_data = &da850_evm_bb_expander_info,
746 },
1a7ff8ff
C		 747};
748
0fbc5592
SR		 749static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
750 .bus_freq = 100, /* kHz */
751 .bus_delay = 0, /* usec */
752};
753
491214e1
C		 754/* davinci da850 evm audio machine driver */
755static u8 da850_iis_serializer_direction[] = {
756 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
757 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
758 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
759 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
760};
761
762static struct snd_platform_data da850_evm_snd_data = {
88abfd5b
MP		 763 .tx_dma_offset = 0x2000,
764 .rx_dma_offset = 0x2000,
765 .op_mode = DAVINCI_MCASP_IIS_MODE,
766 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
767 .tdm_slots = 2,
768 .serial_dir = da850_iis_serializer_direction,
769 .asp_chan_q = EVENTQ_0,
770 .ram_chan_q = EVENTQ_1,
771 .version = MCASP_VERSION_2,
772 .txnumevt = 1,
773 .rxnumevt = 1,
774 .sram_size_playback = SZ_8K,
775 .sram_size_capture = SZ_8K,
491214e1
C		 776};
777
c840fc74
MW		 778static const short da850_evm_mcasp_pins[] __initconst = {
779 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
780 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
781 DA850_AXR_11, DA850_AXR_12,
782 -1
783};
784
700691f2
SR		 785static int da850_evm_mmc_get_ro(int index)
786{
787 return gpio_get_value(DA850_MMCSD_WP_PIN);
788}
789
790static int da850_evm_mmc_get_cd(int index)
791{
792 return !gpio_get_value(DA850_MMCSD_CD_PIN);
793}
794
795static struct davinci_mmc_config da850_mmc_config = {
796 .get_ro = da850_evm_mmc_get_ro,
797 .get_cd = da850_evm_mmc_get_cd,
798 .wires = 4,
0046d0bf
C		 799 .max_freq = 50000000,
800 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 801};
802
5a0d80ea
MW		 803static const short da850_evm_mmcsd0_pins[] __initconst = {
804 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
805 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
806 DA850_GPIO4_0, DA850_GPIO4_1,
807 -1
808};
809
d52f235f
C		 810static void da850_panel_power_ctrl(int val)
811{
812 /* lcd backlight */
813 gpio_set_value(DA850_LCD_BL_PIN, val);
814
815 /* lcd power */
816 gpio_set_value(DA850_LCD_PWR_PIN, val);
817}
818
5cbdf276
SR		 819static int da850_lcd_hw_init(void)
820{
821 int status;
822
823 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
824 if (status < 0)
825 return status;
826
827 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
828 if (status < 0) {
829 gpio_free(DA850_LCD_BL_PIN);
830 return status;
831 }
832
833 gpio_direction_output(DA850_LCD_BL_PIN, 0);
834 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
835
d52f235f
C		 836 /* Switch off panel power and backlight */
837 da850_panel_power_ctrl(0);
5cbdf276 838
d52f235f
C		 839 /* Switch on panel power and backlight */
840 da850_panel_power_ctrl(1);
5cbdf276
SR		 841
842 return 0;
843}
491214e1 844
a9eb1f67
SN		 845/* TPS65070 voltage regulator support */
846
847/* 3.3V */
db549d22 848static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 849 {
850 .supply = "usb0_vdda33",
851 },
852 {
853 .supply = "usb1_vdda33",
854 },
855};
856
857/* 3.3V or 1.8V */
db549d22 858static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 859 {
860 .supply = "dvdd3318_a",
861 },
862 {
863 .supply = "dvdd3318_b",
864 },
865 {
866 .supply = "dvdd3318_c",
867 },
868};
869
870/* 1.2V */
db549d22 871static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 872 {
873 .supply = "cvdd",
874 },
875};
876
877/* 1.8V LDO */
db549d22 878static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 879 {
880 .supply = "sata_vddr",
881 },
882 {
883 .supply = "usb0_vdda18",
884 },
885 {
886 .supply = "usb1_vdda18",
887 },
888 {
889 .supply = "ddr_dvdd18",
890 },
891};
892
893/* 1.2V LDO */
db549d22 894static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 895 {
896 .supply = "sata_vdd",
897 },
898 {
899 .supply = "pll0_vdda",
900 },
901 {
902 .supply = "pll1_vdda",
903 },
904 {
905 .supply = "usbs_cvdd",
906 },
907 {
908 .supply = "vddarnwa1",
909 },
910};
911
8b24599e
SN		 912/* We take advantage of the fact that both defdcdc{2,3} are tied high */
913static struct tps6507x_reg_platform_data tps6507x_platform_data = {
914 .defdcdc_default = true,
915};
916
db549d22 917static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 918 /* dcdc1 */
919 {
920 .constraints = {
921 .min_uV = 3150000,
922 .max_uV = 3450000,
923 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
924 REGULATOR_CHANGE_STATUS),
925 .boot_on = 1,
926 },
927 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
928 .consumer_supplies = tps65070_dcdc1_consumers,
929 },
930
931 /* dcdc2 */
932 {
933 .constraints = {
934 .min_uV = 1710000,
935 .max_uV = 3450000,
936 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
937 REGULATOR_CHANGE_STATUS),
938 .boot_on = 1,
939 },
940 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
941 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 942 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 943 },
944
945 /* dcdc3 */
946 {
947 .constraints = {
948 .min_uV = 950000,
28bd2c34 949 .max_uV = 1350000,
a9eb1f67
SN		 950 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
951 REGULATOR_CHANGE_STATUS),
952 .boot_on = 1,
953 },
954 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
955 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 956 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 957 },
958
959 /* ldo1 */
960 {
961 .constraints = {
962 .min_uV = 1710000,
963 .max_uV = 1890000,
964 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
965 REGULATOR_CHANGE_STATUS),
966 .boot_on = 1,
967 },
968 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
969 .consumer_supplies = tps65070_ldo1_consumers,
970 },
971
972 /* ldo2 */
973 {
974 .constraints = {
975 .min_uV = 1140000,
976 .max_uV = 1320000,
977 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
978 REGULATOR_CHANGE_STATUS),
979 .boot_on = 1,
980 },
981 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
982 .consumer_supplies = tps65070_ldo2_consumers,
983 },
984};
985
da1e3680
TF		 986static struct touchscreen_init_data tps6507x_touchscreen_data = {
987 .poll_period = 30, /* ms between touch samples */
988 .min_pressure = 0x30, /* minimum pressure to trigger touch */
da1e3680
TF		 989 .vendor = 0, /* /sys/class/input/input?/id/vendor */
990 .product = 65070, /* /sys/class/input/input?/id/product */
991 .version = 0x100, /* /sys/class/input/input?/id/version */
992};
993
0bc20bba
TF		 994static struct tps6507x_board tps_board = {
995 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 996 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 997};
998
3506f277 999static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
a9eb1f67
SN		 1000 {
1001 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 1002 .platform_data = &tps_board,
a9eb1f67
SN		 1003 },
1004};
1005
1006static int __init pmic_tps65070_init(void)
1007{
3506f277
BG		 1008 return i2c_register_board_info(1, da850_evm_tps65070_info,
1009 ARRAY_SIZE(da850_evm_tps65070_info));
a9eb1f67
SN		 1010}
1011
7761ef67
SR		 1012static const short da850_evm_lcdc_pins[] = {
1013 DA850_GPIO2_8, DA850_GPIO2_15,
1014 -1
1015};
1016
85b8307f
SS		 1017static const short da850_evm_mii_pins[] = {
1018 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
1019 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
1020 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
1021 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
1022 DA850_MDIO_D,
1023 -1
1024};
1025
1026static const short da850_evm_rmii_pins[] = {
1027 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
1028 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
1029 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
1030 DA850_MDIO_D,
1031 -1
1032};
1033
bae10587 1034static int __init da850_evm_config_emac(void)
2206771c
C		 1035{
1036 void __iomem *cfg_chip3_base;
1037 int ret;
1038 u32 val;
bae10587
SN		 1039 struct davinci_soc_info *soc_info = &davinci_soc_info;
1040 u8 rmii_en = soc_info->emac_pdata->rmii_en;
1041
1042 if (!machine_is_davinci_da850_evm())
1043 return 0;
2206771c 1044
d2de0582 1045 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 1046
2206771c 1047 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 1048
1049 if (rmii_en) {
2206771c 1050 val |= BIT(8);
85b8307f 1051 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 1052 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
1053 " functional\n");
1054 } else {
2206771c 1055 val &= ~BIT(8);
85b8307f 1056 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 1057 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
1058 " functional\n");
1059 }
1060
2206771c 1061 if (ret)
6c7c23cc
RT		 1062 pr_warn("%s: CPGMAC/RMII mux setup failed: %d\n",
1063 __func__, ret);
2206771c 1064
17fadd9a
SN		 1065 /* configure the CFGCHIP3 register for RMII or MII */
1066 __raw_writel(val, cfg_chip3_base);
1067
2206771c
C		 1068 ret = davinci_cfg_reg(DA850_GPIO2_6);
1069 if (ret)
6c7c23cc 1070 pr_warn("%s:GPIO(2,6) mux setup failed\n", __func__);
2206771c
C		 1071
1072 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
1073 if (ret) {
6c7c23cc 1074 pr_warn("Cannot open GPIO %d\n", DA850_MII_MDIO_CLKEN_PIN);
2206771c
C		 1075 return ret;
1076 }
1077
17fadd9a
SN		 1078 /* Enable/Disable MII MDIO clock */
1079 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 1080
782f2d78 1081 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
bae10587
SN		 1082
1083 ret = da8xx_register_emac();
1084 if (ret)
6c7c23cc 1085 pr_warn("%s: EMAC registration failed: %d\n", __func__, ret);
bae10587 1086
2206771c
C		 1087 return 0;
1088}
bae10587 1089device_initcall(da850_evm_config_emac);
2206771c 1090
a941c503
RS		 1091/*
1092 * The following EDMA channels/slots are not being used by drivers (for
1093 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
1094 * they are being reserved for codecs on the DSP side.
1095 */
1096static const s16 da850_dma0_rsv_chans[][2] = {
1097 /* (offset, number) */
1098 { 8, 6},
1099 {24, 4},
1100 {30, 2},
1101 {-1, -1}
1102};
1103
1104static const s16 da850_dma0_rsv_slots[][2] = {
1105 /* (offset, number) */
1106 { 8, 6},
1107 {24, 4},
1108 {30, 50},
1109 {-1, -1}
1110};
1111
1112static const s16 da850_dma1_rsv_chans[][2] = {
1113 /* (offset, number) */
1114 { 0, 28},
1115 {30, 2},
1116 {-1, -1}
1117};
1118
1119static const s16 da850_dma1_rsv_slots[][2] = {
1120 /* (offset, number) */
1121 { 0, 28},
1122 {30, 90},
1123 {-1, -1}
1124};
1125
1126static struct edma_rsv_info da850_edma_cc0_rsv = {
1127 .rsv_chans = da850_dma0_rsv_chans,
1128 .rsv_slots = da850_dma0_rsv_slots,
1129};
1130
1131static struct edma_rsv_info da850_edma_cc1_rsv = {
1132 .rsv_chans = da850_dma1_rsv_chans,
1133 .rsv_slots = da850_dma1_rsv_slots,
1134};
1135
1136static struct edma_rsv_info *da850_edma_rsv[2] = {
1137 &da850_edma_cc0_rsv,
1138 &da850_edma_cc1_rsv,
1139};
1140
28bd2c34
SN		 1141#ifdef CONFIG_CPU_FREQ
1142static __init int da850_evm_init_cpufreq(void)
1143{
1144 switch (system_rev & 0xF) {
1145 case 3:
1146 da850_max_speed = 456000;
1147 break;
1148 case 2:
1149 da850_max_speed = 408000;
1150 break;
1151 case 1:
1152 da850_max_speed = 372000;
1153 break;
1154 }
1155
1156 return da850_register_cpufreq("pll0_sysclk3");
1157}
1158#else
1159static __init int da850_evm_init_cpufreq(void) { return 0; }
1160#endif
1161
1e046d17
MH		 1162#if defined(CONFIG_DA850_UI_SD_VIDEO_PORT)
1163
1164#define TVP5147_CH0 "tvp514x-0"
1165#define TVP5147_CH1 "tvp514x-1"
1166
1167/* VPIF capture configuration */
1168static struct tvp514x_platform_data tvp5146_pdata = {
1169 .clk_polarity = 0,
1170 .hs_polarity = 1,
1171 .vs_polarity = 1,
1172};
1173
1174#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
1175
1176static const struct vpif_input da850_ch0_inputs[] = {
1177 {
1178 .input = {
1179 .index = 0,
1180 .name = "Composite",
1181 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1182 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1183 .std = TVP514X_STD_ALL,
1184 },
7aaad131
HV		 1185 .input_route = INPUT_CVBS_VI2B,
1186 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1187 .subdev_name = TVP5147_CH0,
1188 },
1189};
1190
1191static const struct vpif_input da850_ch1_inputs[] = {
1192 {
1193 .input = {
1194 .index = 0,
1195 .name = "S-Video",
1196 .type = V4L2_INPUT_TYPE_CAMERA,
7aaad131 1197 .capabilities = V4L2_IN_CAP_STD,
1e046d17
MH		 1198 .std = TVP514X_STD_ALL,
1199 },
7aaad131
HV		 1200 .input_route = INPUT_SVIDEO_VI2C_VI1C,
1201 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
1e046d17
MH		 1202 .subdev_name = TVP5147_CH1,
1203 },
1204};
1205
1206static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
1207 {
1208 .name = TVP5147_CH0,
1209 .board_info = {
1210 I2C_BOARD_INFO("tvp5146", 0x5d),
1211 .platform_data = &tvp5146_pdata,
1212 },
1e046d17
MH		 1213 },
1214 {
1215 .name = TVP5147_CH1,
1216 .board_info = {
1217 I2C_BOARD_INFO("tvp5146", 0x5c),
1218 .platform_data = &tvp5146_pdata,
1219 },
1e046d17
MH		 1220 },
1221};
1222
1223static struct vpif_capture_config da850_vpif_capture_config = {
1224 .subdev_info = da850_vpif_capture_sdev_info,
1225 .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
1226 .chan_config[0] = {
1227 .inputs = da850_ch0_inputs,
1228 .input_count = ARRAY_SIZE(da850_ch0_inputs),
0d4f35f3
HV		 1229 .vpif_if = {
1230 .if_type = VPIF_IF_BT656,
1231 .hd_pol = 1,
1232 .vd_pol = 1,
1233 .fid_pol = 0,
1234 },
1e046d17
MH		 1235 },
1236 .chan_config[1] = {
1237 .inputs = da850_ch1_inputs,
1238 .input_count = ARRAY_SIZE(da850_ch1_inputs),
0d4f35f3
HV		 1239 .vpif_if = {
1240 .if_type = VPIF_IF_BT656,
1241 .hd_pol = 1,
1242 .vd_pol = 1,
1243 .fid_pol = 0,
1244 },
1e046d17
MH		 1245 },
1246 .card_name = "DA850/OMAP-L138 Video Capture",
1247};
1248
1249/* VPIF display configuration */
3e85a44a
LP		 1250
1251static struct adv7343_platform_data adv7343_pdata = {
1252 .mode_config = {
5e95814f 1253 .dac = { 1, 1, 1 },
3e85a44a
LP		 1254 },
1255 .sd_config = {
5e95814f 1256 .sd_dac_out = { 1 },
3e85a44a
LP		 1257 },
1258};
1259
1e046d17
MH		 1260static struct vpif_subdev_info da850_vpif_subdev[] = {
1261 {
1262 .name = "adv7343",
1263 .board_info = {
1264 I2C_BOARD_INFO("adv7343", 0x2a),
3e85a44a 1265 .platform_data = &adv7343_pdata,
1e046d17
MH		 1266 },
1267 },
1268};
1269
2bd4e58c
LP		 1270static const struct vpif_output da850_ch0_outputs[] = {
1271 {
1272 .output = {
1273 .index = 0,
1274 .name = "Composite",
1275 .type = V4L2_OUTPUT_TYPE_ANALOG,
1276 .capabilities = V4L2_OUT_CAP_STD,
1277 .std = V4L2_STD_ALL,
1278 },
1279 .subdev_name = "adv7343",
1280 .output_route = ADV7343_COMPOSITE_ID,
1281 },
1282 {
1283 .output = {
1284 .index = 1,
1285 .name = "S-Video",
1286 .type = V4L2_OUTPUT_TYPE_ANALOG,
1287 .capabilities = V4L2_OUT_CAP_STD,
1288 .std = V4L2_STD_ALL,
1289 },
1290 .subdev_name = "adv7343",
1291 .output_route = ADV7343_SVIDEO_ID,
1292 },
1e046d17
MH		 1293};
1294
1295static struct vpif_display_config da850_vpif_display_config = {
1296 .subdevinfo = da850_vpif_subdev,
1297 .subdev_count = ARRAY_SIZE(da850_vpif_subdev),
2bd4e58c
LP		 1298 .chan_config[0] = {
1299 .outputs = da850_ch0_outputs,
1300 .output_count = ARRAY_SIZE(da850_ch0_outputs),
1301 },
1e046d17
MH		 1302 .card_name = "DA850/OMAP-L138 Video Display",
1303};
1304
1305static __init void da850_vpif_init(void)
1306{
1307 int ret;
1308
1309 ret = da850_register_vpif();
1310 if (ret)
1311 pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret);
1312
1313 ret = davinci_cfg_reg_list(da850_vpif_capture_pins);
1314 if (ret)
1315 pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n",
1316 ret);
1317
1318 ret = da850_register_vpif_capture(&da850_vpif_capture_config);
1319 if (ret)
1320 pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret);
1321
1322 ret = davinci_cfg_reg_list(da850_vpif_display_pins);
1323 if (ret)
1324 pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n",
1325 ret);
1326
1327 ret = da850_register_vpif_display(&da850_vpif_display_config);
1328 if (ret)
1329 pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret);
1330}
1331
1332#else
1333static __init void da850_vpif_init(void) {}
1334#endif
1335
ab3f5c1f
IY		 1336#ifdef CONFIG_DA850_WL12XX
1337
1338static void wl12xx_set_power(int index, bool power_on)
1339{
1340 static bool power_state;
1341
1342 pr_debug("Powering %s wl12xx", power_on ? "on" : "off");
1343
1344 if (power_on == power_state)
1345 return;
1346 power_state = power_on;
1347
1348 if (power_on) {
1349 /* Power up sequence required for wl127x devices */
1350 gpio_set_value(DA850_WLAN_EN, 1);
1351 usleep_range(15000, 15000);
1352 gpio_set_value(DA850_WLAN_EN, 0);
1353 usleep_range(1000, 1000);
1354 gpio_set_value(DA850_WLAN_EN, 1);
1355 msleep(70);
1356 } else {
1357 gpio_set_value(DA850_WLAN_EN, 0);
1358 }
1359}
1360
1361static struct davinci_mmc_config da850_wl12xx_mmc_config = {
1362 .set_power = wl12xx_set_power,
1363 .wires = 4,
1364 .max_freq = 25000000,
1365 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE |
1366 MMC_CAP_POWER_OFF_CARD,
ab3f5c1f
IY		 1367};
1368
1369static const short da850_wl12xx_pins[] __initconst = {
1370 DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2,
1371 DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD,
1372 DA850_GPIO6_9, DA850_GPIO6_10,
1373 -1
1374};
1375
1376static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = {
1377 .irq = -1,
1378 .board_ref_clock = WL12XX_REFCLOCK_38,
1379 .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ,
1380};
1381
1382static __init int da850_wl12xx_init(void)
1383{
1384 int ret;
1385
1386 ret = davinci_cfg_reg_list(da850_wl12xx_pins);
1387 if (ret) {
1388 pr_err("wl12xx/mmc mux setup failed: %d\n", ret);
1389 goto exit;
1390 }
1391
1392 ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config);
1393 if (ret) {
1394 pr_err("wl12xx/mmc registration failed: %d\n", ret);
1395 goto exit;
1396 }
1397
1398 ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en");
1399 if (ret) {
1400 pr_err("Could not request wl12xx enable gpio: %d\n", ret);
1401 goto exit;
1402 }
1403
1404 ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq");
1405 if (ret) {
1406 pr_err("Could not request wl12xx irq gpio: %d\n", ret);
1407 goto free_wlan_en;
1408 }
1409
1410 da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ);
1411
1412 ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data);
1413 if (ret) {
1414 pr_err("Could not set wl12xx data: %d\n", ret);
1415 goto free_wlan_irq;
1416 }
1417
1418 return 0;
1419
1420free_wlan_irq:
1421 gpio_free(DA850_WLAN_IRQ);
1422
1423free_wlan_en:
1424 gpio_free(DA850_WLAN_EN);
1425
1426exit:
1427 return ret;
1428}
1429
1430#else /* CONFIG_DA850_WL12XX */
1431
1432static __init int da850_wl12xx_init(void)
1433{
1434 return 0;
1435}
1436
1437#endif /* CONFIG_DA850_WL12XX */
1438
8bb2c481
SN		 1439#define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000)
1440
0fbc5592
SR		 1441static __init void da850_evm_init(void)
1442{
1443 int ret;
1444
b856671e
PA		 1445 ret = da850_register_gpio();
1446 if (ret)
1447 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
1448
a9eb1f67
SN		 1449 ret = pmic_tps65070_init();
1450 if (ret)
6c7c23cc 1451 pr_warn("%s: TPS65070 PMIC init failed: %d\n", __func__, ret);
a9eb1f67 1452
a941c503 1453 ret = da850_register_edma(da850_edma_rsv);
0fbc5592 1454 if (ret)
6c7c23cc 1455 pr_warn("%s: EDMA registration failed: %d\n", __func__, ret);
0fbc5592 1456
3821d10a 1457 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592 1458 if (ret)
6c7c23cc 1459 pr_warn("%s: I2C0 mux setup failed: %d\n", __func__, ret);
0fbc5592
SR		 1460
1461 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
1462 if (ret)
6c7c23cc 1463 pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret);
0fbc5592 1464
5a4b1315 1465
0fbc5592
SR		 1466 ret = da8xx_register_watchdog();
1467 if (ret)
6c7c23cc
RT		 1468 pr_warn("%s: watchdog registration failed: %d\n",
1469 __func__, ret);
0fbc5592 1470
820c4fe3 1471 if (HAS_MMC) {
5a0d80ea 1472 ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
820c4fe3 1473 if (ret)
6c7c23cc
RT		 1474 pr_warn("%s: MMCSD0 mux setup failed: %d\n",
1475 __func__, ret);
820c4fe3
SR		 1476
1477 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
1478 if (ret)
6c7c23cc
RT		 1479 pr_warn("%s: can not open GPIO %d\n",
1480 __func__, DA850_MMCSD_CD_PIN);
820c4fe3
SR		 1481 gpio_direction_input(DA850_MMCSD_CD_PIN);
1482
1483 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
1484 if (ret)
6c7c23cc
RT		 1485 pr_warn("%s: can not open GPIO %d\n",
1486 __func__, DA850_MMCSD_WP_PIN);
820c4fe3
SR		 1487 gpio_direction_input(DA850_MMCSD_WP_PIN);
1488
1489 ret = da8xx_register_mmcsd0(&da850_mmc_config);
1490 if (ret)
6c7c23cc
RT		 1491 pr_warn("%s: MMCSD0 registration failed: %d\n",
1492 __func__, ret);
ab3f5c1f
IY		 1493
1494 ret = da850_wl12xx_init();
1495 if (ret)
6c7c23cc
RT		 1496 pr_warn("%s: WL12xx initialization failed: %d\n",
1497 __func__, ret);
820c4fe3 1498 }
700691f2 1499
fcf7157b 1500 davinci_serial_init(da8xx_serial_device);
0fbc5592 1501
1a7ff8ff
C		 1502 i2c_register_board_info(1, da850_evm_i2c_devices,
1503 ARRAY_SIZE(da850_evm_i2c_devices));
1504
0fbc5592
SR		 1505 /*
1506 * shut down uart 0 and 1; they are not used on the board and
1507 * accessing them causes endless "too much work in irq53" messages
1508 * with arago fs
1509 */
1510 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1511 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 1512
c840fc74 1513 ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
491214e1 1514 if (ret)
6c7c23cc 1515 pr_warn("%s: McASP mux setup failed: %d\n", __func__, ret);
491214e1 1516
88abfd5b 1517 da850_evm_snd_data.sram_pool = sram_get_gen_pool();
b8864aa4 1518 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 1519
3821d10a 1520 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276 1521 if (ret)
6c7c23cc 1522 pr_warn("%s: LCDC mux setup failed: %d\n", __func__, ret);
5cbdf276 1523
ae41d17a
MP		 1524 ret = da8xx_register_uio_pruss();
1525 if (ret)
1526 pr_warn("da850_evm_init: pruss initialization failed: %d\n",
1527 ret);
1528
7761ef67 1529 /* Handle board specific muxing for LCD here */
3821d10a 1530 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67 1531 if (ret)
6c7c23cc
RT		 1532 pr_warn("%s: EVM specific LCD mux setup failed: %d\n",
1533 __func__, ret);
7761ef67 1534
5cbdf276
SR		 1535 ret = da850_lcd_hw_init();
1536 if (ret)
6c7c23cc 1537 pr_warn("%s: LCD initialization failed: %d\n", __func__, ret);
5cbdf276 1538
d52f235f 1539 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 1540 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276 1541 if (ret)
6c7c23cc 1542 pr_warn("%s: LCDC registration failed: %d\n", __func__, ret);
c51df70b
MG		 1543
1544 ret = da8xx_register_rtc();
1545 if (ret)
6c7c23cc 1546 pr_warn("%s: RTC setup failed: %d\n", __func__, ret);
09dc2d45 1547
28bd2c34 1548 ret = da850_evm_init_cpufreq();
09dc2d45 1549 if (ret)
6c7c23cc 1550 pr_warn("%s: cpufreq registration failed: %d\n", __func__, ret);
5aeb15aa
SN		 1551
1552 ret = da8xx_register_cpuidle();
1553 if (ret)
6c7c23cc 1554 pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret);
63534443
SN		 1555
1556 ret = da850_register_pm(&da850_pm_device);
1557 if (ret)
6c7c23cc 1558 pr_warn("%s: suspend registration failed: %d\n", __func__, ret);
fdce5568 1559
1e046d17
MH		 1560 da850_vpif_init();
1561
0273612c
VD		 1562 ret = spi_register_board_info(da850evm_spi_info,
1563 ARRAY_SIZE(da850evm_spi_info));
1564 if (ret)
1565 pr_warn("%s: spi info registration failed: %d\n", __func__,
1566 ret);
1567
1568 ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info));
fdce5568 1569 if (ret)
6c7c23cc 1570 pr_warn("%s: SPI 1 registration failed: %d\n", __func__, ret);
8bb2c481
SN		 1571
1572 ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE);
1573 if (ret)
6c7c23cc 1574 pr_warn("%s: SATA registration failed: %d\n", __func__, ret);
810198bc
RS		 1575
1576 da850_evm_setup_mac_addr();
54288134
RT		 1577
1578 ret = da8xx_register_rproc();
1579 if (ret)
1580 pr_warn("%s: dsp/rproc registration failed: %d\n",
1581 __func__, ret);
0fbc5592
SR		 1582}
1583
1584#ifdef CONFIG_SERIAL_8250_CONSOLE
1585static int __init da850_evm_console_init(void)
1586{
1aa5f2a9
MW		 1587 if (!machine_is_davinci_da850_evm())
1588 return 0;
1589
0fbc5592
SR		 1590 return add_preferred_console("ttyS", 2, "115200");
1591}
1592console_initcall(da850_evm_console_init);
1593#endif
1594
0fbc5592
SR		 1595static void __init da850_evm_map_io(void)
1596{
1597 da850_init();
1598}
1599
48ea89ea 1600MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
e7e56014 1601 .atag_offset = 0x100,
0fbc5592 1602 .map_io = da850_evm_map_io,
bd808947 1603 .init_irq = cp_intc_init,
6bb27d73 1604 .init_time = davinci_timer_init,
0fbc5592 1605 .init_machine = da850_evm_init,
3aa3e840 1606 .init_late = davinci_init_late,
f68deabf 1607 .dma_zone_size = SZ_128M,
c6121ddd 1608 .restart = da8xx_restart,
54288134 1609 .reserve = da8xx_rproc_reserve_cma,
0fbc5592 1610MACHINE_END
Linux kernel - Deliverables
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