[deliverable/linux.git] / arch / arm / mach-davinci / board-da850-evm.c

/*
 * TI DA850/OMAP-L138 EVM board
 *
 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
 * Original Copyrights follow:
 *
 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/pca953x.h>
#include <linux/mfd/tps6507x.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/regulator/machine.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <mach/cp_intc.h>
#include <mach/da8xx.h>
#include <mach/nand.h>
#include <mach/mux.h>

#define DA850_EVM_PHY_MASK		0x1
#define DA850_EVM_MDIO_FREQUENCY	2200000 /* PHY bus frequency */

#define DA850_LCD_PWR_PIN		GPIO_TO_PIN(2, 8)
#define DA850_LCD_BL_PIN		GPIO_TO_PIN(2, 15)

#define DA850_MMCSD_CD_PIN		GPIO_TO_PIN(4, 0)
#define DA850_MMCSD_WP_PIN		GPIO_TO_PIN(4, 1)

#define DA850_MII_MDIO_CLKEN_PIN	GPIO_TO_PIN(2, 6)

static struct mtd_partition da850_evm_norflash_partition[] = {
	{
		.name           = "bootloaders + env",
		.offset         = 0,
		.size           = SZ_512K,
		.mask_flags     = MTD_WRITEABLE,
	},
	{
		.name           = "kernel",
		.offset         = MTDPART_OFS_APPEND,
		.size           = SZ_2M,
		.mask_flags     = 0,
	},
	{
		.name           = "filesystem",
		.offset         = MTDPART_OFS_APPEND,
		.size           = MTDPART_SIZ_FULL,
		.mask_flags     = 0,
	},
};

static struct physmap_flash_data da850_evm_norflash_data = {
	.width		= 2,
	.parts		= da850_evm_norflash_partition,
	.nr_parts	= ARRAY_SIZE(da850_evm_norflash_partition),
};

static struct resource da850_evm_norflash_resource[] = {
	{
		.start	= DA8XX_AEMIF_CS2_BASE,
		.end	= DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da850_evm_norflash_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data  = &da850_evm_norflash_data,
	},
	.num_resources	= 1,
	.resource	= da850_evm_norflash_resource,
};

static struct davinci_pm_config da850_pm_pdata = {
	.sleepcount = 128,
};

static struct platform_device da850_pm_device = {
	.name           = "pm-davinci",
	.dev = {
		.platform_data	= &da850_pm_pdata,
	},
	.id             = -1,
};

/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
 * (128K blocks). It may be used instead of the (default) SPI flash
 * to boot, using TI's tools to install the secondary boot loader
 * (UBL) and U-Boot.
 */
struct mtd_partition da850_evm_nandflash_partition[] = {
	{
		.name		= "u-boot env",
		.offset		= 0,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	 },
	{
		.name		= "UBL",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	},
	{
		.name		= "u-boot",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 4 * SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	},
	{
		.name		= "kernel",
		.offset		= 0x200000,
		.size		= SZ_2M,
		.mask_flags	= 0,
	},
	{
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	},
};

static struct davinci_nand_pdata da850_evm_nandflash_data = {
	.parts		= da850_evm_nandflash_partition,
	.nr_parts	= ARRAY_SIZE(da850_evm_nandflash_partition),
	.ecc_mode	= NAND_ECC_HW,
	.ecc_bits	= 4,
	.options	= NAND_USE_FLASH_BBT,
};

static struct resource da850_evm_nandflash_resource[] = {
	{
		.start	= DA8XX_AEMIF_CS3_BASE,
		.end	= DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= DA8XX_AEMIF_CTL_BASE,
		.end	= DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da850_evm_nandflash_device = {
	.name		= "davinci_nand",
	.id		= 1,
	.dev		= {
		.platform_data	= &da850_evm_nandflash_data,
	},
	.num_resources	= ARRAY_SIZE(da850_evm_nandflash_resource),
	.resource	= da850_evm_nandflash_resource,
};

static struct platform_device *da850_evm_devices[] __initdata = {
	&da850_evm_nandflash_device,
	&da850_evm_norflash_device,
};

#define DA8XX_AEMIF_CE2CFG_OFFSET	0x10
#define DA8XX_AEMIF_ASIZE_16BIT		0x1

static void __init da850_evm_init_nor(void)
{
	void __iomem *aemif_addr;

	aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);

	/* Configure data bus width of CS2 to 16 bit */
	writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
		DA8XX_AEMIF_ASIZE_16BIT,
		aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);

	iounmap(aemif_addr);
}

static u32 ui_card_detected;

#if defined(CONFIG_MMC_DAVINCI) || \
    defined(CONFIG_MMC_DAVINCI_MODULE)
#define HAS_MMC 1
#else
#define HAS_MMC 0
#endif

static __init void da850_evm_setup_nor_nand(void)
{
	int ret = 0;

	if (ui_card_detected & !HAS_MMC) {
		ret = davinci_cfg_reg_list(da850_nand_pins);
		if (ret)
			pr_warning("da850_evm_init: nand mux setup failed: "
					"%d\n", ret);

		ret = davinci_cfg_reg_list(da850_nor_pins);
		if (ret)
			pr_warning("da850_evm_init: nor mux setup failed: %d\n",
				ret);

		da850_evm_init_nor();

		platform_add_devices(da850_evm_devices,
					ARRAY_SIZE(da850_evm_devices));
	}
}

#ifdef CONFIG_DA850_UI_RMII
static inline void da850_evm_setup_emac_rmii(int rmii_sel)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	soc_info->emac_pdata->rmii_en = 1;
	gpio_set_value(rmii_sel, 0);
}
#else
static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
#endif

static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
						unsigned ngpio, void *c)
{
	int sel_a, sel_b, sel_c, ret;

	sel_a = gpio + 7;
	sel_b = gpio + 6;
	sel_c = gpio + 5;

	ret = gpio_request(sel_a, "sel_a");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_a);
		goto exp_setup_sela_fail;
	}

	ret = gpio_request(sel_b, "sel_b");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_b);
		goto exp_setup_selb_fail;
	}

	ret = gpio_request(sel_c, "sel_c");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_c);
		goto exp_setup_selc_fail;
	}

	/* deselect all functionalities */
	gpio_direction_output(sel_a, 1);
	gpio_direction_output(sel_b, 1);
	gpio_direction_output(sel_c, 1);

	ui_card_detected = 1;
	pr_info("DA850/OMAP-L138 EVM UI card detected\n");

	da850_evm_setup_nor_nand();

	da850_evm_setup_emac_rmii(sel_a);

	return 0;

exp_setup_selc_fail:
	gpio_free(sel_b);
exp_setup_selb_fail:
	gpio_free(sel_a);
exp_setup_sela_fail:
	return ret;
}

static int da850_evm_ui_expander_teardown(struct i2c_client *client,
					unsigned gpio, unsigned ngpio, void *c)
{
	/* deselect all functionalities */
	gpio_set_value(gpio + 5, 1);
	gpio_set_value(gpio + 6, 1);
	gpio_set_value(gpio + 7, 1);

	gpio_free(gpio + 5);
	gpio_free(gpio + 6);
	gpio_free(gpio + 7);

	return 0;
}

static struct pca953x_platform_data da850_evm_ui_expander_info = {
	.gpio_base	= DAVINCI_N_GPIO,
	.setup		= da850_evm_ui_expander_setup,
	.teardown	= da850_evm_ui_expander_teardown,
};

static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
	{
		I2C_BOARD_INFO("tlv320aic3x", 0x18),
	},
	{
		I2C_BOARD_INFO("tca6416", 0x20),
		.platform_data = &da850_evm_ui_expander_info,
	},
};

static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
	.bus_freq	= 100,	/* kHz */
	.bus_delay	= 0,	/* usec */
};

static struct davinci_uart_config da850_evm_uart_config __initdata = {
	.enabled_uarts = 0x7,
};

/* davinci da850 evm audio machine driver */
static u8 da850_iis_serializer_direction[] = {
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	TX_MODE,
	RX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
};

static struct snd_platform_data da850_evm_snd_data = {
	.tx_dma_offset	= 0x2000,
	.rx_dma_offset	= 0x2000,
	.op_mode	= DAVINCI_MCASP_IIS_MODE,
	.num_serializer	= ARRAY_SIZE(da850_iis_serializer_direction),
	.tdm_slots	= 2,
	.serial_dir	= da850_iis_serializer_direction,
	.eventq_no	= EVENTQ_1,
	.version	= MCASP_VERSION_2,
	.txnumevt	= 1,
	.rxnumevt	= 1,
};

static int da850_evm_mmc_get_ro(int index)
{
	return gpio_get_value(DA850_MMCSD_WP_PIN);
}

static int da850_evm_mmc_get_cd(int index)
{
	return !gpio_get_value(DA850_MMCSD_CD_PIN);
}

static struct davinci_mmc_config da850_mmc_config = {
	.get_ro		= da850_evm_mmc_get_ro,
	.get_cd		= da850_evm_mmc_get_cd,
	.wires		= 4,
	.max_freq	= 50000000,
	.caps		= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
	.version	= MMC_CTLR_VERSION_2,
};

static void da850_panel_power_ctrl(int val)
{
	/* lcd backlight */
	gpio_set_value(DA850_LCD_BL_PIN, val);

	/* lcd power */
	gpio_set_value(DA850_LCD_PWR_PIN, val);
}

static int da850_lcd_hw_init(void)
{
	int status;

	status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
	if (status < 0)
		return status;

	status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
	if (status < 0) {
		gpio_free(DA850_LCD_BL_PIN);
		return status;
	}

	gpio_direction_output(DA850_LCD_BL_PIN, 0);
	gpio_direction_output(DA850_LCD_PWR_PIN, 0);

	/* Switch off panel power and backlight */
	da850_panel_power_ctrl(0);

	/* Switch on panel power and backlight */
	da850_panel_power_ctrl(1);

	return 0;
}

/* TPS65070 voltage regulator support */

/* 3.3V */
struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
	{
		.supply = "usb0_vdda33",
	},
	{
		.supply = "usb1_vdda33",
	},
};

/* 3.3V or 1.8V */
struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
	{
		.supply = "dvdd3318_a",
	},
	{
		.supply = "dvdd3318_b",
	},
	{
		.supply = "dvdd3318_c",
	},
};

/* 1.2V */
struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
	{
		.supply = "cvdd",
	},
};

/* 1.8V LDO */
struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
	{
		.supply = "sata_vddr",
	},
	{
		.supply = "usb0_vdda18",
	},
	{
		.supply = "usb1_vdda18",
	},
	{
		.supply = "ddr_dvdd18",
	},
};

/* 1.2V LDO */
struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
	{
		.supply = "sata_vdd",
	},
	{
		.supply = "pll0_vdda",
	},
	{
		.supply = "pll1_vdda",
	},
	{
		.supply = "usbs_cvdd",
	},
	{
		.supply = "vddarnwa1",
	},
};

struct regulator_init_data tps65070_regulator_data[] = {
	/* dcdc1 */
	{
		.constraints = {
			.min_uV = 3150000,
			.max_uV = 3450000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
		.consumer_supplies = tps65070_dcdc1_consumers,
	},

	/* dcdc2 */
	{
		.constraints = {
			.min_uV = 1710000,
			.max_uV = 3450000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
		.consumer_supplies = tps65070_dcdc2_consumers,
	},

	/* dcdc3 */
	{
		.constraints = {
			.min_uV = 950000,
			.max_uV = 1320000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
		.consumer_supplies = tps65070_dcdc3_consumers,
	},

	/* ldo1 */
	{
		.constraints = {
			.min_uV = 1710000,
			.max_uV = 1890000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
		.consumer_supplies = tps65070_ldo1_consumers,
	},

	/* ldo2 */
	{
		.constraints = {
			.min_uV = 1140000,
			.max_uV = 1320000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
		.consumer_supplies = tps65070_ldo2_consumers,
	},
};

static struct tps6507x_board tps_board = {
	.tps6507x_pmic_init_data = &tps65070_regulator_data[0],
};

static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
	{
		I2C_BOARD_INFO("tps6507x", 0x48),
		.platform_data = &tps_board,
	},
};

static int __init pmic_tps65070_init(void)
{
	return i2c_register_board_info(1, da850evm_tps65070_info,
					ARRAY_SIZE(da850evm_tps65070_info));
}

static const short da850_evm_lcdc_pins[] = {
	DA850_GPIO2_8, DA850_GPIO2_15,
	-1
};

static int __init da850_evm_config_emac(void)
{
	void __iomem *cfg_chip3_base;
	int ret;
	u32 val;
	struct davinci_soc_info *soc_info = &davinci_soc_info;
	u8 rmii_en = soc_info->emac_pdata->rmii_en;

	if (!machine_is_davinci_da850_evm())
		return 0;

	cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);

	val = __raw_readl(cfg_chip3_base);

	if (rmii_en) {
		val |= BIT(8);
		ret = davinci_cfg_reg_list(da850_rmii_pins);
		pr_info("EMAC: RMII PHY configured, MII PHY will not be"
							" functional\n");
	} else {
		val &= ~BIT(8);
		ret = davinci_cfg_reg_list(da850_cpgmac_pins);
		pr_info("EMAC: MII PHY configured, RMII PHY will not be"
							" functional\n");
	}

	if (ret)
		pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
				ret);

	/* configure the CFGCHIP3 register for RMII or MII */
	__raw_writel(val, cfg_chip3_base);

	ret = davinci_cfg_reg(DA850_GPIO2_6);
	if (ret)
		pr_warning("da850_evm_init:GPIO(2,6) mux setup "
							"failed\n");

	ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
	if (ret) {
		pr_warning("Cannot open GPIO %d\n",
					DA850_MII_MDIO_CLKEN_PIN);
		return ret;
	}

	/* Enable/Disable MII MDIO clock */
	gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);

	soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
	soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;

	ret = da8xx_register_emac();
	if (ret)
		pr_warning("da850_evm_init: emac registration failed: %d\n",
				ret);

	return 0;
}
device_initcall(da850_evm_config_emac);

static __init void da850_evm_init(void)
{
	int ret;

	ret = pmic_tps65070_init();
	if (ret)
		pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
				ret);

	ret = da8xx_register_edma();
	if (ret)
		pr_warning("da850_evm_init: edma registration failed: %d\n",
				ret);

	ret = davinci_cfg_reg_list(da850_i2c0_pins);
	if (ret)
		pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
				ret);

	ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
	if (ret)
		pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
				ret);


	ret = da8xx_register_watchdog();
	if (ret)
		pr_warning("da830_evm_init: watchdog registration failed: %d\n",
				ret);

	if (HAS_MMC) {
		ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
		if (ret)
			pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
					" %d\n", ret);

		ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
		if (ret)
			pr_warning("da850_evm_init: can not open GPIO %d\n",
					DA850_MMCSD_CD_PIN);
		gpio_direction_input(DA850_MMCSD_CD_PIN);

		ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
		if (ret)
			pr_warning("da850_evm_init: can not open GPIO %d\n",
					DA850_MMCSD_WP_PIN);
		gpio_direction_input(DA850_MMCSD_WP_PIN);

		ret = da8xx_register_mmcsd0(&da850_mmc_config);
		if (ret)
			pr_warning("da850_evm_init: mmcsd0 registration failed:"
					" %d\n", ret);
	}

	davinci_serial_init(&da850_evm_uart_config);

	i2c_register_board_info(1, da850_evm_i2c_devices,
			ARRAY_SIZE(da850_evm_i2c_devices));

	/*
	 * shut down uart 0 and 1; they are not used on the board and
	 * accessing them causes endless "too much work in irq53" messages
	 * with arago fs
	 */
	__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
	__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);

	ret = davinci_cfg_reg_list(da850_mcasp_pins);
	if (ret)
		pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
				ret);

	da8xx_register_mcasp(0, &da850_evm_snd_data);

	ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
	if (ret)
		pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
				ret);

	/* Handle board specific muxing for LCD here */
	ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
	if (ret)
		pr_warning("da850_evm_init: evm specific lcd mux setup "
				"failed: %d\n",	ret);

	ret = da850_lcd_hw_init();
	if (ret)
		pr_warning("da850_evm_init: lcd initialization failed: %d\n",
				ret);

	sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
	ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
	if (ret)
		pr_warning("da850_evm_init: lcdc registration failed: %d\n",
				ret);

	ret = da8xx_register_rtc();
	if (ret)
		pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);

	ret = da850_register_cpufreq();
	if (ret)
		pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
				ret);

	ret = da8xx_register_cpuidle();
	if (ret)
		pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
				ret);

	ret = da850_register_pm(&da850_pm_device);
	if (ret)
		pr_warning("da850_evm_init: suspend registration failed: %d\n",
				ret);
}

#ifdef CONFIG_SERIAL_8250_CONSOLE
static int __init da850_evm_console_init(void)
{
	return add_preferred_console("ttyS", 2, "115200");
}
console_initcall(da850_evm_console_init);
#endif

static void __init da850_evm_map_io(void)
{
	da850_init();
}

MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
	.phys_io	= IO_PHYS,
	.io_pg_offst	= (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	.boot_params	= (DA8XX_DDR_BASE + 0x100),
	.map_io		= da850_evm_map_io,
	.init_irq	= cp_intc_init,
	.timer		= &davinci_timer,
	.init_machine	= da850_evm_init,
MACHINE_END
Commit	Line	Data
0fbc5592 SR	1	/*
	2	* TI DA850/OMAP-L138 EVM board
	3	*
	4	* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* Derived from: arch/arm/mach-davinci/board-da830-evm.c
	7	* Original Copyrights follow:
	8	*
	9	* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
	10	* the terms of the GNU General Public License version 2. This program
	11	* is licensed "as is" without any warranty of any kind, whether express
	12	* or implied.
	13	*/
	14	#include <linux/kernel.h>
0fbc5592 SR	15	#include <linux/init.h>
	16	#include <linux/console.h>
	17	#include <linux/i2c.h>
	18	#include <linux/i2c/at24.h>
75e2ea64	19	#include <linux/i2c/pca953x.h>
0bc20bba	20	#include <linux/mfd/tps6507x.h>
5cbdf276	21	#include <linux/gpio.h>
38beb929 SR	22	#include <linux/platform_device.h>
	23	#include <linux/mtd/mtd.h>
	24	#include <linux/mtd/nand.h>
	25	#include <linux/mtd/partitions.h>
7c5ec609	26	#include <linux/mtd/physmap.h>
a9eb1f67	27	#include <linux/regulator/machine.h>
0fbc5592 SR	28
	29	#include <asm/mach-types.h>
	30	#include <asm/mach/arch.h>
	31
0fbc5592 SR	32	#include <mach/cp_intc.h>
0fbc5592 SR	33	#include <mach/da8xx.h>
38beb929	34	#include <mach/nand.h>
7761ef67	35	#include <mach/mux.h>
0fbc5592	36
5a4b1315 SR	37	#define DA850_EVM_PHY_MASK 0x1
	38	#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
	39
7761ef67	40	#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276	41	#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276	42
700691f2 SR	43	#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
	44	#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
	45
2206771c C	46	#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
2206771c C	47
7c5ec609 SR	48	static struct mtd_partition da850_evm_norflash_partition[] = {
7c5ec609 SR	49	{
e2abd5a2	50	.name = "bootloaders + env",
7c5ec609	51	.offset = 0,
e2abd5a2 SR	52	.size = SZ_512K,
	53	.mask_flags = MTD_WRITEABLE,
	54	},
	55	{
	56	.name = "kernel",
	57	.offset = MTDPART_OFS_APPEND,
	58	.size = SZ_2M,
	59	.mask_flags = 0,
	60	},
	61	{
	62	.name = "filesystem",
	63	.offset = MTDPART_OFS_APPEND,
7c5ec609 SR	64	.size = MTDPART_SIZ_FULL,
	65	.mask_flags = 0,
	66	},
	67	};
	68
	69	static struct physmap_flash_data da850_evm_norflash_data = {
	70	.width = 2,
	71	.parts = da850_evm_norflash_partition,
	72	.nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
	73	};
	74
	75	static struct resource da850_evm_norflash_resource[] = {
	76	{
	77	.start = DA8XX_AEMIF_CS2_BASE,
	78	.end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
	79	.flags = IORESOURCE_MEM,
	80	},
	81	};
	82
	83	static struct platform_device da850_evm_norflash_device = {
	84	.name = "physmap-flash",
	85	.id = 0,
	86	.dev = {
	87	.platform_data = &da850_evm_norflash_data,
	88	},
	89	.num_resources = 1,
	90	.resource = da850_evm_norflash_resource,
	91	};
	92
63534443 SN	93	static struct davinci_pm_config da850_pm_pdata = {
	94	.sleepcount = 128,
	95	};
	96
	97	static struct platform_device da850_pm_device = {
	98	.name = "pm-davinci",
	99	.dev = {
	100	.platform_data = &da850_pm_pdata,
	101	},
	102	.id = -1,
	103	};
	104
38beb929 SR	105	/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
	106	* (128K blocks). It may be used instead of the (default) SPI flash
	107	* to boot, using TI's tools to install the secondary boot loader
	108	* (UBL) and U-Boot.
	109	*/
	110	struct mtd_partition da850_evm_nandflash_partition[] = {
	111	{
	112	.name = "u-boot env",
	113	.offset = 0,
	114	.size = SZ_128K,
	115	.mask_flags = MTD_WRITEABLE,
	116	},
	117	{
	118	.name = "UBL",
	119	.offset = MTDPART_OFS_APPEND,
	120	.size = SZ_128K,
	121	.mask_flags = MTD_WRITEABLE,
	122	},
	123	{
	124	.name = "u-boot",
	125	.offset = MTDPART_OFS_APPEND,
	126	.size = 4 * SZ_128K,
	127	.mask_flags = MTD_WRITEABLE,
	128	},
	129	{
	130	.name = "kernel",
	131	.offset = 0x200000,
	132	.size = SZ_2M,
	133	.mask_flags = 0,
	134	},
	135	{
	136	.name = "filesystem",
	137	.offset = MTDPART_OFS_APPEND,
	138	.size = MTDPART_SIZ_FULL,
	139	.mask_flags = 0,
	140	},
	141	};
	142
	143	static struct davinci_nand_pdata da850_evm_nandflash_data = {
	144	.parts = da850_evm_nandflash_partition,
	145	.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
	146	.ecc_mode = NAND_ECC_HW,
fc42e335	147	.ecc_bits = 4,
38beb929 SR	148	.options = NAND_USE_FLASH_BBT,
	149	};
	150
	151	static struct resource da850_evm_nandflash_resource[] = {
	152	{
	153	.start = DA8XX_AEMIF_CS3_BASE,
	154	.end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
	155	.flags = IORESOURCE_MEM,
	156	},
	157	{
	158	.start = DA8XX_AEMIF_CTL_BASE,
	159	.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
	160	.flags = IORESOURCE_MEM,
	161	},
	162	};
	163
	164	static struct platform_device da850_evm_nandflash_device = {
	165	.name = "davinci_nand",
	166	.id = 1,
	167	.dev = {
	168	.platform_data = &da850_evm_nandflash_data,
	169	},
	170	.num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
	171	.resource = da850_evm_nandflash_resource,
	172	};
	173
039c5ee3 SR	174	static struct platform_device *da850_evm_devices[] __initdata = {
	175	&da850_evm_nandflash_device,
	176	&da850_evm_norflash_device,
	177	};
	178
	179	#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
	180	#define DA8XX_AEMIF_ASIZE_16BIT 0x1
	181
	182	static void __init da850_evm_init_nor(void)
	183	{
	184	void __iomem *aemif_addr;
	185
	186	aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
	187
	188	/* Configure data bus width of CS2 to 16 bit */
	189	writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) \|
	190	DA8XX_AEMIF_ASIZE_16BIT,
	191	aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
	192
	193	iounmap(aemif_addr);
	194	}
	195
75e2ea64	196	static u32 ui_card_detected;
039c5ee3 SR	197
	198	#if defined(CONFIG_MMC_DAVINCI) \|\| \
	199	defined(CONFIG_MMC_DAVINCI_MODULE)
	200	#define HAS_MMC 1
	201	#else
	202	#define HAS_MMC 0
	203	#endif
	204
1ef203c3	205	static __init void da850_evm_setup_nor_nand(void)
039c5ee3 SR	206	{
	207	int ret = 0;
	208
	209	if (ui_card_detected & !HAS_MMC) {
3821d10a	210	ret = davinci_cfg_reg_list(da850_nand_pins);
039c5ee3 SR	211	if (ret)
	212	pr_warning("da850_evm_init: nand mux setup failed: "
	213	"%d\n", ret);
	214
3821d10a	215	ret = davinci_cfg_reg_list(da850_nor_pins);
039c5ee3 SR	216	if (ret)
	217	pr_warning("da850_evm_init: nor mux setup failed: %d\n",
	218	ret);
	219
	220	da850_evm_init_nor();
	221
	222	platform_add_devices(da850_evm_devices,
	223	ARRAY_SIZE(da850_evm_devices));
	224	}
	225	}
75e2ea64	226
bae10587 SN	227	#ifdef CONFIG_DA850_UI_RMII
	228	static inline void da850_evm_setup_emac_rmii(int rmii_sel)
	229	{
	230	struct davinci_soc_info *soc_info = &davinci_soc_info;
	231
	232	soc_info->emac_pdata->rmii_en = 1;
	233	gpio_set_value(rmii_sel, 0);
	234	}
	235	#else
	236	static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
	237	#endif
	238
75e2ea64 C	239	static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
	240	unsigned ngpio, void *c)
	241	{
	242	int sel_a, sel_b, sel_c, ret;
	243
	244	sel_a = gpio + 7;
	245	sel_b = gpio + 6;
	246	sel_c = gpio + 5;
	247
	248	ret = gpio_request(sel_a, "sel_a");
	249	if (ret) {
	250	pr_warning("Cannot open UI expander pin %d\n", sel_a);
	251	goto exp_setup_sela_fail;
	252	}
	253
	254	ret = gpio_request(sel_b, "sel_b");
	255	if (ret) {
	256	pr_warning("Cannot open UI expander pin %d\n", sel_b);
	257	goto exp_setup_selb_fail;
	258	}
	259
	260	ret = gpio_request(sel_c, "sel_c");
	261	if (ret) {
	262	pr_warning("Cannot open UI expander pin %d\n", sel_c);
	263	goto exp_setup_selc_fail;
	264	}
	265
	266	/* deselect all functionalities */
	267	gpio_direction_output(sel_a, 1);
	268	gpio_direction_output(sel_b, 1);
	269	gpio_direction_output(sel_c, 1);
	270
	271	ui_card_detected = 1;
	272	pr_info("DA850/OMAP-L138 EVM UI card detected\n");
	273
	274	da850_evm_setup_nor_nand();
	275
bae10587	276	da850_evm_setup_emac_rmii(sel_a);
2206771c	277
75e2ea64 C	278	return 0;
	279
	280	exp_setup_selc_fail:
	281	gpio_free(sel_b);
	282	exp_setup_selb_fail:
	283	gpio_free(sel_a);
	284	exp_setup_sela_fail:
	285	return ret;
	286	}
	287
	288	static int da850_evm_ui_expander_teardown(struct i2c_client *client,
	289	unsigned gpio, unsigned ngpio, void *c)
	290	{
	291	/* deselect all functionalities */
	292	gpio_set_value(gpio + 5, 1);
	293	gpio_set_value(gpio + 6, 1);
	294	gpio_set_value(gpio + 7, 1);
	295
	296	gpio_free(gpio + 5);
	297	gpio_free(gpio + 6);
	298	gpio_free(gpio + 7);
	299
	300	return 0;
	301	}
	302
	303	static struct pca953x_platform_data da850_evm_ui_expander_info = {
	304	.gpio_base = DAVINCI_N_GPIO,
	305	.setup = da850_evm_ui_expander_setup,
	306	.teardown = da850_evm_ui_expander_teardown,
	307	};
	308
1a7ff8ff C	309	static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
	310	{
	311	I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64 C	312	},
	313	{
	314	I2C_BOARD_INFO("tca6416", 0x20),
	315	.platform_data = &da850_evm_ui_expander_info,
	316	},
1a7ff8ff C	317	};
1a7ff8ff C	318
0fbc5592 SR	319	static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
	320	.bus_freq = 100, /* kHz */
	321	.bus_delay = 0, /* usec */
	322	};
	323
	324	static struct davinci_uart_config da850_evm_uart_config __initdata = {
	325	.enabled_uarts = 0x7,
	326	};
	327
491214e1 C	328	/* davinci da850 evm audio machine driver */
	329	static u8 da850_iis_serializer_direction[] = {
	330	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	331	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	332	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
	333	RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	334	};
	335
	336	static struct snd_platform_data da850_evm_snd_data = {
	337	.tx_dma_offset = 0x2000,
	338	.rx_dma_offset = 0x2000,
	339	.op_mode = DAVINCI_MCASP_IIS_MODE,
	340	.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
	341	.tdm_slots = 2,
	342	.serial_dir = da850_iis_serializer_direction,
	343	.eventq_no = EVENTQ_1,
	344	.version = MCASP_VERSION_2,
	345	.txnumevt = 1,
	346	.rxnumevt = 1,
	347	};
	348
700691f2 SR	349	static int da850_evm_mmc_get_ro(int index)
	350	{
	351	return gpio_get_value(DA850_MMCSD_WP_PIN);
	352	}
	353
	354	static int da850_evm_mmc_get_cd(int index)
	355	{
	356	return !gpio_get_value(DA850_MMCSD_CD_PIN);
	357	}
	358
	359	static struct davinci_mmc_config da850_mmc_config = {
	360	.get_ro = da850_evm_mmc_get_ro,
	361	.get_cd = da850_evm_mmc_get_cd,
	362	.wires = 4,
0046d0bf C	363	.max_freq = 50000000,
0046d0bf C	364	.caps = MMC_CAP_MMC_HIGHSPEED \| MMC_CAP_SD_HIGHSPEED,
700691f2 SR	365	.version = MMC_CTLR_VERSION_2,
	366	};
	367
d52f235f C	368	static void da850_panel_power_ctrl(int val)
	369	{
	370	/* lcd backlight */
	371	gpio_set_value(DA850_LCD_BL_PIN, val);
	372
	373	/* lcd power */
	374	gpio_set_value(DA850_LCD_PWR_PIN, val);
	375	}
	376
5cbdf276 SR	377	static int da850_lcd_hw_init(void)
	378	{
	379	int status;
	380
	381	status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
	382	if (status < 0)
	383	return status;
	384
	385	status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
	386	if (status < 0) {
	387	gpio_free(DA850_LCD_BL_PIN);
	388	return status;
	389	}
	390
	391	gpio_direction_output(DA850_LCD_BL_PIN, 0);
	392	gpio_direction_output(DA850_LCD_PWR_PIN, 0);
	393
d52f235f C	394	/* Switch off panel power and backlight */
d52f235f C	395	da850_panel_power_ctrl(0);
5cbdf276	396
d52f235f C	397	/* Switch on panel power and backlight */
d52f235f C	398	da850_panel_power_ctrl(1);
5cbdf276 SR	399
	400	return 0;
	401	}
491214e1	402
a9eb1f67 SN	403	/* TPS65070 voltage regulator support */
	404
	405	/* 3.3V */
	406	struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
	407	{
	408	.supply = "usb0_vdda33",
	409	},
	410	{
	411	.supply = "usb1_vdda33",
	412	},
	413	};
	414
	415	/* 3.3V or 1.8V */
	416	struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
	417	{
	418	.supply = "dvdd3318_a",
	419	},
	420	{
	421	.supply = "dvdd3318_b",
	422	},
	423	{
	424	.supply = "dvdd3318_c",
	425	},
	426	};
	427
	428	/* 1.2V */
	429	struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
	430	{
	431	.supply = "cvdd",
	432	},
	433	};
	434
	435	/* 1.8V LDO */
	436	struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
	437	{
	438	.supply = "sata_vddr",
	439	},
	440	{
	441	.supply = "usb0_vdda18",
	442	},
	443	{
	444	.supply = "usb1_vdda18",
	445	},
	446	{
	447	.supply = "ddr_dvdd18",
	448	},
	449	};
	450
	451	/* 1.2V LDO */
	452	struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
	453	{
	454	.supply = "sata_vdd",
	455	},
	456	{
	457	.supply = "pll0_vdda",
	458	},
	459	{
	460	.supply = "pll1_vdda",
	461	},
	462	{
	463	.supply = "usbs_cvdd",
	464	},
	465	{
	466	.supply = "vddarnwa1",
467	},
468	};
469
470	struct regulator_init_data tps65070_regulator_data[] = {
471	/* dcdc1 */
472	{
473	.constraints = {
474	.min_uV = 3150000,
475	.max_uV = 3450000,
476	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
477	REGULATOR_CHANGE_STATUS),
478	.boot_on = 1,
479	},
480	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
481	.consumer_supplies = tps65070_dcdc1_consumers,
482	},
483
484	/* dcdc2 */
485	{
486	.constraints = {
487	.min_uV = 1710000,
488	.max_uV = 3450000,
489	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
490	REGULATOR_CHANGE_STATUS),
491	.boot_on = 1,
492	},
493	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
494	.consumer_supplies = tps65070_dcdc2_consumers,
495	},
496
497	/* dcdc3 */
498	{
499	.constraints = {
500	.min_uV = 950000,
501	.max_uV = 1320000,
502	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
503	REGULATOR_CHANGE_STATUS),
504	.boot_on = 1,
505	},
506	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
507	.consumer_supplies = tps65070_dcdc3_consumers,
508	},
509
510	/* ldo1 */
511	{
512	.constraints = {
513	.min_uV = 1710000,
514	.max_uV = 1890000,
515	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
516	REGULATOR_CHANGE_STATUS),
517	.boot_on = 1,
518	},
519	.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
520	.consumer_supplies = tps65070_ldo1_consumers,
521	},
522
523	/* ldo2 */
524	{
525	.constraints = {
526	.min_uV = 1140000,
527	.max_uV = 1320000,
528	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
529	REGULATOR_CHANGE_STATUS),
530	.boot_on = 1,
531	},
532	.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
533	.consumer_supplies = tps65070_ldo2_consumers,
534	},
535	};
536
0bc20bba TF	537	static struct tps6507x_board tps_board = {
	538	.tps6507x_pmic_init_data = &tps65070_regulator_data[0],
	539	};
	540
a9eb1f67 SN	541	static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
	542	{
	543	I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba	544	.platform_data = &tps_board,
a9eb1f67 SN	545	},
	546	};
	547
	548	static int __init pmic_tps65070_init(void)
	549	{
	550	return i2c_register_board_info(1, da850evm_tps65070_info,
	551	ARRAY_SIZE(da850evm_tps65070_info));
	552	}
	553
7761ef67 SR	554	static const short da850_evm_lcdc_pins[] = {
	555	DA850_GPIO2_8, DA850_GPIO2_15,
	556	-1
	557	};
	558
bae10587	559	static int __init da850_evm_config_emac(void)
2206771c C	560	{
	561	void __iomem *cfg_chip3_base;
	562	int ret;
	563	u32 val;
bae10587 SN	564	struct davinci_soc_info *soc_info = &davinci_soc_info;
	565	u8 rmii_en = soc_info->emac_pdata->rmii_en;
	566
	567	if (!machine_is_davinci_da850_evm())
	568	return 0;
2206771c	569
d2de0582	570	cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c	571
2206771c	572	val = __raw_readl(cfg_chip3_base);
17fadd9a SN	573
17fadd9a SN	574	if (rmii_en) {
2206771c	575	val \|= BIT(8);
3821d10a	576	ret = davinci_cfg_reg_list(da850_rmii_pins);
17fadd9a SN	577	pr_info("EMAC: RMII PHY configured, MII PHY will not be"
	578	" functional\n");
	579	} else {
2206771c	580	val &= ~BIT(8);
3821d10a	581	ret = davinci_cfg_reg_list(da850_cpgmac_pins);
17fadd9a SN	582	pr_info("EMAC: MII PHY configured, RMII PHY will not be"
	583	" functional\n");
	584	}
	585
2206771c C	586	if (ret)
	587	pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
	588	ret);
	589
17fadd9a SN	590	/* configure the CFGCHIP3 register for RMII or MII */
	591	__raw_writel(val, cfg_chip3_base);
	592
2206771c C	593	ret = davinci_cfg_reg(DA850_GPIO2_6);
	594	if (ret)
	595	pr_warning("da850_evm_init:GPIO(2,6) mux setup "
	596	"failed\n");
	597
	598	ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
	599	if (ret) {
	600	pr_warning("Cannot open GPIO %d\n",
	601	DA850_MII_MDIO_CLKEN_PIN);
	602	return ret;
	603	}
	604
17fadd9a SN	605	/* Enable/Disable MII MDIO clock */
17fadd9a SN	606	gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c	607
bae10587 SN	608	soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
	609	soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
	610
	611	ret = da8xx_register_emac();
	612	if (ret)
	613	pr_warning("da850_evm_init: emac registration failed: %d\n",
	614	ret);
	615
2206771c C	616	return 0;
2206771c C	617	}
bae10587	618	device_initcall(da850_evm_config_emac);
2206771c	619
0fbc5592 SR	620	static __init void da850_evm_init(void)
	621	{
	622	int ret;
	623
a9eb1f67 SN	624	ret = pmic_tps65070_init();
	625	if (ret)
	626	pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
	627	ret);
	628
0fbc5592 SR	629	ret = da8xx_register_edma();
	630	if (ret)
	631	pr_warning("da850_evm_init: edma registration failed: %d\n",
	632	ret);
	633
3821d10a	634	ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592 SR	635	if (ret)
	636	pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
	637	ret);
	638
	639	ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
	640	if (ret)
	641	pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
	642	ret);
	643
5a4b1315	644
0fbc5592 SR	645	ret = da8xx_register_watchdog();
	646	if (ret)
	647	pr_warning("da830_evm_init: watchdog registration failed: %d\n",
	648	ret);
	649
820c4fe3	650	if (HAS_MMC) {
3821d10a	651	ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
820c4fe3 SR	652	if (ret)
	653	pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
	654	" %d\n", ret);
	655
	656	ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
	657	if (ret)
	658	pr_warning("da850_evm_init: can not open GPIO %d\n",
	659	DA850_MMCSD_CD_PIN);
	660	gpio_direction_input(DA850_MMCSD_CD_PIN);
	661
	662	ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
	663	if (ret)
	664	pr_warning("da850_evm_init: can not open GPIO %d\n",
	665	DA850_MMCSD_WP_PIN);
	666	gpio_direction_input(DA850_MMCSD_WP_PIN);
	667
	668	ret = da8xx_register_mmcsd0(&da850_mmc_config);
	669	if (ret)
	670	pr_warning("da850_evm_init: mmcsd0 registration failed:"
	671	" %d\n", ret);
	672	}
700691f2	673
0fbc5592 SR	674	davinci_serial_init(&da850_evm_uart_config);
0fbc5592 SR	675
1a7ff8ff C	676	i2c_register_board_info(1, da850_evm_i2c_devices,
	677	ARRAY_SIZE(da850_evm_i2c_devices));
	678
0fbc5592 SR	679	/*
	680	* shut down uart 0 and 1; they are not used on the board and
	681	* accessing them causes endless "too much work in irq53" messages
	682	* with arago fs
	683	*/
	684	__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
	685	__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1	686
3821d10a	687	ret = davinci_cfg_reg_list(da850_mcasp_pins);
491214e1 C	688	if (ret)
	689	pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
	690	ret);
	691
b8864aa4	692	da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276	693
3821d10a	694	ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276 SR	695	if (ret)
	696	pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
	697	ret);
	698
7761ef67	699	/* Handle board specific muxing for LCD here */
3821d10a	700	ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67 SR	701	if (ret)
	702	pr_warning("da850_evm_init: evm specific lcd mux setup "
	703	"failed: %d\n", ret);
	704
5cbdf276 SR	705	ret = da850_lcd_hw_init();
	706	if (ret)
	707	pr_warning("da850_evm_init: lcd initialization failed: %d\n",
	708	ret);
	709
d52f235f	710	sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b	711	ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276 SR	712	if (ret)
	713	pr_warning("da850_evm_init: lcdc registration failed: %d\n",
	714	ret);
c51df70b MG	715
	716	ret = da8xx_register_rtc();
	717	if (ret)
	718	pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 SN	719
	720	ret = da850_register_cpufreq();
	721	if (ret)
	722	pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
	723	ret);
5aeb15aa SN	724
	725	ret = da8xx_register_cpuidle();
	726	if (ret)
	727	pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
	728	ret);
63534443 SN	729
	730	ret = da850_register_pm(&da850_pm_device);
	731	if (ret)
	732	pr_warning("da850_evm_init: suspend registration failed: %d\n",
	733	ret);
0fbc5592 SR	734	}
	735
	736	#ifdef CONFIG_SERIAL_8250_CONSOLE
	737	static int __init da850_evm_console_init(void)
	738	{
	739	return add_preferred_console("ttyS", 2, "115200");
	740	}
	741	console_initcall(da850_evm_console_init);
	742	#endif
	743
0fbc5592 SR	744	static void __init da850_evm_map_io(void)
	745	{
	746	da850_init();
	747	}
	748
	749	MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
	750	.phys_io = IO_PHYS,
	751	.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	752	.boot_params = (DA8XX_DDR_BASE + 0x100),
	753	.map_io = da850_evm_map_io,
bd808947	754	.init_irq = cp_intc_init,
0fbc5592 SR	755	.timer = &davinci_timer,
	756	.init_machine = da850_evm_init,
	757	MACHINE_END