Commit | Line | Data |
---|---|---|
0fbc5592 SR |
1 | /* |
2 | * TI DA850/OMAP-L138 EVM board | |
3 | * | |
4 | * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * Derived from: arch/arm/mach-davinci/board-da830-evm.c | |
7 | * Original Copyrights follow: | |
8 | * | |
9 | * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under | |
10 | * the terms of the GNU General Public License version 2. This program | |
11 | * is licensed "as is" without any warranty of any kind, whether express | |
12 | * or implied. | |
13 | */ | |
14 | #include <linux/kernel.h> | |
0fbc5592 SR |
15 | #include <linux/init.h> |
16 | #include <linux/console.h> | |
17 | #include <linux/i2c.h> | |
18 | #include <linux/i2c/at24.h> | |
75e2ea64 | 19 | #include <linux/i2c/pca953x.h> |
75929f5e | 20 | #include <linux/input.h> |
0bc20bba | 21 | #include <linux/mfd/tps6507x.h> |
5cbdf276 | 22 | #include <linux/gpio.h> |
75929f5e | 23 | #include <linux/gpio_keys.h> |
38beb929 SR |
24 | #include <linux/platform_device.h> |
25 | #include <linux/mtd/mtd.h> | |
26 | #include <linux/mtd/nand.h> | |
27 | #include <linux/mtd/partitions.h> | |
7c5ec609 | 28 | #include <linux/mtd/physmap.h> |
a9eb1f67 | 29 | #include <linux/regulator/machine.h> |
8b24599e | 30 | #include <linux/regulator/tps6507x.h> |
da1e3680 | 31 | #include <linux/input/tps6507x-ts.h> |
fdce5568 SN |
32 | #include <linux/spi/spi.h> |
33 | #include <linux/spi/flash.h> | |
ab3f5c1f IY |
34 | #include <linux/delay.h> |
35 | #include <linux/wl12xx.h> | |
0fbc5592 SR |
36 | |
37 | #include <asm/mach-types.h> | |
38 | #include <asm/mach/arch.h> | |
9f97da78 | 39 | #include <asm/system_info.h> |
0fbc5592 | 40 | |
0fbc5592 SR |
41 | #include <mach/cp_intc.h> |
42 | #include <mach/da8xx.h> | |
38beb929 | 43 | #include <mach/nand.h> |
7761ef67 | 44 | #include <mach/mux.h> |
18a8505c | 45 | #include <mach/aemif.h> |
fdce5568 | 46 | #include <mach/spi.h> |
0fbc5592 | 47 | |
1e046d17 MH |
48 | #include <media/tvp514x.h> |
49 | ||
f6f97588 | 50 | #define DA850_EVM_PHY_ID "davinci_mdio-0:00" |
7761ef67 | 51 | #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) |
5cbdf276 | 52 | #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) |
5cbdf276 | 53 | |
700691f2 SR |
54 | #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) |
55 | #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) | |
56 | ||
ab3f5c1f IY |
57 | #define DA850_WLAN_EN GPIO_TO_PIN(6, 9) |
58 | #define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10) | |
59 | ||
2206771c C |
60 | #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) |
61 | ||
fdce5568 SN |
62 | static struct mtd_partition da850evm_spiflash_part[] = { |
63 | [0] = { | |
64 | .name = "UBL", | |
65 | .offset = 0, | |
66 | .size = SZ_64K, | |
67 | .mask_flags = MTD_WRITEABLE, | |
68 | }, | |
69 | [1] = { | |
70 | .name = "U-Boot", | |
71 | .offset = MTDPART_OFS_APPEND, | |
72 | .size = SZ_512K, | |
73 | .mask_flags = MTD_WRITEABLE, | |
74 | }, | |
75 | [2] = { | |
76 | .name = "U-Boot-Env", | |
77 | .offset = MTDPART_OFS_APPEND, | |
78 | .size = SZ_64K, | |
79 | .mask_flags = MTD_WRITEABLE, | |
80 | }, | |
81 | [3] = { | |
82 | .name = "Kernel", | |
83 | .offset = MTDPART_OFS_APPEND, | |
84 | .size = SZ_2M + SZ_512K, | |
85 | .mask_flags = 0, | |
86 | }, | |
87 | [4] = { | |
88 | .name = "Filesystem", | |
89 | .offset = MTDPART_OFS_APPEND, | |
90 | .size = SZ_4M, | |
91 | .mask_flags = 0, | |
92 | }, | |
93 | [5] = { | |
94 | .name = "MAC-Address", | |
95 | .offset = SZ_8M - SZ_64K, | |
96 | .size = SZ_64K, | |
97 | .mask_flags = MTD_WRITEABLE, | |
98 | }, | |
99 | }; | |
100 | ||
101 | static struct flash_platform_data da850evm_spiflash_data = { | |
102 | .name = "m25p80", | |
103 | .parts = da850evm_spiflash_part, | |
104 | .nr_parts = ARRAY_SIZE(da850evm_spiflash_part), | |
105 | .type = "m25p64", | |
106 | }; | |
107 | ||
108 | static struct davinci_spi_config da850evm_spiflash_cfg = { | |
109 | .io_type = SPI_IO_TYPE_DMA, | |
110 | .c2tdelay = 8, | |
111 | .t2cdelay = 8, | |
112 | }; | |
113 | ||
114 | static struct spi_board_info da850evm_spi_info[] = { | |
115 | { | |
116 | .modalias = "m25p80", | |
117 | .platform_data = &da850evm_spiflash_data, | |
118 | .controller_data = &da850evm_spiflash_cfg, | |
119 | .mode = SPI_MODE_0, | |
120 | .max_speed_hz = 30000000, | |
121 | .bus_num = 1, | |
122 | .chip_select = 0, | |
123 | }, | |
124 | }; | |
125 | ||
810198bc RS |
126 | #ifdef CONFIG_MTD |
127 | static void da850_evm_m25p80_notify_add(struct mtd_info *mtd) | |
128 | { | |
129 | char *mac_addr = davinci_soc_info.emac_pdata->mac_addr; | |
130 | size_t retlen; | |
131 | ||
132 | if (!strcmp(mtd->name, "MAC-Address")) { | |
329ad399 | 133 | mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr); |
810198bc RS |
134 | if (retlen == ETH_ALEN) |
135 | pr_info("Read MAC addr from SPI Flash: %pM\n", | |
136 | mac_addr); | |
137 | } | |
138 | } | |
139 | ||
140 | static struct mtd_notifier da850evm_spi_notifier = { | |
141 | .add = da850_evm_m25p80_notify_add, | |
142 | }; | |
143 | ||
144 | static void da850_evm_setup_mac_addr(void) | |
145 | { | |
146 | register_mtd_user(&da850evm_spi_notifier); | |
147 | } | |
148 | #else | |
149 | static void da850_evm_setup_mac_addr(void) { } | |
150 | #endif | |
151 | ||
7c5ec609 SR |
152 | static struct mtd_partition da850_evm_norflash_partition[] = { |
153 | { | |
e2abd5a2 | 154 | .name = "bootloaders + env", |
7c5ec609 | 155 | .offset = 0, |
e2abd5a2 SR |
156 | .size = SZ_512K, |
157 | .mask_flags = MTD_WRITEABLE, | |
158 | }, | |
159 | { | |
160 | .name = "kernel", | |
161 | .offset = MTDPART_OFS_APPEND, | |
162 | .size = SZ_2M, | |
163 | .mask_flags = 0, | |
164 | }, | |
165 | { | |
166 | .name = "filesystem", | |
167 | .offset = MTDPART_OFS_APPEND, | |
7c5ec609 SR |
168 | .size = MTDPART_SIZ_FULL, |
169 | .mask_flags = 0, | |
170 | }, | |
171 | }; | |
172 | ||
173 | static struct physmap_flash_data da850_evm_norflash_data = { | |
174 | .width = 2, | |
175 | .parts = da850_evm_norflash_partition, | |
176 | .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), | |
177 | }; | |
178 | ||
179 | static struct resource da850_evm_norflash_resource[] = { | |
180 | { | |
181 | .start = DA8XX_AEMIF_CS2_BASE, | |
182 | .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, | |
183 | .flags = IORESOURCE_MEM, | |
184 | }, | |
185 | }; | |
186 | ||
187 | static struct platform_device da850_evm_norflash_device = { | |
188 | .name = "physmap-flash", | |
189 | .id = 0, | |
190 | .dev = { | |
191 | .platform_data = &da850_evm_norflash_data, | |
192 | }, | |
193 | .num_resources = 1, | |
194 | .resource = da850_evm_norflash_resource, | |
195 | }; | |
196 | ||
63534443 SN |
197 | static struct davinci_pm_config da850_pm_pdata = { |
198 | .sleepcount = 128, | |
199 | }; | |
200 | ||
201 | static struct platform_device da850_pm_device = { | |
202 | .name = "pm-davinci", | |
203 | .dev = { | |
204 | .platform_data = &da850_pm_pdata, | |
205 | }, | |
206 | .id = -1, | |
207 | }; | |
208 | ||
38beb929 SR |
209 | /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash |
210 | * (128K blocks). It may be used instead of the (default) SPI flash | |
211 | * to boot, using TI's tools to install the secondary boot loader | |
212 | * (UBL) and U-Boot. | |
213 | */ | |
db549d22 | 214 | static struct mtd_partition da850_evm_nandflash_partition[] = { |
38beb929 SR |
215 | { |
216 | .name = "u-boot env", | |
217 | .offset = 0, | |
218 | .size = SZ_128K, | |
219 | .mask_flags = MTD_WRITEABLE, | |
220 | }, | |
221 | { | |
222 | .name = "UBL", | |
223 | .offset = MTDPART_OFS_APPEND, | |
224 | .size = SZ_128K, | |
225 | .mask_flags = MTD_WRITEABLE, | |
226 | }, | |
227 | { | |
228 | .name = "u-boot", | |
229 | .offset = MTDPART_OFS_APPEND, | |
230 | .size = 4 * SZ_128K, | |
231 | .mask_flags = MTD_WRITEABLE, | |
232 | }, | |
233 | { | |
234 | .name = "kernel", | |
235 | .offset = 0x200000, | |
236 | .size = SZ_2M, | |
237 | .mask_flags = 0, | |
238 | }, | |
239 | { | |
240 | .name = "filesystem", | |
241 | .offset = MTDPART_OFS_APPEND, | |
242 | .size = MTDPART_SIZ_FULL, | |
243 | .mask_flags = 0, | |
244 | }, | |
245 | }; | |
246 | ||
18a8505c SN |
247 | static struct davinci_aemif_timing da850_evm_nandflash_timing = { |
248 | .wsetup = 24, | |
249 | .wstrobe = 21, | |
250 | .whold = 14, | |
251 | .rsetup = 19, | |
252 | .rstrobe = 50, | |
253 | .rhold = 0, | |
254 | .ta = 20, | |
255 | }; | |
256 | ||
38beb929 SR |
257 | static struct davinci_nand_pdata da850_evm_nandflash_data = { |
258 | .parts = da850_evm_nandflash_partition, | |
259 | .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), | |
260 | .ecc_mode = NAND_ECC_HW, | |
fc42e335 | 261 | .ecc_bits = 4, |
bb9ebd4e | 262 | .bbt_options = NAND_BBT_USE_FLASH, |
18a8505c | 263 | .timing = &da850_evm_nandflash_timing, |
38beb929 SR |
264 | }; |
265 | ||
266 | static struct resource da850_evm_nandflash_resource[] = { | |
267 | { | |
268 | .start = DA8XX_AEMIF_CS3_BASE, | |
269 | .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, | |
270 | .flags = IORESOURCE_MEM, | |
271 | }, | |
272 | { | |
273 | .start = DA8XX_AEMIF_CTL_BASE, | |
274 | .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, | |
275 | .flags = IORESOURCE_MEM, | |
276 | }, | |
277 | }; | |
278 | ||
279 | static struct platform_device da850_evm_nandflash_device = { | |
280 | .name = "davinci_nand", | |
281 | .id = 1, | |
282 | .dev = { | |
283 | .platform_data = &da850_evm_nandflash_data, | |
284 | }, | |
285 | .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), | |
286 | .resource = da850_evm_nandflash_resource, | |
287 | }; | |
288 | ||
59858b71 | 289 | static struct platform_device *da850_evm_devices[] = { |
039c5ee3 SR |
290 | &da850_evm_nandflash_device, |
291 | &da850_evm_norflash_device, | |
292 | }; | |
293 | ||
294 | #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 | |
295 | #define DA8XX_AEMIF_ASIZE_16BIT 0x1 | |
296 | ||
297 | static void __init da850_evm_init_nor(void) | |
298 | { | |
299 | void __iomem *aemif_addr; | |
300 | ||
301 | aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); | |
302 | ||
303 | /* Configure data bus width of CS2 to 16 bit */ | |
304 | writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | | |
305 | DA8XX_AEMIF_ASIZE_16BIT, | |
306 | aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); | |
307 | ||
308 | iounmap(aemif_addr); | |
309 | } | |
310 | ||
f48ecc2f SS |
311 | static const short da850_evm_nand_pins[] = { |
312 | DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, | |
313 | DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, | |
314 | DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, | |
315 | DA850_NEMA_WE, DA850_NEMA_OE, | |
316 | -1 | |
317 | }; | |
318 | ||
319 | static const short da850_evm_nor_pins[] = { | |
320 | DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, | |
321 | DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, | |
322 | DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, | |
323 | DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, | |
324 | DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, | |
325 | DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, | |
326 | DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, | |
327 | DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, | |
328 | DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, | |
329 | DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, | |
330 | DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, | |
331 | DA850_EMA_A_22, DA850_EMA_A_23, | |
332 | -1 | |
333 | }; | |
334 | ||
039c5ee3 SR |
335 | #if defined(CONFIG_MMC_DAVINCI) || \ |
336 | defined(CONFIG_MMC_DAVINCI_MODULE) | |
337 | #define HAS_MMC 1 | |
338 | #else | |
339 | #define HAS_MMC 0 | |
340 | #endif | |
341 | ||
f48ecc2f | 342 | static inline void da850_evm_setup_nor_nand(void) |
039c5ee3 SR |
343 | { |
344 | int ret = 0; | |
345 | ||
b688c2fb | 346 | if (!HAS_MMC) { |
f48ecc2f | 347 | ret = davinci_cfg_reg_list(da850_evm_nand_pins); |
039c5ee3 SR |
348 | if (ret) |
349 | pr_warning("da850_evm_init: nand mux setup failed: " | |
350 | "%d\n", ret); | |
351 | ||
f48ecc2f | 352 | ret = davinci_cfg_reg_list(da850_evm_nor_pins); |
039c5ee3 SR |
353 | if (ret) |
354 | pr_warning("da850_evm_init: nor mux setup failed: %d\n", | |
355 | ret); | |
356 | ||
357 | da850_evm_init_nor(); | |
358 | ||
359 | platform_add_devices(da850_evm_devices, | |
360 | ARRAY_SIZE(da850_evm_devices)); | |
361 | } | |
362 | } | |
75e2ea64 | 363 | |
bae10587 SN |
364 | #ifdef CONFIG_DA850_UI_RMII |
365 | static inline void da850_evm_setup_emac_rmii(int rmii_sel) | |
366 | { | |
367 | struct davinci_soc_info *soc_info = &davinci_soc_info; | |
368 | ||
369 | soc_info->emac_pdata->rmii_en = 1; | |
47e7cb14 | 370 | gpio_set_value_cansleep(rmii_sel, 0); |
bae10587 SN |
371 | } |
372 | #else | |
373 | static inline void da850_evm_setup_emac_rmii(int rmii_sel) { } | |
374 | #endif | |
375 | ||
75929f5e BG |
376 | |
377 | #define DA850_KEYS_DEBOUNCE_MS 10 | |
378 | /* | |
379 | * At 200ms polling interval it is possible to miss an | |
380 | * event by tapping very lightly on the push button but most | |
381 | * pushes do result in an event; longer intervals require the | |
382 | * user to hold the button whereas shorter intervals require | |
383 | * more CPU time for polling. | |
384 | */ | |
385 | #define DA850_GPIO_KEYS_POLL_MS 200 | |
386 | ||
387 | enum da850_evm_ui_exp_pins { | |
388 | DA850_EVM_UI_EXP_SEL_C = 5, | |
389 | DA850_EVM_UI_EXP_SEL_B, | |
390 | DA850_EVM_UI_EXP_SEL_A, | |
391 | DA850_EVM_UI_EXP_PB8, | |
392 | DA850_EVM_UI_EXP_PB7, | |
393 | DA850_EVM_UI_EXP_PB6, | |
394 | DA850_EVM_UI_EXP_PB5, | |
395 | DA850_EVM_UI_EXP_PB4, | |
396 | DA850_EVM_UI_EXP_PB3, | |
397 | DA850_EVM_UI_EXP_PB2, | |
398 | DA850_EVM_UI_EXP_PB1, | |
399 | }; | |
400 | ||
401 | static const char const *da850_evm_ui_exp[] = { | |
402 | [DA850_EVM_UI_EXP_SEL_C] = "sel_c", | |
403 | [DA850_EVM_UI_EXP_SEL_B] = "sel_b", | |
404 | [DA850_EVM_UI_EXP_SEL_A] = "sel_a", | |
405 | [DA850_EVM_UI_EXP_PB8] = "pb8", | |
406 | [DA850_EVM_UI_EXP_PB7] = "pb7", | |
407 | [DA850_EVM_UI_EXP_PB6] = "pb6", | |
408 | [DA850_EVM_UI_EXP_PB5] = "pb5", | |
409 | [DA850_EVM_UI_EXP_PB4] = "pb4", | |
410 | [DA850_EVM_UI_EXP_PB3] = "pb3", | |
411 | [DA850_EVM_UI_EXP_PB2] = "pb2", | |
412 | [DA850_EVM_UI_EXP_PB1] = "pb1", | |
413 | }; | |
414 | ||
415 | #define DA850_N_UI_PB 8 | |
416 | ||
417 | static struct gpio_keys_button da850_evm_ui_keys[] = { | |
418 | [0 ... DA850_N_UI_PB - 1] = { | |
419 | .type = EV_KEY, | |
420 | .active_low = 1, | |
421 | .wakeup = 0, | |
422 | .debounce_interval = DA850_KEYS_DEBOUNCE_MS, | |
423 | .code = -1, /* assigned at runtime */ | |
424 | .gpio = -1, /* assigned at runtime */ | |
425 | .desc = NULL, /* assigned at runtime */ | |
426 | }, | |
427 | }; | |
428 | ||
429 | static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = { | |
430 | .buttons = da850_evm_ui_keys, | |
431 | .nbuttons = ARRAY_SIZE(da850_evm_ui_keys), | |
432 | .poll_interval = DA850_GPIO_KEYS_POLL_MS, | |
433 | }; | |
434 | ||
435 | static struct platform_device da850_evm_ui_keys_device = { | |
436 | .name = "gpio-keys-polled", | |
437 | .id = 0, | |
438 | .dev = { | |
439 | .platform_data = &da850_evm_ui_keys_pdata | |
440 | }, | |
441 | }; | |
442 | ||
443 | static void da850_evm_ui_keys_init(unsigned gpio) | |
444 | { | |
445 | int i; | |
446 | struct gpio_keys_button *button; | |
447 | ||
448 | for (i = 0; i < DA850_N_UI_PB; i++) { | |
449 | button = &da850_evm_ui_keys[i]; | |
450 | button->code = KEY_F8 - i; | |
451 | button->desc = (char *) | |
452 | da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i]; | |
453 | button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i; | |
454 | } | |
455 | } | |
456 | ||
1e046d17 MH |
457 | #ifdef CONFIG_DA850_UI_SD_VIDEO_PORT |
458 | static inline void da850_evm_setup_video_port(int video_sel) | |
459 | { | |
460 | gpio_set_value_cansleep(video_sel, 0); | |
461 | } | |
462 | #else | |
463 | static inline void da850_evm_setup_video_port(int video_sel) { } | |
464 | #endif | |
465 | ||
75e2ea64 C |
466 | static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, |
467 | unsigned ngpio, void *c) | |
468 | { | |
469 | int sel_a, sel_b, sel_c, ret; | |
470 | ||
53c2897d BG |
471 | sel_a = gpio + DA850_EVM_UI_EXP_SEL_A; |
472 | sel_b = gpio + DA850_EVM_UI_EXP_SEL_B; | |
473 | sel_c = gpio + DA850_EVM_UI_EXP_SEL_C; | |
75e2ea64 | 474 | |
53c2897d | 475 | ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]); |
75e2ea64 C |
476 | if (ret) { |
477 | pr_warning("Cannot open UI expander pin %d\n", sel_a); | |
478 | goto exp_setup_sela_fail; | |
479 | } | |
480 | ||
53c2897d | 481 | ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]); |
75e2ea64 C |
482 | if (ret) { |
483 | pr_warning("Cannot open UI expander pin %d\n", sel_b); | |
484 | goto exp_setup_selb_fail; | |
485 | } | |
486 | ||
53c2897d | 487 | ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]); |
75e2ea64 C |
488 | if (ret) { |
489 | pr_warning("Cannot open UI expander pin %d\n", sel_c); | |
490 | goto exp_setup_selc_fail; | |
491 | } | |
492 | ||
493 | /* deselect all functionalities */ | |
494 | gpio_direction_output(sel_a, 1); | |
495 | gpio_direction_output(sel_b, 1); | |
496 | gpio_direction_output(sel_c, 1); | |
497 | ||
75929f5e BG |
498 | da850_evm_ui_keys_init(gpio); |
499 | ret = platform_device_register(&da850_evm_ui_keys_device); | |
500 | if (ret) { | |
501 | pr_warning("Could not register UI GPIO expander push-buttons"); | |
502 | goto exp_setup_keys_fail; | |
503 | } | |
504 | ||
75e2ea64 C |
505 | pr_info("DA850/OMAP-L138 EVM UI card detected\n"); |
506 | ||
507 | da850_evm_setup_nor_nand(); | |
508 | ||
bae10587 | 509 | da850_evm_setup_emac_rmii(sel_a); |
2206771c | 510 | |
1e046d17 MH |
511 | da850_evm_setup_video_port(sel_c); |
512 | ||
75e2ea64 C |
513 | return 0; |
514 | ||
75929f5e BG |
515 | exp_setup_keys_fail: |
516 | gpio_free(sel_c); | |
75e2ea64 C |
517 | exp_setup_selc_fail: |
518 | gpio_free(sel_b); | |
519 | exp_setup_selb_fail: | |
520 | gpio_free(sel_a); | |
521 | exp_setup_sela_fail: | |
522 | return ret; | |
523 | } | |
524 | ||
525 | static int da850_evm_ui_expander_teardown(struct i2c_client *client, | |
526 | unsigned gpio, unsigned ngpio, void *c) | |
527 | { | |
75929f5e BG |
528 | platform_device_unregister(&da850_evm_ui_keys_device); |
529 | ||
75e2ea64 | 530 | /* deselect all functionalities */ |
53c2897d BG |
531 | gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1); |
532 | gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1); | |
533 | gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1); | |
75e2ea64 | 534 | |
53c2897d BG |
535 | gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C); |
536 | gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B); | |
537 | gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A); | |
75e2ea64 C |
538 | |
539 | return 0; | |
540 | } | |
541 | ||
70b30939 BG |
542 | /* assign the baseboard expander's GPIOs after the UI board's */ |
543 | #define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp) | |
544 | #define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS) | |
545 | ||
546 | enum da850_evm_bb_exp_pins { | |
547 | DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0, | |
548 | DA850_EVM_BB_EXP_SW_RST, | |
549 | DA850_EVM_BB_EXP_TP_23, | |
550 | DA850_EVM_BB_EXP_TP_22, | |
551 | DA850_EVM_BB_EXP_TP_21, | |
552 | DA850_EVM_BB_EXP_USER_PB1, | |
553 | DA850_EVM_BB_EXP_USER_LED2, | |
554 | DA850_EVM_BB_EXP_USER_LED1, | |
555 | DA850_EVM_BB_EXP_USER_SW1, | |
556 | DA850_EVM_BB_EXP_USER_SW2, | |
557 | DA850_EVM_BB_EXP_USER_SW3, | |
558 | DA850_EVM_BB_EXP_USER_SW4, | |
559 | DA850_EVM_BB_EXP_USER_SW5, | |
560 | DA850_EVM_BB_EXP_USER_SW6, | |
561 | DA850_EVM_BB_EXP_USER_SW7, | |
562 | DA850_EVM_BB_EXP_USER_SW8 | |
563 | }; | |
564 | ||
565 | static const char const *da850_evm_bb_exp[] = { | |
566 | [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en", | |
567 | [DA850_EVM_BB_EXP_SW_RST] = "sw_rst", | |
568 | [DA850_EVM_BB_EXP_TP_23] = "tp_23", | |
569 | [DA850_EVM_BB_EXP_TP_22] = "tp_22", | |
570 | [DA850_EVM_BB_EXP_TP_21] = "tp_21", | |
571 | [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1", | |
572 | [DA850_EVM_BB_EXP_USER_LED2] = "user_led2", | |
573 | [DA850_EVM_BB_EXP_USER_LED1] = "user_led1", | |
574 | [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1", | |
575 | [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2", | |
576 | [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3", | |
577 | [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4", | |
578 | [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5", | |
579 | [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6", | |
580 | [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7", | |
581 | [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8", | |
582 | }; | |
583 | ||
584 | #define DA850_N_BB_USER_SW 8 | |
585 | ||
586 | static struct gpio_keys_button da850_evm_bb_keys[] = { | |
587 | [0] = { | |
588 | .type = EV_KEY, | |
589 | .active_low = 1, | |
590 | .wakeup = 0, | |
591 | .debounce_interval = DA850_KEYS_DEBOUNCE_MS, | |
592 | .code = KEY_PROG1, | |
593 | .desc = NULL, /* assigned at runtime */ | |
594 | .gpio = -1, /* assigned at runtime */ | |
595 | }, | |
596 | [1 ... DA850_N_BB_USER_SW] = { | |
597 | .type = EV_SW, | |
598 | .active_low = 1, | |
599 | .wakeup = 0, | |
600 | .debounce_interval = DA850_KEYS_DEBOUNCE_MS, | |
601 | .code = -1, /* assigned at runtime */ | |
602 | .desc = NULL, /* assigned at runtime */ | |
603 | .gpio = -1, /* assigned at runtime */ | |
604 | }, | |
605 | }; | |
606 | ||
607 | static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = { | |
608 | .buttons = da850_evm_bb_keys, | |
609 | .nbuttons = ARRAY_SIZE(da850_evm_bb_keys), | |
610 | .poll_interval = DA850_GPIO_KEYS_POLL_MS, | |
611 | }; | |
612 | ||
613 | static struct platform_device da850_evm_bb_keys_device = { | |
614 | .name = "gpio-keys-polled", | |
615 | .id = 1, | |
616 | .dev = { | |
617 | .platform_data = &da850_evm_bb_keys_pdata | |
618 | }, | |
619 | }; | |
620 | ||
621 | static void da850_evm_bb_keys_init(unsigned gpio) | |
622 | { | |
623 | int i; | |
624 | struct gpio_keys_button *button; | |
625 | ||
626 | button = &da850_evm_bb_keys[0]; | |
627 | button->desc = (char *) | |
628 | da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1]; | |
629 | button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1; | |
630 | ||
631 | for (i = 0; i < DA850_N_BB_USER_SW; i++) { | |
632 | button = &da850_evm_bb_keys[i + 1]; | |
633 | button->code = SW_LID + i; | |
634 | button->desc = (char *) | |
635 | da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i]; | |
636 | button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i; | |
637 | } | |
638 | } | |
639 | ||
640 | #define DA850_N_BB_USER_LED 2 | |
641 | ||
642 | static struct gpio_led da850_evm_bb_leds[] = { | |
643 | [0 ... DA850_N_BB_USER_LED - 1] = { | |
644 | .active_low = 1, | |
645 | .gpio = -1, /* assigned at runtime */ | |
646 | .name = NULL, /* assigned at runtime */ | |
647 | }, | |
648 | }; | |
649 | ||
650 | static struct gpio_led_platform_data da850_evm_bb_leds_pdata = { | |
651 | .leds = da850_evm_bb_leds, | |
652 | .num_leds = ARRAY_SIZE(da850_evm_bb_leds), | |
653 | }; | |
654 | ||
655 | static struct platform_device da850_evm_bb_leds_device = { | |
656 | .name = "leds-gpio", | |
657 | .id = -1, | |
658 | .dev = { | |
659 | .platform_data = &da850_evm_bb_leds_pdata | |
660 | } | |
661 | }; | |
662 | ||
663 | static void da850_evm_bb_leds_init(unsigned gpio) | |
664 | { | |
665 | int i; | |
666 | struct gpio_led *led; | |
667 | ||
668 | for (i = 0; i < DA850_N_BB_USER_LED; i++) { | |
669 | led = &da850_evm_bb_leds[i]; | |
670 | ||
671 | led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i; | |
672 | led->name = | |
673 | da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i]; | |
674 | } | |
675 | } | |
676 | ||
677 | static int da850_evm_bb_expander_setup(struct i2c_client *client, | |
678 | unsigned gpio, unsigned ngpio, | |
679 | void *c) | |
680 | { | |
681 | int ret; | |
682 | ||
683 | /* | |
684 | * Register the switches and pushbutton on the baseboard as a gpio-keys | |
685 | * device. | |
686 | */ | |
687 | da850_evm_bb_keys_init(gpio); | |
688 | ret = platform_device_register(&da850_evm_bb_keys_device); | |
689 | if (ret) { | |
690 | pr_warning("Could not register baseboard GPIO expander keys"); | |
691 | goto io_exp_setup_sw_fail; | |
692 | } | |
693 | ||
694 | da850_evm_bb_leds_init(gpio); | |
695 | ret = platform_device_register(&da850_evm_bb_leds_device); | |
696 | if (ret) { | |
697 | pr_warning("Could not register baseboard GPIO expander LEDS"); | |
698 | goto io_exp_setup_leds_fail; | |
699 | } | |
700 | ||
701 | return 0; | |
702 | ||
703 | io_exp_setup_leds_fail: | |
704 | platform_device_unregister(&da850_evm_bb_keys_device); | |
705 | io_exp_setup_sw_fail: | |
706 | return ret; | |
707 | } | |
708 | ||
709 | static int da850_evm_bb_expander_teardown(struct i2c_client *client, | |
710 | unsigned gpio, unsigned ngpio, void *c) | |
711 | { | |
712 | platform_device_unregister(&da850_evm_bb_leds_device); | |
713 | platform_device_unregister(&da850_evm_bb_keys_device); | |
714 | ||
715 | return 0; | |
716 | } | |
717 | ||
75e2ea64 C |
718 | static struct pca953x_platform_data da850_evm_ui_expander_info = { |
719 | .gpio_base = DAVINCI_N_GPIO, | |
720 | .setup = da850_evm_ui_expander_setup, | |
721 | .teardown = da850_evm_ui_expander_teardown, | |
75929f5e | 722 | .names = da850_evm_ui_exp, |
75e2ea64 C |
723 | }; |
724 | ||
70b30939 BG |
725 | static struct pca953x_platform_data da850_evm_bb_expander_info = { |
726 | .gpio_base = DA850_BB_EXPANDER_GPIO_BASE, | |
727 | .setup = da850_evm_bb_expander_setup, | |
728 | .teardown = da850_evm_bb_expander_teardown, | |
729 | .names = da850_evm_bb_exp, | |
730 | }; | |
731 | ||
1a7ff8ff C |
732 | static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { |
733 | { | |
734 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
75e2ea64 C |
735 | }, |
736 | { | |
737 | I2C_BOARD_INFO("tca6416", 0x20), | |
738 | .platform_data = &da850_evm_ui_expander_info, | |
739 | }, | |
70b30939 BG |
740 | { |
741 | I2C_BOARD_INFO("tca6416", 0x21), | |
742 | .platform_data = &da850_evm_bb_expander_info, | |
743 | }, | |
1a7ff8ff C |
744 | }; |
745 | ||
0fbc5592 SR |
746 | static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { |
747 | .bus_freq = 100, /* kHz */ | |
748 | .bus_delay = 0, /* usec */ | |
749 | }; | |
750 | ||
751 | static struct davinci_uart_config da850_evm_uart_config __initdata = { | |
752 | .enabled_uarts = 0x7, | |
753 | }; | |
754 | ||
491214e1 C |
755 | /* davinci da850 evm audio machine driver */ |
756 | static u8 da850_iis_serializer_direction[] = { | |
757 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
758 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
759 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, | |
760 | RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
761 | }; | |
762 | ||
763 | static struct snd_platform_data da850_evm_snd_data = { | |
764 | .tx_dma_offset = 0x2000, | |
765 | .rx_dma_offset = 0x2000, | |
766 | .op_mode = DAVINCI_MCASP_IIS_MODE, | |
767 | .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), | |
768 | .tdm_slots = 2, | |
769 | .serial_dir = da850_iis_serializer_direction, | |
f1b21c52 | 770 | .asp_chan_q = EVENTQ_0, |
491214e1 C |
771 | .version = MCASP_VERSION_2, |
772 | .txnumevt = 1, | |
773 | .rxnumevt = 1, | |
774 | }; | |
775 | ||
c840fc74 MW |
776 | static const short da850_evm_mcasp_pins[] __initconst = { |
777 | DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, | |
778 | DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, | |
779 | DA850_AXR_11, DA850_AXR_12, | |
780 | -1 | |
781 | }; | |
782 | ||
700691f2 SR |
783 | static int da850_evm_mmc_get_ro(int index) |
784 | { | |
785 | return gpio_get_value(DA850_MMCSD_WP_PIN); | |
786 | } | |
787 | ||
788 | static int da850_evm_mmc_get_cd(int index) | |
789 | { | |
790 | return !gpio_get_value(DA850_MMCSD_CD_PIN); | |
791 | } | |
792 | ||
793 | static struct davinci_mmc_config da850_mmc_config = { | |
794 | .get_ro = da850_evm_mmc_get_ro, | |
795 | .get_cd = da850_evm_mmc_get_cd, | |
796 | .wires = 4, | |
0046d0bf C |
797 | .max_freq = 50000000, |
798 | .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, | |
700691f2 SR |
799 | .version = MMC_CTLR_VERSION_2, |
800 | }; | |
801 | ||
5a0d80ea MW |
802 | static const short da850_evm_mmcsd0_pins[] __initconst = { |
803 | DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, | |
804 | DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, | |
805 | DA850_GPIO4_0, DA850_GPIO4_1, | |
806 | -1 | |
807 | }; | |
808 | ||
d52f235f C |
809 | static void da850_panel_power_ctrl(int val) |
810 | { | |
811 | /* lcd backlight */ | |
812 | gpio_set_value(DA850_LCD_BL_PIN, val); | |
813 | ||
814 | /* lcd power */ | |
815 | gpio_set_value(DA850_LCD_PWR_PIN, val); | |
816 | } | |
817 | ||
5cbdf276 SR |
818 | static int da850_lcd_hw_init(void) |
819 | { | |
820 | int status; | |
821 | ||
822 | status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n"); | |
823 | if (status < 0) | |
824 | return status; | |
825 | ||
826 | status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n"); | |
827 | if (status < 0) { | |
828 | gpio_free(DA850_LCD_BL_PIN); | |
829 | return status; | |
830 | } | |
831 | ||
832 | gpio_direction_output(DA850_LCD_BL_PIN, 0); | |
833 | gpio_direction_output(DA850_LCD_PWR_PIN, 0); | |
834 | ||
d52f235f C |
835 | /* Switch off panel power and backlight */ |
836 | da850_panel_power_ctrl(0); | |
5cbdf276 | 837 | |
d52f235f C |
838 | /* Switch on panel power and backlight */ |
839 | da850_panel_power_ctrl(1); | |
5cbdf276 SR |
840 | |
841 | return 0; | |
842 | } | |
491214e1 | 843 | |
a9eb1f67 SN |
844 | /* TPS65070 voltage regulator support */ |
845 | ||
846 | /* 3.3V */ | |
db549d22 | 847 | static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = { |
a9eb1f67 SN |
848 | { |
849 | .supply = "usb0_vdda33", | |
850 | }, | |
851 | { | |
852 | .supply = "usb1_vdda33", | |
853 | }, | |
854 | }; | |
855 | ||
856 | /* 3.3V or 1.8V */ | |
db549d22 | 857 | static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = { |
a9eb1f67 SN |
858 | { |
859 | .supply = "dvdd3318_a", | |
860 | }, | |
861 | { | |
862 | .supply = "dvdd3318_b", | |
863 | }, | |
864 | { | |
865 | .supply = "dvdd3318_c", | |
866 | }, | |
867 | }; | |
868 | ||
869 | /* 1.2V */ | |
db549d22 | 870 | static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = { |
a9eb1f67 SN |
871 | { |
872 | .supply = "cvdd", | |
873 | }, | |
874 | }; | |
875 | ||
876 | /* 1.8V LDO */ | |
db549d22 | 877 | static struct regulator_consumer_supply tps65070_ldo1_consumers[] = { |
a9eb1f67 SN |
878 | { |
879 | .supply = "sata_vddr", | |
880 | }, | |
881 | { | |
882 | .supply = "usb0_vdda18", | |
883 | }, | |
884 | { | |
885 | .supply = "usb1_vdda18", | |
886 | }, | |
887 | { | |
888 | .supply = "ddr_dvdd18", | |
889 | }, | |
890 | }; | |
891 | ||
892 | /* 1.2V LDO */ | |
db549d22 | 893 | static struct regulator_consumer_supply tps65070_ldo2_consumers[] = { |
a9eb1f67 SN |
894 | { |
895 | .supply = "sata_vdd", | |
896 | }, | |
897 | { | |
898 | .supply = "pll0_vdda", | |
899 | }, | |
900 | { | |
901 | .supply = "pll1_vdda", | |
902 | }, | |
903 | { | |
904 | .supply = "usbs_cvdd", | |
905 | }, | |
906 | { | |
907 | .supply = "vddarnwa1", | |
908 | }, | |
909 | }; | |
910 | ||
8b24599e SN |
911 | /* We take advantage of the fact that both defdcdc{2,3} are tied high */ |
912 | static struct tps6507x_reg_platform_data tps6507x_platform_data = { | |
913 | .defdcdc_default = true, | |
914 | }; | |
915 | ||
db549d22 | 916 | static struct regulator_init_data tps65070_regulator_data[] = { |
a9eb1f67 SN |
917 | /* dcdc1 */ |
918 | { | |
919 | .constraints = { | |
920 | .min_uV = 3150000, | |
921 | .max_uV = 3450000, | |
922 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
923 | REGULATOR_CHANGE_STATUS), | |
924 | .boot_on = 1, | |
925 | }, | |
926 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers), | |
927 | .consumer_supplies = tps65070_dcdc1_consumers, | |
928 | }, | |
929 | ||
930 | /* dcdc2 */ | |
931 | { | |
932 | .constraints = { | |
933 | .min_uV = 1710000, | |
934 | .max_uV = 3450000, | |
935 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
936 | REGULATOR_CHANGE_STATUS), | |
937 | .boot_on = 1, | |
938 | }, | |
939 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers), | |
940 | .consumer_supplies = tps65070_dcdc2_consumers, | |
8b24599e | 941 | .driver_data = &tps6507x_platform_data, |
a9eb1f67 SN |
942 | }, |
943 | ||
944 | /* dcdc3 */ | |
945 | { | |
946 | .constraints = { | |
947 | .min_uV = 950000, | |
28bd2c34 | 948 | .max_uV = 1350000, |
a9eb1f67 SN |
949 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | |
950 | REGULATOR_CHANGE_STATUS), | |
951 | .boot_on = 1, | |
952 | }, | |
953 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers), | |
954 | .consumer_supplies = tps65070_dcdc3_consumers, | |
8b24599e | 955 | .driver_data = &tps6507x_platform_data, |
a9eb1f67 SN |
956 | }, |
957 | ||
958 | /* ldo1 */ | |
959 | { | |
960 | .constraints = { | |
961 | .min_uV = 1710000, | |
962 | .max_uV = 1890000, | |
963 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
964 | REGULATOR_CHANGE_STATUS), | |
965 | .boot_on = 1, | |
966 | }, | |
967 | .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers), | |
968 | .consumer_supplies = tps65070_ldo1_consumers, | |
969 | }, | |
970 | ||
971 | /* ldo2 */ | |
972 | { | |
973 | .constraints = { | |
974 | .min_uV = 1140000, | |
975 | .max_uV = 1320000, | |
976 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
977 | REGULATOR_CHANGE_STATUS), | |
978 | .boot_on = 1, | |
979 | }, | |
980 | .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers), | |
981 | .consumer_supplies = tps65070_ldo2_consumers, | |
982 | }, | |
983 | }; | |
984 | ||
da1e3680 TF |
985 | static struct touchscreen_init_data tps6507x_touchscreen_data = { |
986 | .poll_period = 30, /* ms between touch samples */ | |
987 | .min_pressure = 0x30, /* minimum pressure to trigger touch */ | |
988 | .vref = 0, /* turn off vref when not using A/D */ | |
989 | .vendor = 0, /* /sys/class/input/input?/id/vendor */ | |
990 | .product = 65070, /* /sys/class/input/input?/id/product */ | |
991 | .version = 0x100, /* /sys/class/input/input?/id/version */ | |
992 | }; | |
993 | ||
0bc20bba TF |
994 | static struct tps6507x_board tps_board = { |
995 | .tps6507x_pmic_init_data = &tps65070_regulator_data[0], | |
da1e3680 | 996 | .tps6507x_ts_init_data = &tps6507x_touchscreen_data, |
0bc20bba TF |
997 | }; |
998 | ||
3506f277 | 999 | static struct i2c_board_info __initdata da850_evm_tps65070_info[] = { |
a9eb1f67 SN |
1000 | { |
1001 | I2C_BOARD_INFO("tps6507x", 0x48), | |
0bc20bba | 1002 | .platform_data = &tps_board, |
a9eb1f67 SN |
1003 | }, |
1004 | }; | |
1005 | ||
1006 | static int __init pmic_tps65070_init(void) | |
1007 | { | |
3506f277 BG |
1008 | return i2c_register_board_info(1, da850_evm_tps65070_info, |
1009 | ARRAY_SIZE(da850_evm_tps65070_info)); | |
a9eb1f67 SN |
1010 | } |
1011 | ||
7761ef67 SR |
1012 | static const short da850_evm_lcdc_pins[] = { |
1013 | DA850_GPIO2_8, DA850_GPIO2_15, | |
1014 | -1 | |
1015 | }; | |
1016 | ||
85b8307f SS |
1017 | static const short da850_evm_mii_pins[] = { |
1018 | DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, | |
1019 | DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, | |
1020 | DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, | |
1021 | DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, | |
1022 | DA850_MDIO_D, | |
1023 | -1 | |
1024 | }; | |
1025 | ||
1026 | static const short da850_evm_rmii_pins[] = { | |
1027 | DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, | |
1028 | DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, | |
1029 | DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, | |
1030 | DA850_MDIO_D, | |
1031 | -1 | |
1032 | }; | |
1033 | ||
bae10587 | 1034 | static int __init da850_evm_config_emac(void) |
2206771c C |
1035 | { |
1036 | void __iomem *cfg_chip3_base; | |
1037 | int ret; | |
1038 | u32 val; | |
bae10587 SN |
1039 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
1040 | u8 rmii_en = soc_info->emac_pdata->rmii_en; | |
1041 | ||
1042 | if (!machine_is_davinci_da850_evm()) | |
1043 | return 0; | |
2206771c | 1044 | |
d2de0582 | 1045 | cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); |
2206771c | 1046 | |
2206771c | 1047 | val = __raw_readl(cfg_chip3_base); |
17fadd9a SN |
1048 | |
1049 | if (rmii_en) { | |
2206771c | 1050 | val |= BIT(8); |
85b8307f | 1051 | ret = davinci_cfg_reg_list(da850_evm_rmii_pins); |
17fadd9a SN |
1052 | pr_info("EMAC: RMII PHY configured, MII PHY will not be" |
1053 | " functional\n"); | |
1054 | } else { | |
2206771c | 1055 | val &= ~BIT(8); |
85b8307f | 1056 | ret = davinci_cfg_reg_list(da850_evm_mii_pins); |
17fadd9a SN |
1057 | pr_info("EMAC: MII PHY configured, RMII PHY will not be" |
1058 | " functional\n"); | |
1059 | } | |
1060 | ||
2206771c C |
1061 | if (ret) |
1062 | pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n", | |
1063 | ret); | |
1064 | ||
17fadd9a SN |
1065 | /* configure the CFGCHIP3 register for RMII or MII */ |
1066 | __raw_writel(val, cfg_chip3_base); | |
1067 | ||
2206771c C |
1068 | ret = davinci_cfg_reg(DA850_GPIO2_6); |
1069 | if (ret) | |
1070 | pr_warning("da850_evm_init:GPIO(2,6) mux setup " | |
1071 | "failed\n"); | |
1072 | ||
1073 | ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en"); | |
1074 | if (ret) { | |
1075 | pr_warning("Cannot open GPIO %d\n", | |
1076 | DA850_MII_MDIO_CLKEN_PIN); | |
1077 | return ret; | |
1078 | } | |
1079 | ||
17fadd9a SN |
1080 | /* Enable/Disable MII MDIO clock */ |
1081 | gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en); | |
2206771c | 1082 | |
782f2d78 | 1083 | soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID; |
bae10587 SN |
1084 | |
1085 | ret = da8xx_register_emac(); | |
1086 | if (ret) | |
1087 | pr_warning("da850_evm_init: emac registration failed: %d\n", | |
1088 | ret); | |
1089 | ||
2206771c C |
1090 | return 0; |
1091 | } | |
bae10587 | 1092 | device_initcall(da850_evm_config_emac); |
2206771c | 1093 | |
a941c503 RS |
1094 | /* |
1095 | * The following EDMA channels/slots are not being used by drivers (for | |
1096 | * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence | |
1097 | * they are being reserved for codecs on the DSP side. | |
1098 | */ | |
1099 | static const s16 da850_dma0_rsv_chans[][2] = { | |
1100 | /* (offset, number) */ | |
1101 | { 8, 6}, | |
1102 | {24, 4}, | |
1103 | {30, 2}, | |
1104 | {-1, -1} | |
1105 | }; | |
1106 | ||
1107 | static const s16 da850_dma0_rsv_slots[][2] = { | |
1108 | /* (offset, number) */ | |
1109 | { 8, 6}, | |
1110 | {24, 4}, | |
1111 | {30, 50}, | |
1112 | {-1, -1} | |
1113 | }; | |
1114 | ||
1115 | static const s16 da850_dma1_rsv_chans[][2] = { | |
1116 | /* (offset, number) */ | |
1117 | { 0, 28}, | |
1118 | {30, 2}, | |
1119 | {-1, -1} | |
1120 | }; | |
1121 | ||
1122 | static const s16 da850_dma1_rsv_slots[][2] = { | |
1123 | /* (offset, number) */ | |
1124 | { 0, 28}, | |
1125 | {30, 90}, | |
1126 | {-1, -1} | |
1127 | }; | |
1128 | ||
1129 | static struct edma_rsv_info da850_edma_cc0_rsv = { | |
1130 | .rsv_chans = da850_dma0_rsv_chans, | |
1131 | .rsv_slots = da850_dma0_rsv_slots, | |
1132 | }; | |
1133 | ||
1134 | static struct edma_rsv_info da850_edma_cc1_rsv = { | |
1135 | .rsv_chans = da850_dma1_rsv_chans, | |
1136 | .rsv_slots = da850_dma1_rsv_slots, | |
1137 | }; | |
1138 | ||
1139 | static struct edma_rsv_info *da850_edma_rsv[2] = { | |
1140 | &da850_edma_cc0_rsv, | |
1141 | &da850_edma_cc1_rsv, | |
1142 | }; | |
1143 | ||
28bd2c34 SN |
1144 | #ifdef CONFIG_CPU_FREQ |
1145 | static __init int da850_evm_init_cpufreq(void) | |
1146 | { | |
1147 | switch (system_rev & 0xF) { | |
1148 | case 3: | |
1149 | da850_max_speed = 456000; | |
1150 | break; | |
1151 | case 2: | |
1152 | da850_max_speed = 408000; | |
1153 | break; | |
1154 | case 1: | |
1155 | da850_max_speed = 372000; | |
1156 | break; | |
1157 | } | |
1158 | ||
1159 | return da850_register_cpufreq("pll0_sysclk3"); | |
1160 | } | |
1161 | #else | |
1162 | static __init int da850_evm_init_cpufreq(void) { return 0; } | |
1163 | #endif | |
1164 | ||
1e046d17 MH |
1165 | #if defined(CONFIG_DA850_UI_SD_VIDEO_PORT) |
1166 | ||
1167 | #define TVP5147_CH0 "tvp514x-0" | |
1168 | #define TVP5147_CH1 "tvp514x-1" | |
1169 | ||
1170 | /* VPIF capture configuration */ | |
1171 | static struct tvp514x_platform_data tvp5146_pdata = { | |
1172 | .clk_polarity = 0, | |
1173 | .hs_polarity = 1, | |
1174 | .vs_polarity = 1, | |
1175 | }; | |
1176 | ||
1177 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | |
1178 | ||
1179 | static const struct vpif_input da850_ch0_inputs[] = { | |
1180 | { | |
1181 | .input = { | |
1182 | .index = 0, | |
1183 | .name = "Composite", | |
1184 | .type = V4L2_INPUT_TYPE_CAMERA, | |
7aaad131 | 1185 | .capabilities = V4L2_IN_CAP_STD, |
1e046d17 MH |
1186 | .std = TVP514X_STD_ALL, |
1187 | }, | |
7aaad131 HV |
1188 | .input_route = INPUT_CVBS_VI2B, |
1189 | .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
1e046d17 MH |
1190 | .subdev_name = TVP5147_CH0, |
1191 | }, | |
1192 | }; | |
1193 | ||
1194 | static const struct vpif_input da850_ch1_inputs[] = { | |
1195 | { | |
1196 | .input = { | |
1197 | .index = 0, | |
1198 | .name = "S-Video", | |
1199 | .type = V4L2_INPUT_TYPE_CAMERA, | |
7aaad131 | 1200 | .capabilities = V4L2_IN_CAP_STD, |
1e046d17 MH |
1201 | .std = TVP514X_STD_ALL, |
1202 | }, | |
7aaad131 HV |
1203 | .input_route = INPUT_SVIDEO_VI2C_VI1C, |
1204 | .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
1e046d17 MH |
1205 | .subdev_name = TVP5147_CH1, |
1206 | }, | |
1207 | }; | |
1208 | ||
1209 | static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = { | |
1210 | { | |
1211 | .name = TVP5147_CH0, | |
1212 | .board_info = { | |
1213 | I2C_BOARD_INFO("tvp5146", 0x5d), | |
1214 | .platform_data = &tvp5146_pdata, | |
1215 | }, | |
1e046d17 MH |
1216 | }, |
1217 | { | |
1218 | .name = TVP5147_CH1, | |
1219 | .board_info = { | |
1220 | I2C_BOARD_INFO("tvp5146", 0x5c), | |
1221 | .platform_data = &tvp5146_pdata, | |
1222 | }, | |
1e046d17 MH |
1223 | }, |
1224 | }; | |
1225 | ||
1226 | static struct vpif_capture_config da850_vpif_capture_config = { | |
1227 | .subdev_info = da850_vpif_capture_sdev_info, | |
1228 | .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info), | |
1229 | .chan_config[0] = { | |
1230 | .inputs = da850_ch0_inputs, | |
1231 | .input_count = ARRAY_SIZE(da850_ch0_inputs), | |
0d4f35f3 HV |
1232 | .vpif_if = { |
1233 | .if_type = VPIF_IF_BT656, | |
1234 | .hd_pol = 1, | |
1235 | .vd_pol = 1, | |
1236 | .fid_pol = 0, | |
1237 | }, | |
1e046d17 MH |
1238 | }, |
1239 | .chan_config[1] = { | |
1240 | .inputs = da850_ch1_inputs, | |
1241 | .input_count = ARRAY_SIZE(da850_ch1_inputs), | |
0d4f35f3 HV |
1242 | .vpif_if = { |
1243 | .if_type = VPIF_IF_BT656, | |
1244 | .hd_pol = 1, | |
1245 | .vd_pol = 1, | |
1246 | .fid_pol = 0, | |
1247 | }, | |
1e046d17 MH |
1248 | }, |
1249 | .card_name = "DA850/OMAP-L138 Video Capture", | |
1250 | }; | |
1251 | ||
1252 | /* VPIF display configuration */ | |
1253 | static struct vpif_subdev_info da850_vpif_subdev[] = { | |
1254 | { | |
1255 | .name = "adv7343", | |
1256 | .board_info = { | |
1257 | I2C_BOARD_INFO("adv7343", 0x2a), | |
1258 | }, | |
1259 | }, | |
1260 | }; | |
1261 | ||
1262 | static const char const *vpif_output[] = { | |
1263 | "Composite", | |
1264 | "S-Video", | |
1265 | }; | |
1266 | ||
1267 | static struct vpif_display_config da850_vpif_display_config = { | |
1268 | .subdevinfo = da850_vpif_subdev, | |
1269 | .subdev_count = ARRAY_SIZE(da850_vpif_subdev), | |
1270 | .output = vpif_output, | |
1271 | .output_count = ARRAY_SIZE(vpif_output), | |
1272 | .card_name = "DA850/OMAP-L138 Video Display", | |
1273 | }; | |
1274 | ||
1275 | static __init void da850_vpif_init(void) | |
1276 | { | |
1277 | int ret; | |
1278 | ||
1279 | ret = da850_register_vpif(); | |
1280 | if (ret) | |
1281 | pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret); | |
1282 | ||
1283 | ret = davinci_cfg_reg_list(da850_vpif_capture_pins); | |
1284 | if (ret) | |
1285 | pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n", | |
1286 | ret); | |
1287 | ||
1288 | ret = da850_register_vpif_capture(&da850_vpif_capture_config); | |
1289 | if (ret) | |
1290 | pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret); | |
1291 | ||
1292 | ret = davinci_cfg_reg_list(da850_vpif_display_pins); | |
1293 | if (ret) | |
1294 | pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n", | |
1295 | ret); | |
1296 | ||
1297 | ret = da850_register_vpif_display(&da850_vpif_display_config); | |
1298 | if (ret) | |
1299 | pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret); | |
1300 | } | |
1301 | ||
1302 | #else | |
1303 | static __init void da850_vpif_init(void) {} | |
1304 | #endif | |
1305 | ||
ab3f5c1f IY |
1306 | #ifdef CONFIG_DA850_WL12XX |
1307 | ||
1308 | static void wl12xx_set_power(int index, bool power_on) | |
1309 | { | |
1310 | static bool power_state; | |
1311 | ||
1312 | pr_debug("Powering %s wl12xx", power_on ? "on" : "off"); | |
1313 | ||
1314 | if (power_on == power_state) | |
1315 | return; | |
1316 | power_state = power_on; | |
1317 | ||
1318 | if (power_on) { | |
1319 | /* Power up sequence required for wl127x devices */ | |
1320 | gpio_set_value(DA850_WLAN_EN, 1); | |
1321 | usleep_range(15000, 15000); | |
1322 | gpio_set_value(DA850_WLAN_EN, 0); | |
1323 | usleep_range(1000, 1000); | |
1324 | gpio_set_value(DA850_WLAN_EN, 1); | |
1325 | msleep(70); | |
1326 | } else { | |
1327 | gpio_set_value(DA850_WLAN_EN, 0); | |
1328 | } | |
1329 | } | |
1330 | ||
1331 | static struct davinci_mmc_config da850_wl12xx_mmc_config = { | |
1332 | .set_power = wl12xx_set_power, | |
1333 | .wires = 4, | |
1334 | .max_freq = 25000000, | |
1335 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE | | |
1336 | MMC_CAP_POWER_OFF_CARD, | |
1337 | .version = MMC_CTLR_VERSION_2, | |
1338 | }; | |
1339 | ||
1340 | static const short da850_wl12xx_pins[] __initconst = { | |
1341 | DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2, | |
1342 | DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD, | |
1343 | DA850_GPIO6_9, DA850_GPIO6_10, | |
1344 | -1 | |
1345 | }; | |
1346 | ||
1347 | static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = { | |
1348 | .irq = -1, | |
1349 | .board_ref_clock = WL12XX_REFCLOCK_38, | |
1350 | .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ, | |
1351 | }; | |
1352 | ||
1353 | static __init int da850_wl12xx_init(void) | |
1354 | { | |
1355 | int ret; | |
1356 | ||
1357 | ret = davinci_cfg_reg_list(da850_wl12xx_pins); | |
1358 | if (ret) { | |
1359 | pr_err("wl12xx/mmc mux setup failed: %d\n", ret); | |
1360 | goto exit; | |
1361 | } | |
1362 | ||
1363 | ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config); | |
1364 | if (ret) { | |
1365 | pr_err("wl12xx/mmc registration failed: %d\n", ret); | |
1366 | goto exit; | |
1367 | } | |
1368 | ||
1369 | ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en"); | |
1370 | if (ret) { | |
1371 | pr_err("Could not request wl12xx enable gpio: %d\n", ret); | |
1372 | goto exit; | |
1373 | } | |
1374 | ||
1375 | ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq"); | |
1376 | if (ret) { | |
1377 | pr_err("Could not request wl12xx irq gpio: %d\n", ret); | |
1378 | goto free_wlan_en; | |
1379 | } | |
1380 | ||
1381 | da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ); | |
1382 | ||
1383 | ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data); | |
1384 | if (ret) { | |
1385 | pr_err("Could not set wl12xx data: %d\n", ret); | |
1386 | goto free_wlan_irq; | |
1387 | } | |
1388 | ||
1389 | return 0; | |
1390 | ||
1391 | free_wlan_irq: | |
1392 | gpio_free(DA850_WLAN_IRQ); | |
1393 | ||
1394 | free_wlan_en: | |
1395 | gpio_free(DA850_WLAN_EN); | |
1396 | ||
1397 | exit: | |
1398 | return ret; | |
1399 | } | |
1400 | ||
1401 | #else /* CONFIG_DA850_WL12XX */ | |
1402 | ||
1403 | static __init int da850_wl12xx_init(void) | |
1404 | { | |
1405 | return 0; | |
1406 | } | |
1407 | ||
1408 | #endif /* CONFIG_DA850_WL12XX */ | |
1409 | ||
8bb2c481 SN |
1410 | #define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) |
1411 | ||
0fbc5592 SR |
1412 | static __init void da850_evm_init(void) |
1413 | { | |
1414 | int ret; | |
1415 | ||
a9eb1f67 SN |
1416 | ret = pmic_tps65070_init(); |
1417 | if (ret) | |
1418 | pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n", | |
1419 | ret); | |
1420 | ||
a941c503 | 1421 | ret = da850_register_edma(da850_edma_rsv); |
0fbc5592 SR |
1422 | if (ret) |
1423 | pr_warning("da850_evm_init: edma registration failed: %d\n", | |
1424 | ret); | |
1425 | ||
3821d10a | 1426 | ret = davinci_cfg_reg_list(da850_i2c0_pins); |
0fbc5592 SR |
1427 | if (ret) |
1428 | pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n", | |
1429 | ret); | |
1430 | ||
1431 | ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata); | |
1432 | if (ret) | |
1433 | pr_warning("da850_evm_init: i2c0 registration failed: %d\n", | |
1434 | ret); | |
1435 | ||
5a4b1315 | 1436 | |
0fbc5592 SR |
1437 | ret = da8xx_register_watchdog(); |
1438 | if (ret) | |
1439 | pr_warning("da830_evm_init: watchdog registration failed: %d\n", | |
1440 | ret); | |
1441 | ||
820c4fe3 | 1442 | if (HAS_MMC) { |
5a0d80ea | 1443 | ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins); |
820c4fe3 SR |
1444 | if (ret) |
1445 | pr_warning("da850_evm_init: mmcsd0 mux setup failed:" | |
1446 | " %d\n", ret); | |
1447 | ||
1448 | ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n"); | |
1449 | if (ret) | |
1450 | pr_warning("da850_evm_init: can not open GPIO %d\n", | |
1451 | DA850_MMCSD_CD_PIN); | |
1452 | gpio_direction_input(DA850_MMCSD_CD_PIN); | |
1453 | ||
1454 | ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n"); | |
1455 | if (ret) | |
1456 | pr_warning("da850_evm_init: can not open GPIO %d\n", | |
1457 | DA850_MMCSD_WP_PIN); | |
1458 | gpio_direction_input(DA850_MMCSD_WP_PIN); | |
1459 | ||
1460 | ret = da8xx_register_mmcsd0(&da850_mmc_config); | |
1461 | if (ret) | |
1462 | pr_warning("da850_evm_init: mmcsd0 registration failed:" | |
1463 | " %d\n", ret); | |
ab3f5c1f IY |
1464 | |
1465 | ret = da850_wl12xx_init(); | |
1466 | if (ret) | |
1467 | pr_warning("da850_evm_init: wl12xx initialization" | |
1468 | " failed: %d\n", ret); | |
820c4fe3 | 1469 | } |
700691f2 | 1470 | |
0fbc5592 SR |
1471 | davinci_serial_init(&da850_evm_uart_config); |
1472 | ||
1a7ff8ff C |
1473 | i2c_register_board_info(1, da850_evm_i2c_devices, |
1474 | ARRAY_SIZE(da850_evm_i2c_devices)); | |
1475 | ||
0fbc5592 SR |
1476 | /* |
1477 | * shut down uart 0 and 1; they are not used on the board and | |
1478 | * accessing them causes endless "too much work in irq53" messages | |
1479 | * with arago fs | |
1480 | */ | |
1481 | __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); | |
1482 | __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); | |
491214e1 | 1483 | |
c840fc74 | 1484 | ret = davinci_cfg_reg_list(da850_evm_mcasp_pins); |
491214e1 C |
1485 | if (ret) |
1486 | pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", | |
1487 | ret); | |
1488 | ||
b8864aa4 | 1489 | da8xx_register_mcasp(0, &da850_evm_snd_data); |
5cbdf276 | 1490 | |
3821d10a | 1491 | ret = davinci_cfg_reg_list(da850_lcdcntl_pins); |
5cbdf276 SR |
1492 | if (ret) |
1493 | pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", | |
1494 | ret); | |
1495 | ||
7761ef67 | 1496 | /* Handle board specific muxing for LCD here */ |
3821d10a | 1497 | ret = davinci_cfg_reg_list(da850_evm_lcdc_pins); |
7761ef67 SR |
1498 | if (ret) |
1499 | pr_warning("da850_evm_init: evm specific lcd mux setup " | |
1500 | "failed: %d\n", ret); | |
1501 | ||
5cbdf276 SR |
1502 | ret = da850_lcd_hw_init(); |
1503 | if (ret) | |
1504 | pr_warning("da850_evm_init: lcd initialization failed: %d\n", | |
1505 | ret); | |
1506 | ||
d52f235f | 1507 | sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl, |
b9e6342b | 1508 | ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata); |
5cbdf276 SR |
1509 | if (ret) |
1510 | pr_warning("da850_evm_init: lcdc registration failed: %d\n", | |
1511 | ret); | |
c51df70b MG |
1512 | |
1513 | ret = da8xx_register_rtc(); | |
1514 | if (ret) | |
1515 | pr_warning("da850_evm_init: rtc setup failed: %d\n", ret); | |
09dc2d45 | 1516 | |
28bd2c34 | 1517 | ret = da850_evm_init_cpufreq(); |
09dc2d45 SN |
1518 | if (ret) |
1519 | pr_warning("da850_evm_init: cpufreq registration failed: %d\n", | |
1520 | ret); | |
5aeb15aa SN |
1521 | |
1522 | ret = da8xx_register_cpuidle(); | |
1523 | if (ret) | |
1524 | pr_warning("da850_evm_init: cpuidle registration failed: %d\n", | |
1525 | ret); | |
63534443 SN |
1526 | |
1527 | ret = da850_register_pm(&da850_pm_device); | |
1528 | if (ret) | |
1529 | pr_warning("da850_evm_init: suspend registration failed: %d\n", | |
1530 | ret); | |
fdce5568 | 1531 | |
1e046d17 MH |
1532 | da850_vpif_init(); |
1533 | ||
fdce5568 SN |
1534 | ret = da8xx_register_spi(1, da850evm_spi_info, |
1535 | ARRAY_SIZE(da850evm_spi_info)); | |
1536 | if (ret) | |
1537 | pr_warning("da850_evm_init: spi 1 registration failed: %d\n", | |
1538 | ret); | |
8bb2c481 SN |
1539 | |
1540 | ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE); | |
1541 | if (ret) | |
1542 | pr_warning("da850_evm_init: sata registration failed: %d\n", | |
1543 | ret); | |
810198bc RS |
1544 | |
1545 | da850_evm_setup_mac_addr(); | |
0fbc5592 SR |
1546 | } |
1547 | ||
1548 | #ifdef CONFIG_SERIAL_8250_CONSOLE | |
1549 | static int __init da850_evm_console_init(void) | |
1550 | { | |
1aa5f2a9 MW |
1551 | if (!machine_is_davinci_da850_evm()) |
1552 | return 0; | |
1553 | ||
0fbc5592 SR |
1554 | return add_preferred_console("ttyS", 2, "115200"); |
1555 | } | |
1556 | console_initcall(da850_evm_console_init); | |
1557 | #endif | |
1558 | ||
0fbc5592 SR |
1559 | static void __init da850_evm_map_io(void) |
1560 | { | |
1561 | da850_init(); | |
1562 | } | |
1563 | ||
48ea89ea | 1564 | MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM") |
e7e56014 | 1565 | .atag_offset = 0x100, |
0fbc5592 | 1566 | .map_io = da850_evm_map_io, |
bd808947 | 1567 | .init_irq = cp_intc_init, |
0fbc5592 SR |
1568 | .timer = &davinci_timer, |
1569 | .init_machine = da850_evm_init, | |
3aa3e840 | 1570 | .init_late = davinci_init_late, |
f68deabf | 1571 | .dma_zone_size = SZ_128M, |
c6121ddd | 1572 | .restart = da8xx_restart, |
0fbc5592 | 1573 | MACHINE_END |