Commit | Line | Data |
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0fbc5592 SR |
1 | /* |
2 | * TI DA850/OMAP-L138 EVM board | |
3 | * | |
4 | * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * Derived from: arch/arm/mach-davinci/board-da830-evm.c | |
7 | * Original Copyrights follow: | |
8 | * | |
9 | * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under | |
10 | * the terms of the GNU General Public License version 2. This program | |
11 | * is licensed "as is" without any warranty of any kind, whether express | |
12 | * or implied. | |
13 | */ | |
0fbc5592 | 14 | #include <linux/console.h> |
6809084a MP |
15 | #include <linux/delay.h> |
16 | #include <linux/gpio.h> | |
17 | #include <linux/gpio_keys.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
0fbc5592 SR |
20 | #include <linux/i2c.h> |
21 | #include <linux/i2c/at24.h> | |
75e2ea64 | 22 | #include <linux/i2c/pca953x.h> |
75929f5e | 23 | #include <linux/input.h> |
6809084a | 24 | #include <linux/input/tps6507x-ts.h> |
0bc20bba | 25 | #include <linux/mfd/tps6507x.h> |
38beb929 SR |
26 | #include <linux/mtd/mtd.h> |
27 | #include <linux/mtd/nand.h> | |
28 | #include <linux/mtd/partitions.h> | |
7c5ec609 | 29 | #include <linux/mtd/physmap.h> |
6809084a MP |
30 | #include <linux/platform_device.h> |
31 | #include <linux/platform_data/mtd-davinci.h> | |
32 | #include <linux/platform_data/mtd-davinci-aemif.h> | |
33 | #include <linux/platform_data/spi-davinci.h> | |
ae41d17a | 34 | #include <linux/platform_data/uio_pruss.h> |
a9eb1f67 | 35 | #include <linux/regulator/machine.h> |
8b24599e | 36 | #include <linux/regulator/tps6507x.h> |
fdce5568 SN |
37 | #include <linux/spi/spi.h> |
38 | #include <linux/spi/flash.h> | |
ab3f5c1f | 39 | #include <linux/wl12xx.h> |
0fbc5592 | 40 | |
0fbc5592 SR |
41 | #include <mach/cp_intc.h> |
42 | #include <mach/da8xx.h> | |
7761ef67 | 43 | #include <mach/mux.h> |
6a2461a4 | 44 | #include <mach/sram.h> |
6809084a MP |
45 | |
46 | #include <asm/mach-types.h> | |
47 | #include <asm/mach/arch.h> | |
48 | #include <asm/system_info.h> | |
0fbc5592 | 49 | |
1e046d17 | 50 | #include <media/tvp514x.h> |
2bd4e58c | 51 | #include <media/adv7343.h> |
1e046d17 | 52 | |
f6f97588 | 53 | #define DA850_EVM_PHY_ID "davinci_mdio-0:00" |
7761ef67 | 54 | #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) |
5cbdf276 | 55 | #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) |
5cbdf276 | 56 | |
700691f2 SR |
57 | #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) |
58 | #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) | |
59 | ||
ab3f5c1f IY |
60 | #define DA850_WLAN_EN GPIO_TO_PIN(6, 9) |
61 | #define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10) | |
62 | ||
2206771c C |
63 | #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) |
64 | ||
fdce5568 SN |
65 | static struct mtd_partition da850evm_spiflash_part[] = { |
66 | [0] = { | |
67 | .name = "UBL", | |
68 | .offset = 0, | |
69 | .size = SZ_64K, | |
70 | .mask_flags = MTD_WRITEABLE, | |
71 | }, | |
72 | [1] = { | |
73 | .name = "U-Boot", | |
74 | .offset = MTDPART_OFS_APPEND, | |
75 | .size = SZ_512K, | |
76 | .mask_flags = MTD_WRITEABLE, | |
77 | }, | |
78 | [2] = { | |
79 | .name = "U-Boot-Env", | |
80 | .offset = MTDPART_OFS_APPEND, | |
81 | .size = SZ_64K, | |
82 | .mask_flags = MTD_WRITEABLE, | |
83 | }, | |
84 | [3] = { | |
85 | .name = "Kernel", | |
86 | .offset = MTDPART_OFS_APPEND, | |
87 | .size = SZ_2M + SZ_512K, | |
88 | .mask_flags = 0, | |
89 | }, | |
90 | [4] = { | |
91 | .name = "Filesystem", | |
92 | .offset = MTDPART_OFS_APPEND, | |
93 | .size = SZ_4M, | |
94 | .mask_flags = 0, | |
95 | }, | |
96 | [5] = { | |
97 | .name = "MAC-Address", | |
98 | .offset = SZ_8M - SZ_64K, | |
99 | .size = SZ_64K, | |
100 | .mask_flags = MTD_WRITEABLE, | |
101 | }, | |
102 | }; | |
103 | ||
104 | static struct flash_platform_data da850evm_spiflash_data = { | |
105 | .name = "m25p80", | |
106 | .parts = da850evm_spiflash_part, | |
107 | .nr_parts = ARRAY_SIZE(da850evm_spiflash_part), | |
108 | .type = "m25p64", | |
109 | }; | |
110 | ||
111 | static struct davinci_spi_config da850evm_spiflash_cfg = { | |
112 | .io_type = SPI_IO_TYPE_DMA, | |
113 | .c2tdelay = 8, | |
114 | .t2cdelay = 8, | |
115 | }; | |
116 | ||
117 | static struct spi_board_info da850evm_spi_info[] = { | |
118 | { | |
119 | .modalias = "m25p80", | |
120 | .platform_data = &da850evm_spiflash_data, | |
121 | .controller_data = &da850evm_spiflash_cfg, | |
122 | .mode = SPI_MODE_0, | |
123 | .max_speed_hz = 30000000, | |
124 | .bus_num = 1, | |
125 | .chip_select = 0, | |
126 | }, | |
127 | }; | |
128 | ||
810198bc RS |
129 | #ifdef CONFIG_MTD |
130 | static void da850_evm_m25p80_notify_add(struct mtd_info *mtd) | |
131 | { | |
132 | char *mac_addr = davinci_soc_info.emac_pdata->mac_addr; | |
133 | size_t retlen; | |
134 | ||
135 | if (!strcmp(mtd->name, "MAC-Address")) { | |
329ad399 | 136 | mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr); |
810198bc RS |
137 | if (retlen == ETH_ALEN) |
138 | pr_info("Read MAC addr from SPI Flash: %pM\n", | |
139 | mac_addr); | |
140 | } | |
141 | } | |
142 | ||
143 | static struct mtd_notifier da850evm_spi_notifier = { | |
144 | .add = da850_evm_m25p80_notify_add, | |
145 | }; | |
146 | ||
147 | static void da850_evm_setup_mac_addr(void) | |
148 | { | |
149 | register_mtd_user(&da850evm_spi_notifier); | |
150 | } | |
151 | #else | |
152 | static void da850_evm_setup_mac_addr(void) { } | |
153 | #endif | |
154 | ||
7c5ec609 SR |
155 | static struct mtd_partition da850_evm_norflash_partition[] = { |
156 | { | |
e2abd5a2 | 157 | .name = "bootloaders + env", |
7c5ec609 | 158 | .offset = 0, |
e2abd5a2 SR |
159 | .size = SZ_512K, |
160 | .mask_flags = MTD_WRITEABLE, | |
161 | }, | |
162 | { | |
163 | .name = "kernel", | |
164 | .offset = MTDPART_OFS_APPEND, | |
165 | .size = SZ_2M, | |
166 | .mask_flags = 0, | |
167 | }, | |
168 | { | |
169 | .name = "filesystem", | |
170 | .offset = MTDPART_OFS_APPEND, | |
7c5ec609 SR |
171 | .size = MTDPART_SIZ_FULL, |
172 | .mask_flags = 0, | |
173 | }, | |
174 | }; | |
175 | ||
176 | static struct physmap_flash_data da850_evm_norflash_data = { | |
177 | .width = 2, | |
178 | .parts = da850_evm_norflash_partition, | |
179 | .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), | |
180 | }; | |
181 | ||
182 | static struct resource da850_evm_norflash_resource[] = { | |
183 | { | |
184 | .start = DA8XX_AEMIF_CS2_BASE, | |
185 | .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, | |
186 | .flags = IORESOURCE_MEM, | |
187 | }, | |
188 | }; | |
189 | ||
190 | static struct platform_device da850_evm_norflash_device = { | |
191 | .name = "physmap-flash", | |
192 | .id = 0, | |
193 | .dev = { | |
194 | .platform_data = &da850_evm_norflash_data, | |
195 | }, | |
196 | .num_resources = 1, | |
197 | .resource = da850_evm_norflash_resource, | |
198 | }; | |
199 | ||
63534443 SN |
200 | static struct davinci_pm_config da850_pm_pdata = { |
201 | .sleepcount = 128, | |
202 | }; | |
203 | ||
204 | static struct platform_device da850_pm_device = { | |
205 | .name = "pm-davinci", | |
206 | .dev = { | |
207 | .platform_data = &da850_pm_pdata, | |
208 | }, | |
209 | .id = -1, | |
210 | }; | |
211 | ||
38beb929 SR |
212 | /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash |
213 | * (128K blocks). It may be used instead of the (default) SPI flash | |
214 | * to boot, using TI's tools to install the secondary boot loader | |
215 | * (UBL) and U-Boot. | |
216 | */ | |
db549d22 | 217 | static struct mtd_partition da850_evm_nandflash_partition[] = { |
38beb929 SR |
218 | { |
219 | .name = "u-boot env", | |
220 | .offset = 0, | |
221 | .size = SZ_128K, | |
222 | .mask_flags = MTD_WRITEABLE, | |
223 | }, | |
224 | { | |
225 | .name = "UBL", | |
226 | .offset = MTDPART_OFS_APPEND, | |
227 | .size = SZ_128K, | |
228 | .mask_flags = MTD_WRITEABLE, | |
229 | }, | |
230 | { | |
231 | .name = "u-boot", | |
232 | .offset = MTDPART_OFS_APPEND, | |
233 | .size = 4 * SZ_128K, | |
234 | .mask_flags = MTD_WRITEABLE, | |
235 | }, | |
236 | { | |
237 | .name = "kernel", | |
238 | .offset = 0x200000, | |
239 | .size = SZ_2M, | |
240 | .mask_flags = 0, | |
241 | }, | |
242 | { | |
243 | .name = "filesystem", | |
244 | .offset = MTDPART_OFS_APPEND, | |
245 | .size = MTDPART_SIZ_FULL, | |
246 | .mask_flags = 0, | |
247 | }, | |
248 | }; | |
249 | ||
18a8505c SN |
250 | static struct davinci_aemif_timing da850_evm_nandflash_timing = { |
251 | .wsetup = 24, | |
252 | .wstrobe = 21, | |
253 | .whold = 14, | |
254 | .rsetup = 19, | |
255 | .rstrobe = 50, | |
256 | .rhold = 0, | |
257 | .ta = 20, | |
258 | }; | |
259 | ||
38beb929 SR |
260 | static struct davinci_nand_pdata da850_evm_nandflash_data = { |
261 | .parts = da850_evm_nandflash_partition, | |
262 | .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), | |
263 | .ecc_mode = NAND_ECC_HW, | |
fc42e335 | 264 | .ecc_bits = 4, |
bb9ebd4e | 265 | .bbt_options = NAND_BBT_USE_FLASH, |
18a8505c | 266 | .timing = &da850_evm_nandflash_timing, |
38beb929 SR |
267 | }; |
268 | ||
269 | static struct resource da850_evm_nandflash_resource[] = { | |
270 | { | |
271 | .start = DA8XX_AEMIF_CS3_BASE, | |
272 | .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, | |
273 | .flags = IORESOURCE_MEM, | |
274 | }, | |
275 | { | |
276 | .start = DA8XX_AEMIF_CTL_BASE, | |
277 | .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, | |
278 | .flags = IORESOURCE_MEM, | |
279 | }, | |
280 | }; | |
281 | ||
282 | static struct platform_device da850_evm_nandflash_device = { | |
283 | .name = "davinci_nand", | |
284 | .id = 1, | |
285 | .dev = { | |
286 | .platform_data = &da850_evm_nandflash_data, | |
287 | }, | |
288 | .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), | |
289 | .resource = da850_evm_nandflash_resource, | |
290 | }; | |
291 | ||
59858b71 | 292 | static struct platform_device *da850_evm_devices[] = { |
039c5ee3 SR |
293 | &da850_evm_nandflash_device, |
294 | &da850_evm_norflash_device, | |
295 | }; | |
296 | ||
297 | #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 | |
298 | #define DA8XX_AEMIF_ASIZE_16BIT 0x1 | |
299 | ||
300 | static void __init da850_evm_init_nor(void) | |
301 | { | |
302 | void __iomem *aemif_addr; | |
303 | ||
304 | aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); | |
305 | ||
306 | /* Configure data bus width of CS2 to 16 bit */ | |
307 | writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | | |
308 | DA8XX_AEMIF_ASIZE_16BIT, | |
309 | aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); | |
310 | ||
311 | iounmap(aemif_addr); | |
312 | } | |
313 | ||
f48ecc2f SS |
314 | static const short da850_evm_nand_pins[] = { |
315 | DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, | |
316 | DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, | |
317 | DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, | |
318 | DA850_NEMA_WE, DA850_NEMA_OE, | |
319 | -1 | |
320 | }; | |
321 | ||
322 | static const short da850_evm_nor_pins[] = { | |
323 | DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, | |
324 | DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, | |
325 | DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, | |
326 | DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, | |
327 | DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, | |
328 | DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, | |
329 | DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, | |
330 | DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, | |
331 | DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, | |
332 | DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, | |
333 | DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, | |
334 | DA850_EMA_A_22, DA850_EMA_A_23, | |
335 | -1 | |
336 | }; | |
337 | ||
039c5ee3 SR |
338 | #if defined(CONFIG_MMC_DAVINCI) || \ |
339 | defined(CONFIG_MMC_DAVINCI_MODULE) | |
340 | #define HAS_MMC 1 | |
341 | #else | |
342 | #define HAS_MMC 0 | |
343 | #endif | |
344 | ||
f48ecc2f | 345 | static inline void da850_evm_setup_nor_nand(void) |
039c5ee3 SR |
346 | { |
347 | int ret = 0; | |
348 | ||
b688c2fb | 349 | if (!HAS_MMC) { |
f48ecc2f | 350 | ret = davinci_cfg_reg_list(da850_evm_nand_pins); |
039c5ee3 | 351 | if (ret) |
6c7c23cc RT |
352 | pr_warn("%s: NAND mux setup failed: %d\n", |
353 | __func__, ret); | |
039c5ee3 | 354 | |
f48ecc2f | 355 | ret = davinci_cfg_reg_list(da850_evm_nor_pins); |
039c5ee3 | 356 | if (ret) |
6c7c23cc RT |
357 | pr_warn("%s: NOR mux setup failed: %d\n", |
358 | __func__, ret); | |
039c5ee3 SR |
359 | |
360 | da850_evm_init_nor(); | |
361 | ||
362 | platform_add_devices(da850_evm_devices, | |
363 | ARRAY_SIZE(da850_evm_devices)); | |
364 | } | |
365 | } | |
75e2ea64 | 366 | |
bae10587 SN |
367 | #ifdef CONFIG_DA850_UI_RMII |
368 | static inline void da850_evm_setup_emac_rmii(int rmii_sel) | |
369 | { | |
370 | struct davinci_soc_info *soc_info = &davinci_soc_info; | |
371 | ||
372 | soc_info->emac_pdata->rmii_en = 1; | |
47e7cb14 | 373 | gpio_set_value_cansleep(rmii_sel, 0); |
bae10587 SN |
374 | } |
375 | #else | |
376 | static inline void da850_evm_setup_emac_rmii(int rmii_sel) { } | |
377 | #endif | |
378 | ||
75929f5e BG |
379 | |
380 | #define DA850_KEYS_DEBOUNCE_MS 10 | |
381 | /* | |
382 | * At 200ms polling interval it is possible to miss an | |
383 | * event by tapping very lightly on the push button but most | |
384 | * pushes do result in an event; longer intervals require the | |
385 | * user to hold the button whereas shorter intervals require | |
386 | * more CPU time for polling. | |
387 | */ | |
388 | #define DA850_GPIO_KEYS_POLL_MS 200 | |
389 | ||
390 | enum da850_evm_ui_exp_pins { | |
391 | DA850_EVM_UI_EXP_SEL_C = 5, | |
392 | DA850_EVM_UI_EXP_SEL_B, | |
393 | DA850_EVM_UI_EXP_SEL_A, | |
394 | DA850_EVM_UI_EXP_PB8, | |
395 | DA850_EVM_UI_EXP_PB7, | |
396 | DA850_EVM_UI_EXP_PB6, | |
397 | DA850_EVM_UI_EXP_PB5, | |
398 | DA850_EVM_UI_EXP_PB4, | |
399 | DA850_EVM_UI_EXP_PB3, | |
400 | DA850_EVM_UI_EXP_PB2, | |
401 | DA850_EVM_UI_EXP_PB1, | |
402 | }; | |
403 | ||
404 | static const char const *da850_evm_ui_exp[] = { | |
405 | [DA850_EVM_UI_EXP_SEL_C] = "sel_c", | |
406 | [DA850_EVM_UI_EXP_SEL_B] = "sel_b", | |
407 | [DA850_EVM_UI_EXP_SEL_A] = "sel_a", | |
408 | [DA850_EVM_UI_EXP_PB8] = "pb8", | |
409 | [DA850_EVM_UI_EXP_PB7] = "pb7", | |
410 | [DA850_EVM_UI_EXP_PB6] = "pb6", | |
411 | [DA850_EVM_UI_EXP_PB5] = "pb5", | |
412 | [DA850_EVM_UI_EXP_PB4] = "pb4", | |
413 | [DA850_EVM_UI_EXP_PB3] = "pb3", | |
414 | [DA850_EVM_UI_EXP_PB2] = "pb2", | |
415 | [DA850_EVM_UI_EXP_PB1] = "pb1", | |
416 | }; | |
417 | ||
418 | #define DA850_N_UI_PB 8 | |
419 | ||
420 | static struct gpio_keys_button da850_evm_ui_keys[] = { | |
421 | [0 ... DA850_N_UI_PB - 1] = { | |
422 | .type = EV_KEY, | |
423 | .active_low = 1, | |
424 | .wakeup = 0, | |
425 | .debounce_interval = DA850_KEYS_DEBOUNCE_MS, | |
426 | .code = -1, /* assigned at runtime */ | |
427 | .gpio = -1, /* assigned at runtime */ | |
428 | .desc = NULL, /* assigned at runtime */ | |
429 | }, | |
430 | }; | |
431 | ||
432 | static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = { | |
433 | .buttons = da850_evm_ui_keys, | |
434 | .nbuttons = ARRAY_SIZE(da850_evm_ui_keys), | |
435 | .poll_interval = DA850_GPIO_KEYS_POLL_MS, | |
436 | }; | |
437 | ||
438 | static struct platform_device da850_evm_ui_keys_device = { | |
439 | .name = "gpio-keys-polled", | |
440 | .id = 0, | |
441 | .dev = { | |
442 | .platform_data = &da850_evm_ui_keys_pdata | |
443 | }, | |
444 | }; | |
445 | ||
446 | static void da850_evm_ui_keys_init(unsigned gpio) | |
447 | { | |
448 | int i; | |
449 | struct gpio_keys_button *button; | |
450 | ||
451 | for (i = 0; i < DA850_N_UI_PB; i++) { | |
452 | button = &da850_evm_ui_keys[i]; | |
453 | button->code = KEY_F8 - i; | |
454 | button->desc = (char *) | |
455 | da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i]; | |
456 | button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i; | |
457 | } | |
458 | } | |
459 | ||
1e046d17 MH |
460 | #ifdef CONFIG_DA850_UI_SD_VIDEO_PORT |
461 | static inline void da850_evm_setup_video_port(int video_sel) | |
462 | { | |
463 | gpio_set_value_cansleep(video_sel, 0); | |
464 | } | |
465 | #else | |
466 | static inline void da850_evm_setup_video_port(int video_sel) { } | |
467 | #endif | |
468 | ||
75e2ea64 C |
469 | static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, |
470 | unsigned ngpio, void *c) | |
471 | { | |
472 | int sel_a, sel_b, sel_c, ret; | |
473 | ||
53c2897d BG |
474 | sel_a = gpio + DA850_EVM_UI_EXP_SEL_A; |
475 | sel_b = gpio + DA850_EVM_UI_EXP_SEL_B; | |
476 | sel_c = gpio + DA850_EVM_UI_EXP_SEL_C; | |
75e2ea64 | 477 | |
53c2897d | 478 | ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]); |
75e2ea64 | 479 | if (ret) { |
6c7c23cc | 480 | pr_warn("Cannot open UI expander pin %d\n", sel_a); |
75e2ea64 C |
481 | goto exp_setup_sela_fail; |
482 | } | |
483 | ||
53c2897d | 484 | ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]); |
75e2ea64 | 485 | if (ret) { |
6c7c23cc | 486 | pr_warn("Cannot open UI expander pin %d\n", sel_b); |
75e2ea64 C |
487 | goto exp_setup_selb_fail; |
488 | } | |
489 | ||
53c2897d | 490 | ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]); |
75e2ea64 | 491 | if (ret) { |
6c7c23cc | 492 | pr_warn("Cannot open UI expander pin %d\n", sel_c); |
75e2ea64 C |
493 | goto exp_setup_selc_fail; |
494 | } | |
495 | ||
496 | /* deselect all functionalities */ | |
497 | gpio_direction_output(sel_a, 1); | |
498 | gpio_direction_output(sel_b, 1); | |
499 | gpio_direction_output(sel_c, 1); | |
500 | ||
75929f5e BG |
501 | da850_evm_ui_keys_init(gpio); |
502 | ret = platform_device_register(&da850_evm_ui_keys_device); | |
503 | if (ret) { | |
6c7c23cc | 504 | pr_warn("Could not register UI GPIO expander push-buttons"); |
75929f5e BG |
505 | goto exp_setup_keys_fail; |
506 | } | |
507 | ||
75e2ea64 C |
508 | pr_info("DA850/OMAP-L138 EVM UI card detected\n"); |
509 | ||
510 | da850_evm_setup_nor_nand(); | |
511 | ||
bae10587 | 512 | da850_evm_setup_emac_rmii(sel_a); |
2206771c | 513 | |
1e046d17 MH |
514 | da850_evm_setup_video_port(sel_c); |
515 | ||
75e2ea64 C |
516 | return 0; |
517 | ||
75929f5e BG |
518 | exp_setup_keys_fail: |
519 | gpio_free(sel_c); | |
75e2ea64 C |
520 | exp_setup_selc_fail: |
521 | gpio_free(sel_b); | |
522 | exp_setup_selb_fail: | |
523 | gpio_free(sel_a); | |
524 | exp_setup_sela_fail: | |
525 | return ret; | |
526 | } | |
527 | ||
528 | static int da850_evm_ui_expander_teardown(struct i2c_client *client, | |
529 | unsigned gpio, unsigned ngpio, void *c) | |
530 | { | |
75929f5e BG |
531 | platform_device_unregister(&da850_evm_ui_keys_device); |
532 | ||
75e2ea64 | 533 | /* deselect all functionalities */ |
53c2897d BG |
534 | gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1); |
535 | gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1); | |
536 | gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1); | |
75e2ea64 | 537 | |
53c2897d BG |
538 | gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C); |
539 | gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B); | |
540 | gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A); | |
75e2ea64 C |
541 | |
542 | return 0; | |
543 | } | |
544 | ||
70b30939 BG |
545 | /* assign the baseboard expander's GPIOs after the UI board's */ |
546 | #define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp) | |
547 | #define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS) | |
548 | ||
549 | enum da850_evm_bb_exp_pins { | |
550 | DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0, | |
551 | DA850_EVM_BB_EXP_SW_RST, | |
552 | DA850_EVM_BB_EXP_TP_23, | |
553 | DA850_EVM_BB_EXP_TP_22, | |
554 | DA850_EVM_BB_EXP_TP_21, | |
555 | DA850_EVM_BB_EXP_USER_PB1, | |
556 | DA850_EVM_BB_EXP_USER_LED2, | |
557 | DA850_EVM_BB_EXP_USER_LED1, | |
558 | DA850_EVM_BB_EXP_USER_SW1, | |
559 | DA850_EVM_BB_EXP_USER_SW2, | |
560 | DA850_EVM_BB_EXP_USER_SW3, | |
561 | DA850_EVM_BB_EXP_USER_SW4, | |
562 | DA850_EVM_BB_EXP_USER_SW5, | |
563 | DA850_EVM_BB_EXP_USER_SW6, | |
564 | DA850_EVM_BB_EXP_USER_SW7, | |
565 | DA850_EVM_BB_EXP_USER_SW8 | |
566 | }; | |
567 | ||
568 | static const char const *da850_evm_bb_exp[] = { | |
569 | [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en", | |
570 | [DA850_EVM_BB_EXP_SW_RST] = "sw_rst", | |
571 | [DA850_EVM_BB_EXP_TP_23] = "tp_23", | |
572 | [DA850_EVM_BB_EXP_TP_22] = "tp_22", | |
573 | [DA850_EVM_BB_EXP_TP_21] = "tp_21", | |
574 | [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1", | |
575 | [DA850_EVM_BB_EXP_USER_LED2] = "user_led2", | |
576 | [DA850_EVM_BB_EXP_USER_LED1] = "user_led1", | |
577 | [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1", | |
578 | [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2", | |
579 | [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3", | |
580 | [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4", | |
581 | [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5", | |
582 | [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6", | |
583 | [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7", | |
584 | [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8", | |
585 | }; | |
586 | ||
587 | #define DA850_N_BB_USER_SW 8 | |
588 | ||
589 | static struct gpio_keys_button da850_evm_bb_keys[] = { | |
590 | [0] = { | |
591 | .type = EV_KEY, | |
592 | .active_low = 1, | |
593 | .wakeup = 0, | |
594 | .debounce_interval = DA850_KEYS_DEBOUNCE_MS, | |
595 | .code = KEY_PROG1, | |
596 | .desc = NULL, /* assigned at runtime */ | |
597 | .gpio = -1, /* assigned at runtime */ | |
598 | }, | |
599 | [1 ... DA850_N_BB_USER_SW] = { | |
600 | .type = EV_SW, | |
601 | .active_low = 1, | |
602 | .wakeup = 0, | |
603 | .debounce_interval = DA850_KEYS_DEBOUNCE_MS, | |
604 | .code = -1, /* assigned at runtime */ | |
605 | .desc = NULL, /* assigned at runtime */ | |
606 | .gpio = -1, /* assigned at runtime */ | |
607 | }, | |
608 | }; | |
609 | ||
610 | static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = { | |
611 | .buttons = da850_evm_bb_keys, | |
612 | .nbuttons = ARRAY_SIZE(da850_evm_bb_keys), | |
613 | .poll_interval = DA850_GPIO_KEYS_POLL_MS, | |
614 | }; | |
615 | ||
616 | static struct platform_device da850_evm_bb_keys_device = { | |
617 | .name = "gpio-keys-polled", | |
618 | .id = 1, | |
619 | .dev = { | |
620 | .platform_data = &da850_evm_bb_keys_pdata | |
621 | }, | |
622 | }; | |
623 | ||
624 | static void da850_evm_bb_keys_init(unsigned gpio) | |
625 | { | |
626 | int i; | |
627 | struct gpio_keys_button *button; | |
628 | ||
629 | button = &da850_evm_bb_keys[0]; | |
630 | button->desc = (char *) | |
631 | da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1]; | |
632 | button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1; | |
633 | ||
634 | for (i = 0; i < DA850_N_BB_USER_SW; i++) { | |
635 | button = &da850_evm_bb_keys[i + 1]; | |
636 | button->code = SW_LID + i; | |
637 | button->desc = (char *) | |
638 | da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i]; | |
639 | button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i; | |
640 | } | |
641 | } | |
642 | ||
643 | #define DA850_N_BB_USER_LED 2 | |
644 | ||
645 | static struct gpio_led da850_evm_bb_leds[] = { | |
646 | [0 ... DA850_N_BB_USER_LED - 1] = { | |
647 | .active_low = 1, | |
648 | .gpio = -1, /* assigned at runtime */ | |
649 | .name = NULL, /* assigned at runtime */ | |
650 | }, | |
651 | }; | |
652 | ||
653 | static struct gpio_led_platform_data da850_evm_bb_leds_pdata = { | |
654 | .leds = da850_evm_bb_leds, | |
655 | .num_leds = ARRAY_SIZE(da850_evm_bb_leds), | |
656 | }; | |
657 | ||
658 | static struct platform_device da850_evm_bb_leds_device = { | |
659 | .name = "leds-gpio", | |
660 | .id = -1, | |
661 | .dev = { | |
662 | .platform_data = &da850_evm_bb_leds_pdata | |
663 | } | |
664 | }; | |
665 | ||
666 | static void da850_evm_bb_leds_init(unsigned gpio) | |
667 | { | |
668 | int i; | |
669 | struct gpio_led *led; | |
670 | ||
671 | for (i = 0; i < DA850_N_BB_USER_LED; i++) { | |
672 | led = &da850_evm_bb_leds[i]; | |
673 | ||
674 | led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i; | |
675 | led->name = | |
676 | da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i]; | |
677 | } | |
678 | } | |
679 | ||
680 | static int da850_evm_bb_expander_setup(struct i2c_client *client, | |
681 | unsigned gpio, unsigned ngpio, | |
682 | void *c) | |
683 | { | |
684 | int ret; | |
685 | ||
686 | /* | |
687 | * Register the switches and pushbutton on the baseboard as a gpio-keys | |
688 | * device. | |
689 | */ | |
690 | da850_evm_bb_keys_init(gpio); | |
691 | ret = platform_device_register(&da850_evm_bb_keys_device); | |
692 | if (ret) { | |
6c7c23cc | 693 | pr_warn("Could not register baseboard GPIO expander keys"); |
70b30939 BG |
694 | goto io_exp_setup_sw_fail; |
695 | } | |
696 | ||
697 | da850_evm_bb_leds_init(gpio); | |
698 | ret = platform_device_register(&da850_evm_bb_leds_device); | |
699 | if (ret) { | |
6c7c23cc | 700 | pr_warn("Could not register baseboard GPIO expander LEDs"); |
70b30939 BG |
701 | goto io_exp_setup_leds_fail; |
702 | } | |
703 | ||
704 | return 0; | |
705 | ||
706 | io_exp_setup_leds_fail: | |
707 | platform_device_unregister(&da850_evm_bb_keys_device); | |
708 | io_exp_setup_sw_fail: | |
709 | return ret; | |
710 | } | |
711 | ||
712 | static int da850_evm_bb_expander_teardown(struct i2c_client *client, | |
713 | unsigned gpio, unsigned ngpio, void *c) | |
714 | { | |
715 | platform_device_unregister(&da850_evm_bb_leds_device); | |
716 | platform_device_unregister(&da850_evm_bb_keys_device); | |
717 | ||
718 | return 0; | |
719 | } | |
720 | ||
75e2ea64 C |
721 | static struct pca953x_platform_data da850_evm_ui_expander_info = { |
722 | .gpio_base = DAVINCI_N_GPIO, | |
723 | .setup = da850_evm_ui_expander_setup, | |
724 | .teardown = da850_evm_ui_expander_teardown, | |
75929f5e | 725 | .names = da850_evm_ui_exp, |
75e2ea64 C |
726 | }; |
727 | ||
70b30939 BG |
728 | static struct pca953x_platform_data da850_evm_bb_expander_info = { |
729 | .gpio_base = DA850_BB_EXPANDER_GPIO_BASE, | |
730 | .setup = da850_evm_bb_expander_setup, | |
731 | .teardown = da850_evm_bb_expander_teardown, | |
732 | .names = da850_evm_bb_exp, | |
733 | }; | |
734 | ||
1a7ff8ff C |
735 | static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { |
736 | { | |
737 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
75e2ea64 C |
738 | }, |
739 | { | |
740 | I2C_BOARD_INFO("tca6416", 0x20), | |
741 | .platform_data = &da850_evm_ui_expander_info, | |
742 | }, | |
70b30939 BG |
743 | { |
744 | I2C_BOARD_INFO("tca6416", 0x21), | |
745 | .platform_data = &da850_evm_bb_expander_info, | |
746 | }, | |
1a7ff8ff C |
747 | }; |
748 | ||
0fbc5592 SR |
749 | static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { |
750 | .bus_freq = 100, /* kHz */ | |
751 | .bus_delay = 0, /* usec */ | |
752 | }; | |
753 | ||
754 | static struct davinci_uart_config da850_evm_uart_config __initdata = { | |
755 | .enabled_uarts = 0x7, | |
756 | }; | |
757 | ||
491214e1 C |
758 | /* davinci da850 evm audio machine driver */ |
759 | static u8 da850_iis_serializer_direction[] = { | |
760 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
761 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
762 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, | |
763 | RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
764 | }; | |
765 | ||
766 | static struct snd_platform_data da850_evm_snd_data = { | |
88abfd5b MP |
767 | .tx_dma_offset = 0x2000, |
768 | .rx_dma_offset = 0x2000, | |
769 | .op_mode = DAVINCI_MCASP_IIS_MODE, | |
770 | .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), | |
771 | .tdm_slots = 2, | |
772 | .serial_dir = da850_iis_serializer_direction, | |
773 | .asp_chan_q = EVENTQ_0, | |
774 | .ram_chan_q = EVENTQ_1, | |
775 | .version = MCASP_VERSION_2, | |
776 | .txnumevt = 1, | |
777 | .rxnumevt = 1, | |
778 | .sram_size_playback = SZ_8K, | |
779 | .sram_size_capture = SZ_8K, | |
491214e1 C |
780 | }; |
781 | ||
c840fc74 MW |
782 | static const short da850_evm_mcasp_pins[] __initconst = { |
783 | DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, | |
784 | DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, | |
785 | DA850_AXR_11, DA850_AXR_12, | |
786 | -1 | |
787 | }; | |
788 | ||
700691f2 SR |
789 | static int da850_evm_mmc_get_ro(int index) |
790 | { | |
791 | return gpio_get_value(DA850_MMCSD_WP_PIN); | |
792 | } | |
793 | ||
794 | static int da850_evm_mmc_get_cd(int index) | |
795 | { | |
796 | return !gpio_get_value(DA850_MMCSD_CD_PIN); | |
797 | } | |
798 | ||
799 | static struct davinci_mmc_config da850_mmc_config = { | |
800 | .get_ro = da850_evm_mmc_get_ro, | |
801 | .get_cd = da850_evm_mmc_get_cd, | |
802 | .wires = 4, | |
0046d0bf C |
803 | .max_freq = 50000000, |
804 | .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, | |
700691f2 SR |
805 | }; |
806 | ||
5a0d80ea MW |
807 | static const short da850_evm_mmcsd0_pins[] __initconst = { |
808 | DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, | |
809 | DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, | |
810 | DA850_GPIO4_0, DA850_GPIO4_1, | |
811 | -1 | |
812 | }; | |
813 | ||
d52f235f C |
814 | static void da850_panel_power_ctrl(int val) |
815 | { | |
816 | /* lcd backlight */ | |
817 | gpio_set_value(DA850_LCD_BL_PIN, val); | |
818 | ||
819 | /* lcd power */ | |
820 | gpio_set_value(DA850_LCD_PWR_PIN, val); | |
821 | } | |
822 | ||
5cbdf276 SR |
823 | static int da850_lcd_hw_init(void) |
824 | { | |
825 | int status; | |
826 | ||
827 | status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n"); | |
828 | if (status < 0) | |
829 | return status; | |
830 | ||
831 | status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n"); | |
832 | if (status < 0) { | |
833 | gpio_free(DA850_LCD_BL_PIN); | |
834 | return status; | |
835 | } | |
836 | ||
837 | gpio_direction_output(DA850_LCD_BL_PIN, 0); | |
838 | gpio_direction_output(DA850_LCD_PWR_PIN, 0); | |
839 | ||
d52f235f C |
840 | /* Switch off panel power and backlight */ |
841 | da850_panel_power_ctrl(0); | |
5cbdf276 | 842 | |
d52f235f C |
843 | /* Switch on panel power and backlight */ |
844 | da850_panel_power_ctrl(1); | |
5cbdf276 SR |
845 | |
846 | return 0; | |
847 | } | |
491214e1 | 848 | |
a9eb1f67 SN |
849 | /* TPS65070 voltage regulator support */ |
850 | ||
851 | /* 3.3V */ | |
db549d22 | 852 | static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = { |
a9eb1f67 SN |
853 | { |
854 | .supply = "usb0_vdda33", | |
855 | }, | |
856 | { | |
857 | .supply = "usb1_vdda33", | |
858 | }, | |
859 | }; | |
860 | ||
861 | /* 3.3V or 1.8V */ | |
db549d22 | 862 | static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = { |
a9eb1f67 SN |
863 | { |
864 | .supply = "dvdd3318_a", | |
865 | }, | |
866 | { | |
867 | .supply = "dvdd3318_b", | |
868 | }, | |
869 | { | |
870 | .supply = "dvdd3318_c", | |
871 | }, | |
872 | }; | |
873 | ||
874 | /* 1.2V */ | |
db549d22 | 875 | static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = { |
a9eb1f67 SN |
876 | { |
877 | .supply = "cvdd", | |
878 | }, | |
879 | }; | |
880 | ||
881 | /* 1.8V LDO */ | |
db549d22 | 882 | static struct regulator_consumer_supply tps65070_ldo1_consumers[] = { |
a9eb1f67 SN |
883 | { |
884 | .supply = "sata_vddr", | |
885 | }, | |
886 | { | |
887 | .supply = "usb0_vdda18", | |
888 | }, | |
889 | { | |
890 | .supply = "usb1_vdda18", | |
891 | }, | |
892 | { | |
893 | .supply = "ddr_dvdd18", | |
894 | }, | |
895 | }; | |
896 | ||
897 | /* 1.2V LDO */ | |
db549d22 | 898 | static struct regulator_consumer_supply tps65070_ldo2_consumers[] = { |
a9eb1f67 SN |
899 | { |
900 | .supply = "sata_vdd", | |
901 | }, | |
902 | { | |
903 | .supply = "pll0_vdda", | |
904 | }, | |
905 | { | |
906 | .supply = "pll1_vdda", | |
907 | }, | |
908 | { | |
909 | .supply = "usbs_cvdd", | |
910 | }, | |
911 | { | |
912 | .supply = "vddarnwa1", | |
913 | }, | |
914 | }; | |
915 | ||
8b24599e SN |
916 | /* We take advantage of the fact that both defdcdc{2,3} are tied high */ |
917 | static struct tps6507x_reg_platform_data tps6507x_platform_data = { | |
918 | .defdcdc_default = true, | |
919 | }; | |
920 | ||
db549d22 | 921 | static struct regulator_init_data tps65070_regulator_data[] = { |
a9eb1f67 SN |
922 | /* dcdc1 */ |
923 | { | |
924 | .constraints = { | |
925 | .min_uV = 3150000, | |
926 | .max_uV = 3450000, | |
927 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
928 | REGULATOR_CHANGE_STATUS), | |
929 | .boot_on = 1, | |
930 | }, | |
931 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers), | |
932 | .consumer_supplies = tps65070_dcdc1_consumers, | |
933 | }, | |
934 | ||
935 | /* dcdc2 */ | |
936 | { | |
937 | .constraints = { | |
938 | .min_uV = 1710000, | |
939 | .max_uV = 3450000, | |
940 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
941 | REGULATOR_CHANGE_STATUS), | |
942 | .boot_on = 1, | |
943 | }, | |
944 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers), | |
945 | .consumer_supplies = tps65070_dcdc2_consumers, | |
8b24599e | 946 | .driver_data = &tps6507x_platform_data, |
a9eb1f67 SN |
947 | }, |
948 | ||
949 | /* dcdc3 */ | |
950 | { | |
951 | .constraints = { | |
952 | .min_uV = 950000, | |
28bd2c34 | 953 | .max_uV = 1350000, |
a9eb1f67 SN |
954 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | |
955 | REGULATOR_CHANGE_STATUS), | |
956 | .boot_on = 1, | |
957 | }, | |
958 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers), | |
959 | .consumer_supplies = tps65070_dcdc3_consumers, | |
8b24599e | 960 | .driver_data = &tps6507x_platform_data, |
a9eb1f67 SN |
961 | }, |
962 | ||
963 | /* ldo1 */ | |
964 | { | |
965 | .constraints = { | |
966 | .min_uV = 1710000, | |
967 | .max_uV = 1890000, | |
968 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
969 | REGULATOR_CHANGE_STATUS), | |
970 | .boot_on = 1, | |
971 | }, | |
972 | .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers), | |
973 | .consumer_supplies = tps65070_ldo1_consumers, | |
974 | }, | |
975 | ||
976 | /* ldo2 */ | |
977 | { | |
978 | .constraints = { | |
979 | .min_uV = 1140000, | |
980 | .max_uV = 1320000, | |
981 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
982 | REGULATOR_CHANGE_STATUS), | |
983 | .boot_on = 1, | |
984 | }, | |
985 | .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers), | |
986 | .consumer_supplies = tps65070_ldo2_consumers, | |
987 | }, | |
988 | }; | |
989 | ||
da1e3680 TF |
990 | static struct touchscreen_init_data tps6507x_touchscreen_data = { |
991 | .poll_period = 30, /* ms between touch samples */ | |
992 | .min_pressure = 0x30, /* minimum pressure to trigger touch */ | |
993 | .vref = 0, /* turn off vref when not using A/D */ | |
994 | .vendor = 0, /* /sys/class/input/input?/id/vendor */ | |
995 | .product = 65070, /* /sys/class/input/input?/id/product */ | |
996 | .version = 0x100, /* /sys/class/input/input?/id/version */ | |
997 | }; | |
998 | ||
0bc20bba TF |
999 | static struct tps6507x_board tps_board = { |
1000 | .tps6507x_pmic_init_data = &tps65070_regulator_data[0], | |
da1e3680 | 1001 | .tps6507x_ts_init_data = &tps6507x_touchscreen_data, |
0bc20bba TF |
1002 | }; |
1003 | ||
3506f277 | 1004 | static struct i2c_board_info __initdata da850_evm_tps65070_info[] = { |
a9eb1f67 SN |
1005 | { |
1006 | I2C_BOARD_INFO("tps6507x", 0x48), | |
0bc20bba | 1007 | .platform_data = &tps_board, |
a9eb1f67 SN |
1008 | }, |
1009 | }; | |
1010 | ||
1011 | static int __init pmic_tps65070_init(void) | |
1012 | { | |
3506f277 BG |
1013 | return i2c_register_board_info(1, da850_evm_tps65070_info, |
1014 | ARRAY_SIZE(da850_evm_tps65070_info)); | |
a9eb1f67 SN |
1015 | } |
1016 | ||
7761ef67 SR |
1017 | static const short da850_evm_lcdc_pins[] = { |
1018 | DA850_GPIO2_8, DA850_GPIO2_15, | |
1019 | -1 | |
1020 | }; | |
1021 | ||
85b8307f SS |
1022 | static const short da850_evm_mii_pins[] = { |
1023 | DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, | |
1024 | DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, | |
1025 | DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, | |
1026 | DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, | |
1027 | DA850_MDIO_D, | |
1028 | -1 | |
1029 | }; | |
1030 | ||
1031 | static const short da850_evm_rmii_pins[] = { | |
1032 | DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, | |
1033 | DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, | |
1034 | DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, | |
1035 | DA850_MDIO_D, | |
1036 | -1 | |
1037 | }; | |
1038 | ||
bae10587 | 1039 | static int __init da850_evm_config_emac(void) |
2206771c C |
1040 | { |
1041 | void __iomem *cfg_chip3_base; | |
1042 | int ret; | |
1043 | u32 val; | |
bae10587 SN |
1044 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
1045 | u8 rmii_en = soc_info->emac_pdata->rmii_en; | |
1046 | ||
1047 | if (!machine_is_davinci_da850_evm()) | |
1048 | return 0; | |
2206771c | 1049 | |
d2de0582 | 1050 | cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); |
2206771c | 1051 | |
2206771c | 1052 | val = __raw_readl(cfg_chip3_base); |
17fadd9a SN |
1053 | |
1054 | if (rmii_en) { | |
2206771c | 1055 | val |= BIT(8); |
85b8307f | 1056 | ret = davinci_cfg_reg_list(da850_evm_rmii_pins); |
17fadd9a SN |
1057 | pr_info("EMAC: RMII PHY configured, MII PHY will not be" |
1058 | " functional\n"); | |
1059 | } else { | |
2206771c | 1060 | val &= ~BIT(8); |
85b8307f | 1061 | ret = davinci_cfg_reg_list(da850_evm_mii_pins); |
17fadd9a SN |
1062 | pr_info("EMAC: MII PHY configured, RMII PHY will not be" |
1063 | " functional\n"); | |
1064 | } | |
1065 | ||
2206771c | 1066 | if (ret) |
6c7c23cc RT |
1067 | pr_warn("%s: CPGMAC/RMII mux setup failed: %d\n", |
1068 | __func__, ret); | |
2206771c | 1069 | |
17fadd9a SN |
1070 | /* configure the CFGCHIP3 register for RMII or MII */ |
1071 | __raw_writel(val, cfg_chip3_base); | |
1072 | ||
2206771c C |
1073 | ret = davinci_cfg_reg(DA850_GPIO2_6); |
1074 | if (ret) | |
6c7c23cc | 1075 | pr_warn("%s:GPIO(2,6) mux setup failed\n", __func__); |
2206771c C |
1076 | |
1077 | ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en"); | |
1078 | if (ret) { | |
6c7c23cc | 1079 | pr_warn("Cannot open GPIO %d\n", DA850_MII_MDIO_CLKEN_PIN); |
2206771c C |
1080 | return ret; |
1081 | } | |
1082 | ||
17fadd9a SN |
1083 | /* Enable/Disable MII MDIO clock */ |
1084 | gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en); | |
2206771c | 1085 | |
782f2d78 | 1086 | soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID; |
bae10587 SN |
1087 | |
1088 | ret = da8xx_register_emac(); | |
1089 | if (ret) | |
6c7c23cc | 1090 | pr_warn("%s: EMAC registration failed: %d\n", __func__, ret); |
bae10587 | 1091 | |
2206771c C |
1092 | return 0; |
1093 | } | |
bae10587 | 1094 | device_initcall(da850_evm_config_emac); |
2206771c | 1095 | |
a941c503 RS |
1096 | /* |
1097 | * The following EDMA channels/slots are not being used by drivers (for | |
1098 | * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence | |
1099 | * they are being reserved for codecs on the DSP side. | |
1100 | */ | |
1101 | static const s16 da850_dma0_rsv_chans[][2] = { | |
1102 | /* (offset, number) */ | |
1103 | { 8, 6}, | |
1104 | {24, 4}, | |
1105 | {30, 2}, | |
1106 | {-1, -1} | |
1107 | }; | |
1108 | ||
1109 | static const s16 da850_dma0_rsv_slots[][2] = { | |
1110 | /* (offset, number) */ | |
1111 | { 8, 6}, | |
1112 | {24, 4}, | |
1113 | {30, 50}, | |
1114 | {-1, -1} | |
1115 | }; | |
1116 | ||
1117 | static const s16 da850_dma1_rsv_chans[][2] = { | |
1118 | /* (offset, number) */ | |
1119 | { 0, 28}, | |
1120 | {30, 2}, | |
1121 | {-1, -1} | |
1122 | }; | |
1123 | ||
1124 | static const s16 da850_dma1_rsv_slots[][2] = { | |
1125 | /* (offset, number) */ | |
1126 | { 0, 28}, | |
1127 | {30, 90}, | |
1128 | {-1, -1} | |
1129 | }; | |
1130 | ||
1131 | static struct edma_rsv_info da850_edma_cc0_rsv = { | |
1132 | .rsv_chans = da850_dma0_rsv_chans, | |
1133 | .rsv_slots = da850_dma0_rsv_slots, | |
1134 | }; | |
1135 | ||
1136 | static struct edma_rsv_info da850_edma_cc1_rsv = { | |
1137 | .rsv_chans = da850_dma1_rsv_chans, | |
1138 | .rsv_slots = da850_dma1_rsv_slots, | |
1139 | }; | |
1140 | ||
1141 | static struct edma_rsv_info *da850_edma_rsv[2] = { | |
1142 | &da850_edma_cc0_rsv, | |
1143 | &da850_edma_cc1_rsv, | |
1144 | }; | |
1145 | ||
28bd2c34 SN |
1146 | #ifdef CONFIG_CPU_FREQ |
1147 | static __init int da850_evm_init_cpufreq(void) | |
1148 | { | |
1149 | switch (system_rev & 0xF) { | |
1150 | case 3: | |
1151 | da850_max_speed = 456000; | |
1152 | break; | |
1153 | case 2: | |
1154 | da850_max_speed = 408000; | |
1155 | break; | |
1156 | case 1: | |
1157 | da850_max_speed = 372000; | |
1158 | break; | |
1159 | } | |
1160 | ||
1161 | return da850_register_cpufreq("pll0_sysclk3"); | |
1162 | } | |
1163 | #else | |
1164 | static __init int da850_evm_init_cpufreq(void) { return 0; } | |
1165 | #endif | |
1166 | ||
1e046d17 MH |
1167 | #if defined(CONFIG_DA850_UI_SD_VIDEO_PORT) |
1168 | ||
1169 | #define TVP5147_CH0 "tvp514x-0" | |
1170 | #define TVP5147_CH1 "tvp514x-1" | |
1171 | ||
1172 | /* VPIF capture configuration */ | |
1173 | static struct tvp514x_platform_data tvp5146_pdata = { | |
1174 | .clk_polarity = 0, | |
1175 | .hs_polarity = 1, | |
1176 | .vs_polarity = 1, | |
1177 | }; | |
1178 | ||
1179 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | |
1180 | ||
1181 | static const struct vpif_input da850_ch0_inputs[] = { | |
1182 | { | |
1183 | .input = { | |
1184 | .index = 0, | |
1185 | .name = "Composite", | |
1186 | .type = V4L2_INPUT_TYPE_CAMERA, | |
7aaad131 | 1187 | .capabilities = V4L2_IN_CAP_STD, |
1e046d17 MH |
1188 | .std = TVP514X_STD_ALL, |
1189 | }, | |
7aaad131 HV |
1190 | .input_route = INPUT_CVBS_VI2B, |
1191 | .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
1e046d17 MH |
1192 | .subdev_name = TVP5147_CH0, |
1193 | }, | |
1194 | }; | |
1195 | ||
1196 | static const struct vpif_input da850_ch1_inputs[] = { | |
1197 | { | |
1198 | .input = { | |
1199 | .index = 0, | |
1200 | .name = "S-Video", | |
1201 | .type = V4L2_INPUT_TYPE_CAMERA, | |
7aaad131 | 1202 | .capabilities = V4L2_IN_CAP_STD, |
1e046d17 MH |
1203 | .std = TVP514X_STD_ALL, |
1204 | }, | |
7aaad131 HV |
1205 | .input_route = INPUT_SVIDEO_VI2C_VI1C, |
1206 | .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
1e046d17 MH |
1207 | .subdev_name = TVP5147_CH1, |
1208 | }, | |
1209 | }; | |
1210 | ||
1211 | static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = { | |
1212 | { | |
1213 | .name = TVP5147_CH0, | |
1214 | .board_info = { | |
1215 | I2C_BOARD_INFO("tvp5146", 0x5d), | |
1216 | .platform_data = &tvp5146_pdata, | |
1217 | }, | |
1e046d17 MH |
1218 | }, |
1219 | { | |
1220 | .name = TVP5147_CH1, | |
1221 | .board_info = { | |
1222 | I2C_BOARD_INFO("tvp5146", 0x5c), | |
1223 | .platform_data = &tvp5146_pdata, | |
1224 | }, | |
1e046d17 MH |
1225 | }, |
1226 | }; | |
1227 | ||
1228 | static struct vpif_capture_config da850_vpif_capture_config = { | |
1229 | .subdev_info = da850_vpif_capture_sdev_info, | |
1230 | .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info), | |
1231 | .chan_config[0] = { | |
1232 | .inputs = da850_ch0_inputs, | |
1233 | .input_count = ARRAY_SIZE(da850_ch0_inputs), | |
0d4f35f3 HV |
1234 | .vpif_if = { |
1235 | .if_type = VPIF_IF_BT656, | |
1236 | .hd_pol = 1, | |
1237 | .vd_pol = 1, | |
1238 | .fid_pol = 0, | |
1239 | }, | |
1e046d17 MH |
1240 | }, |
1241 | .chan_config[1] = { | |
1242 | .inputs = da850_ch1_inputs, | |
1243 | .input_count = ARRAY_SIZE(da850_ch1_inputs), | |
0d4f35f3 HV |
1244 | .vpif_if = { |
1245 | .if_type = VPIF_IF_BT656, | |
1246 | .hd_pol = 1, | |
1247 | .vd_pol = 1, | |
1248 | .fid_pol = 0, | |
1249 | }, | |
1e046d17 MH |
1250 | }, |
1251 | .card_name = "DA850/OMAP-L138 Video Capture", | |
1252 | }; | |
1253 | ||
1254 | /* VPIF display configuration */ | |
3e85a44a LP |
1255 | |
1256 | static struct adv7343_platform_data adv7343_pdata = { | |
1257 | .mode_config = { | |
1258 | .dac_3 = 1, | |
1259 | .dac_2 = 1, | |
1260 | .dac_1 = 1, | |
1261 | }, | |
1262 | .sd_config = { | |
1263 | .sd_dac_out1 = 1, | |
1264 | }, | |
1265 | }; | |
1266 | ||
1e046d17 MH |
1267 | static struct vpif_subdev_info da850_vpif_subdev[] = { |
1268 | { | |
1269 | .name = "adv7343", | |
1270 | .board_info = { | |
1271 | I2C_BOARD_INFO("adv7343", 0x2a), | |
3e85a44a | 1272 | .platform_data = &adv7343_pdata, |
1e046d17 MH |
1273 | }, |
1274 | }, | |
1275 | }; | |
1276 | ||
2bd4e58c LP |
1277 | static const struct vpif_output da850_ch0_outputs[] = { |
1278 | { | |
1279 | .output = { | |
1280 | .index = 0, | |
1281 | .name = "Composite", | |
1282 | .type = V4L2_OUTPUT_TYPE_ANALOG, | |
1283 | .capabilities = V4L2_OUT_CAP_STD, | |
1284 | .std = V4L2_STD_ALL, | |
1285 | }, | |
1286 | .subdev_name = "adv7343", | |
1287 | .output_route = ADV7343_COMPOSITE_ID, | |
1288 | }, | |
1289 | { | |
1290 | .output = { | |
1291 | .index = 1, | |
1292 | .name = "S-Video", | |
1293 | .type = V4L2_OUTPUT_TYPE_ANALOG, | |
1294 | .capabilities = V4L2_OUT_CAP_STD, | |
1295 | .std = V4L2_STD_ALL, | |
1296 | }, | |
1297 | .subdev_name = "adv7343", | |
1298 | .output_route = ADV7343_SVIDEO_ID, | |
1299 | }, | |
1e046d17 MH |
1300 | }; |
1301 | ||
1302 | static struct vpif_display_config da850_vpif_display_config = { | |
1303 | .subdevinfo = da850_vpif_subdev, | |
1304 | .subdev_count = ARRAY_SIZE(da850_vpif_subdev), | |
2bd4e58c LP |
1305 | .chan_config[0] = { |
1306 | .outputs = da850_ch0_outputs, | |
1307 | .output_count = ARRAY_SIZE(da850_ch0_outputs), | |
1308 | }, | |
1e046d17 MH |
1309 | .card_name = "DA850/OMAP-L138 Video Display", |
1310 | }; | |
1311 | ||
1312 | static __init void da850_vpif_init(void) | |
1313 | { | |
1314 | int ret; | |
1315 | ||
1316 | ret = da850_register_vpif(); | |
1317 | if (ret) | |
1318 | pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret); | |
1319 | ||
1320 | ret = davinci_cfg_reg_list(da850_vpif_capture_pins); | |
1321 | if (ret) | |
1322 | pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n", | |
1323 | ret); | |
1324 | ||
1325 | ret = da850_register_vpif_capture(&da850_vpif_capture_config); | |
1326 | if (ret) | |
1327 | pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret); | |
1328 | ||
1329 | ret = davinci_cfg_reg_list(da850_vpif_display_pins); | |
1330 | if (ret) | |
1331 | pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n", | |
1332 | ret); | |
1333 | ||
1334 | ret = da850_register_vpif_display(&da850_vpif_display_config); | |
1335 | if (ret) | |
1336 | pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret); | |
1337 | } | |
1338 | ||
1339 | #else | |
1340 | static __init void da850_vpif_init(void) {} | |
1341 | #endif | |
1342 | ||
ab3f5c1f IY |
1343 | #ifdef CONFIG_DA850_WL12XX |
1344 | ||
1345 | static void wl12xx_set_power(int index, bool power_on) | |
1346 | { | |
1347 | static bool power_state; | |
1348 | ||
1349 | pr_debug("Powering %s wl12xx", power_on ? "on" : "off"); | |
1350 | ||
1351 | if (power_on == power_state) | |
1352 | return; | |
1353 | power_state = power_on; | |
1354 | ||
1355 | if (power_on) { | |
1356 | /* Power up sequence required for wl127x devices */ | |
1357 | gpio_set_value(DA850_WLAN_EN, 1); | |
1358 | usleep_range(15000, 15000); | |
1359 | gpio_set_value(DA850_WLAN_EN, 0); | |
1360 | usleep_range(1000, 1000); | |
1361 | gpio_set_value(DA850_WLAN_EN, 1); | |
1362 | msleep(70); | |
1363 | } else { | |
1364 | gpio_set_value(DA850_WLAN_EN, 0); | |
1365 | } | |
1366 | } | |
1367 | ||
1368 | static struct davinci_mmc_config da850_wl12xx_mmc_config = { | |
1369 | .set_power = wl12xx_set_power, | |
1370 | .wires = 4, | |
1371 | .max_freq = 25000000, | |
1372 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE | | |
1373 | MMC_CAP_POWER_OFF_CARD, | |
ab3f5c1f IY |
1374 | }; |
1375 | ||
1376 | static const short da850_wl12xx_pins[] __initconst = { | |
1377 | DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2, | |
1378 | DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD, | |
1379 | DA850_GPIO6_9, DA850_GPIO6_10, | |
1380 | -1 | |
1381 | }; | |
1382 | ||
1383 | static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = { | |
1384 | .irq = -1, | |
1385 | .board_ref_clock = WL12XX_REFCLOCK_38, | |
1386 | .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ, | |
1387 | }; | |
1388 | ||
1389 | static __init int da850_wl12xx_init(void) | |
1390 | { | |
1391 | int ret; | |
1392 | ||
1393 | ret = davinci_cfg_reg_list(da850_wl12xx_pins); | |
1394 | if (ret) { | |
1395 | pr_err("wl12xx/mmc mux setup failed: %d\n", ret); | |
1396 | goto exit; | |
1397 | } | |
1398 | ||
1399 | ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config); | |
1400 | if (ret) { | |
1401 | pr_err("wl12xx/mmc registration failed: %d\n", ret); | |
1402 | goto exit; | |
1403 | } | |
1404 | ||
1405 | ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en"); | |
1406 | if (ret) { | |
1407 | pr_err("Could not request wl12xx enable gpio: %d\n", ret); | |
1408 | goto exit; | |
1409 | } | |
1410 | ||
1411 | ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq"); | |
1412 | if (ret) { | |
1413 | pr_err("Could not request wl12xx irq gpio: %d\n", ret); | |
1414 | goto free_wlan_en; | |
1415 | } | |
1416 | ||
1417 | da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ); | |
1418 | ||
1419 | ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data); | |
1420 | if (ret) { | |
1421 | pr_err("Could not set wl12xx data: %d\n", ret); | |
1422 | goto free_wlan_irq; | |
1423 | } | |
1424 | ||
1425 | return 0; | |
1426 | ||
1427 | free_wlan_irq: | |
1428 | gpio_free(DA850_WLAN_IRQ); | |
1429 | ||
1430 | free_wlan_en: | |
1431 | gpio_free(DA850_WLAN_EN); | |
1432 | ||
1433 | exit: | |
1434 | return ret; | |
1435 | } | |
1436 | ||
1437 | #else /* CONFIG_DA850_WL12XX */ | |
1438 | ||
1439 | static __init int da850_wl12xx_init(void) | |
1440 | { | |
1441 | return 0; | |
1442 | } | |
1443 | ||
1444 | #endif /* CONFIG_DA850_WL12XX */ | |
1445 | ||
8bb2c481 SN |
1446 | #define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) |
1447 | ||
0fbc5592 SR |
1448 | static __init void da850_evm_init(void) |
1449 | { | |
1450 | int ret; | |
1451 | ||
a9eb1f67 SN |
1452 | ret = pmic_tps65070_init(); |
1453 | if (ret) | |
6c7c23cc | 1454 | pr_warn("%s: TPS65070 PMIC init failed: %d\n", __func__, ret); |
a9eb1f67 | 1455 | |
a941c503 | 1456 | ret = da850_register_edma(da850_edma_rsv); |
0fbc5592 | 1457 | if (ret) |
6c7c23cc | 1458 | pr_warn("%s: EDMA registration failed: %d\n", __func__, ret); |
0fbc5592 | 1459 | |
3821d10a | 1460 | ret = davinci_cfg_reg_list(da850_i2c0_pins); |
0fbc5592 | 1461 | if (ret) |
6c7c23cc | 1462 | pr_warn("%s: I2C0 mux setup failed: %d\n", __func__, ret); |
0fbc5592 SR |
1463 | |
1464 | ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata); | |
1465 | if (ret) | |
6c7c23cc | 1466 | pr_warn("%s: I2C0 registration failed: %d\n", __func__, ret); |
0fbc5592 | 1467 | |
5a4b1315 | 1468 | |
0fbc5592 SR |
1469 | ret = da8xx_register_watchdog(); |
1470 | if (ret) | |
6c7c23cc RT |
1471 | pr_warn("%s: watchdog registration failed: %d\n", |
1472 | __func__, ret); | |
0fbc5592 | 1473 | |
820c4fe3 | 1474 | if (HAS_MMC) { |
5a0d80ea | 1475 | ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins); |
820c4fe3 | 1476 | if (ret) |
6c7c23cc RT |
1477 | pr_warn("%s: MMCSD0 mux setup failed: %d\n", |
1478 | __func__, ret); | |
820c4fe3 SR |
1479 | |
1480 | ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n"); | |
1481 | if (ret) | |
6c7c23cc RT |
1482 | pr_warn("%s: can not open GPIO %d\n", |
1483 | __func__, DA850_MMCSD_CD_PIN); | |
820c4fe3 SR |
1484 | gpio_direction_input(DA850_MMCSD_CD_PIN); |
1485 | ||
1486 | ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n"); | |
1487 | if (ret) | |
6c7c23cc RT |
1488 | pr_warn("%s: can not open GPIO %d\n", |
1489 | __func__, DA850_MMCSD_WP_PIN); | |
820c4fe3 SR |
1490 | gpio_direction_input(DA850_MMCSD_WP_PIN); |
1491 | ||
1492 | ret = da8xx_register_mmcsd0(&da850_mmc_config); | |
1493 | if (ret) | |
6c7c23cc RT |
1494 | pr_warn("%s: MMCSD0 registration failed: %d\n", |
1495 | __func__, ret); | |
ab3f5c1f IY |
1496 | |
1497 | ret = da850_wl12xx_init(); | |
1498 | if (ret) | |
6c7c23cc RT |
1499 | pr_warn("%s: WL12xx initialization failed: %d\n", |
1500 | __func__, ret); | |
820c4fe3 | 1501 | } |
700691f2 | 1502 | |
0fbc5592 SR |
1503 | davinci_serial_init(&da850_evm_uart_config); |
1504 | ||
1a7ff8ff C |
1505 | i2c_register_board_info(1, da850_evm_i2c_devices, |
1506 | ARRAY_SIZE(da850_evm_i2c_devices)); | |
1507 | ||
0fbc5592 SR |
1508 | /* |
1509 | * shut down uart 0 and 1; they are not used on the board and | |
1510 | * accessing them causes endless "too much work in irq53" messages | |
1511 | * with arago fs | |
1512 | */ | |
1513 | __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); | |
1514 | __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); | |
491214e1 | 1515 | |
c840fc74 | 1516 | ret = davinci_cfg_reg_list(da850_evm_mcasp_pins); |
491214e1 | 1517 | if (ret) |
6c7c23cc | 1518 | pr_warn("%s: McASP mux setup failed: %d\n", __func__, ret); |
491214e1 | 1519 | |
88abfd5b | 1520 | da850_evm_snd_data.sram_pool = sram_get_gen_pool(); |
b8864aa4 | 1521 | da8xx_register_mcasp(0, &da850_evm_snd_data); |
5cbdf276 | 1522 | |
3821d10a | 1523 | ret = davinci_cfg_reg_list(da850_lcdcntl_pins); |
5cbdf276 | 1524 | if (ret) |
6c7c23cc | 1525 | pr_warn("%s: LCDC mux setup failed: %d\n", __func__, ret); |
5cbdf276 | 1526 | |
ae41d17a MP |
1527 | ret = da8xx_register_uio_pruss(); |
1528 | if (ret) | |
1529 | pr_warn("da850_evm_init: pruss initialization failed: %d\n", | |
1530 | ret); | |
1531 | ||
7761ef67 | 1532 | /* Handle board specific muxing for LCD here */ |
3821d10a | 1533 | ret = davinci_cfg_reg_list(da850_evm_lcdc_pins); |
7761ef67 | 1534 | if (ret) |
6c7c23cc RT |
1535 | pr_warn("%s: EVM specific LCD mux setup failed: %d\n", |
1536 | __func__, ret); | |
7761ef67 | 1537 | |
5cbdf276 SR |
1538 | ret = da850_lcd_hw_init(); |
1539 | if (ret) | |
6c7c23cc | 1540 | pr_warn("%s: LCD initialization failed: %d\n", __func__, ret); |
5cbdf276 | 1541 | |
d52f235f | 1542 | sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl, |
b9e6342b | 1543 | ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata); |
5cbdf276 | 1544 | if (ret) |
6c7c23cc | 1545 | pr_warn("%s: LCDC registration failed: %d\n", __func__, ret); |
c51df70b MG |
1546 | |
1547 | ret = da8xx_register_rtc(); | |
1548 | if (ret) | |
6c7c23cc | 1549 | pr_warn("%s: RTC setup failed: %d\n", __func__, ret); |
09dc2d45 | 1550 | |
28bd2c34 | 1551 | ret = da850_evm_init_cpufreq(); |
09dc2d45 | 1552 | if (ret) |
6c7c23cc | 1553 | pr_warn("%s: cpufreq registration failed: %d\n", __func__, ret); |
5aeb15aa SN |
1554 | |
1555 | ret = da8xx_register_cpuidle(); | |
1556 | if (ret) | |
6c7c23cc | 1557 | pr_warn("%s: cpuidle registration failed: %d\n", __func__, ret); |
63534443 SN |
1558 | |
1559 | ret = da850_register_pm(&da850_pm_device); | |
1560 | if (ret) | |
6c7c23cc | 1561 | pr_warn("%s: suspend registration failed: %d\n", __func__, ret); |
fdce5568 | 1562 | |
1e046d17 MH |
1563 | da850_vpif_init(); |
1564 | ||
0273612c VD |
1565 | ret = spi_register_board_info(da850evm_spi_info, |
1566 | ARRAY_SIZE(da850evm_spi_info)); | |
1567 | if (ret) | |
1568 | pr_warn("%s: spi info registration failed: %d\n", __func__, | |
1569 | ret); | |
1570 | ||
1571 | ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info)); | |
fdce5568 | 1572 | if (ret) |
6c7c23cc | 1573 | pr_warn("%s: SPI 1 registration failed: %d\n", __func__, ret); |
8bb2c481 SN |
1574 | |
1575 | ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE); | |
1576 | if (ret) | |
6c7c23cc | 1577 | pr_warn("%s: SATA registration failed: %d\n", __func__, ret); |
810198bc RS |
1578 | |
1579 | da850_evm_setup_mac_addr(); | |
0fbc5592 SR |
1580 | } |
1581 | ||
1582 | #ifdef CONFIG_SERIAL_8250_CONSOLE | |
1583 | static int __init da850_evm_console_init(void) | |
1584 | { | |
1aa5f2a9 MW |
1585 | if (!machine_is_davinci_da850_evm()) |
1586 | return 0; | |
1587 | ||
0fbc5592 SR |
1588 | return add_preferred_console("ttyS", 2, "115200"); |
1589 | } | |
1590 | console_initcall(da850_evm_console_init); | |
1591 | #endif | |
1592 | ||
0fbc5592 SR |
1593 | static void __init da850_evm_map_io(void) |
1594 | { | |
1595 | da850_init(); | |
1596 | } | |
1597 | ||
48ea89ea | 1598 | MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM") |
e7e56014 | 1599 | .atag_offset = 0x100, |
0fbc5592 | 1600 | .map_io = da850_evm_map_io, |
bd808947 | 1601 | .init_irq = cp_intc_init, |
6bb27d73 | 1602 | .init_time = davinci_timer_init, |
0fbc5592 | 1603 | .init_machine = da850_evm_init, |
3aa3e840 | 1604 | .init_late = davinci_init_late, |
f68deabf | 1605 | .dma_zone_size = SZ_128M, |
c6121ddd | 1606 | .restart = da8xx_restart, |
0fbc5592 | 1607 | MACHINE_END |