projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ARM: mach-davinci: move from ARM_DMA_ZONE_SIZE to mdesc->dma_zone_size
[deliverable/linux.git] / arch / arm / mach-davinci / board-da850-evm.c
CommitLineData
0fbc5592
SR		 1/*
2 * TI DA850/OMAP-L138 EVM board
3 *
4 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
7 * Original Copyrights follow:
8 *
9 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
10 * the terms of the GNU General Public License version 2. This program
11 * is licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 */
14#include <linux/kernel.h>
0fbc5592
SR		 15#include <linux/init.h>
16#include <linux/console.h>
17#include <linux/i2c.h>
18#include <linux/i2c/at24.h>
75e2ea64 19#include <linux/i2c/pca953x.h>
75929f5e 20#include <linux/input.h>
0bc20bba 21#include <linux/mfd/tps6507x.h>
5cbdf276 22#include <linux/gpio.h>
75929f5e 23#include <linux/gpio_keys.h>
38beb929
SR		 24#include <linux/platform_device.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h>
7c5ec609 28#include <linux/mtd/physmap.h>
a9eb1f67 29#include <linux/regulator/machine.h>
8b24599e 30#include <linux/regulator/tps6507x.h>
da1e3680 31#include <linux/input/tps6507x-ts.h>
fdce5568
SN		 32#include <linux/spi/spi.h>
33#include <linux/spi/flash.h>
0fbc5592
SR		 34
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37
0fbc5592
SR		 38#include <mach/cp_intc.h>
39#include <mach/da8xx.h>
38beb929 40#include <mach/nand.h>
7761ef67 41#include <mach/mux.h>
18a8505c 42#include <mach/aemif.h>
fdce5568 43#include <mach/spi.h>
0fbc5592 44
782f2d78 45#define DA850_EVM_PHY_ID "0:00"
7761ef67 46#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276 47#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276 48
700691f2
SR		 49#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
50#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
51
2206771c
C		 52#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
53
fdce5568
SN		 54static struct mtd_partition da850evm_spiflash_part[] = {
55 [0] = {
56 .name = "UBL",
57 .offset = 0,
58 .size = SZ_64K,
59 .mask_flags = MTD_WRITEABLE,
60 },
61 [1] = {
62 .name = "U-Boot",
63 .offset = MTDPART_OFS_APPEND,
64 .size = SZ_512K,
65 .mask_flags = MTD_WRITEABLE,
66 },
67 [2] = {
68 .name = "U-Boot-Env",
69 .offset = MTDPART_OFS_APPEND,
70 .size = SZ_64K,
71 .mask_flags = MTD_WRITEABLE,
72 },
73 [3] = {
74 .name = "Kernel",
75 .offset = MTDPART_OFS_APPEND,
76 .size = SZ_2M + SZ_512K,
77 .mask_flags = 0,
78 },
79 [4] = {
80 .name = "Filesystem",
81 .offset = MTDPART_OFS_APPEND,
82 .size = SZ_4M,
83 .mask_flags = 0,
84 },
85 [5] = {
86 .name = "MAC-Address",
87 .offset = SZ_8M - SZ_64K,
88 .size = SZ_64K,
89 .mask_flags = MTD_WRITEABLE,
90 },
91};
92
93static struct flash_platform_data da850evm_spiflash_data = {
94 .name = "m25p80",
95 .parts = da850evm_spiflash_part,
96 .nr_parts = ARRAY_SIZE(da850evm_spiflash_part),
97 .type = "m25p64",
98};
99
100static struct davinci_spi_config da850evm_spiflash_cfg = {
101 .io_type = SPI_IO_TYPE_DMA,
102 .c2tdelay = 8,
103 .t2cdelay = 8,
104};
105
106static struct spi_board_info da850evm_spi_info[] = {
107 {
108 .modalias = "m25p80",
109 .platform_data = &da850evm_spiflash_data,
110 .controller_data = &da850evm_spiflash_cfg,
111 .mode = SPI_MODE_0,
112 .max_speed_hz = 30000000,
113 .bus_num = 1,
114 .chip_select = 0,
115 },
116};
117
7c5ec609
SR		 118static struct mtd_partition da850_evm_norflash_partition[] = {
119 {
e2abd5a2 120 .name = "bootloaders + env",
7c5ec609 121 .offset = 0,
e2abd5a2
SR		 122 .size = SZ_512K,
123 .mask_flags = MTD_WRITEABLE,
124 },
125 {
126 .name = "kernel",
127 .offset = MTDPART_OFS_APPEND,
128 .size = SZ_2M,
129 .mask_flags = 0,
130 },
131 {
132 .name = "filesystem",
133 .offset = MTDPART_OFS_APPEND,
7c5ec609
SR		 134 .size = MTDPART_SIZ_FULL,
135 .mask_flags = 0,
136 },
137};
138
139static struct physmap_flash_data da850_evm_norflash_data = {
140 .width = 2,
141 .parts = da850_evm_norflash_partition,
142 .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
143};
144
145static struct resource da850_evm_norflash_resource[] = {
146 {
147 .start = DA8XX_AEMIF_CS2_BASE,
148 .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
149 .flags = IORESOURCE_MEM,
150 },
151};
152
153static struct platform_device da850_evm_norflash_device = {
154 .name = "physmap-flash",
155 .id = 0,
156 .dev = {
157 .platform_data = &da850_evm_norflash_data,
158 },
159 .num_resources = 1,
160 .resource = da850_evm_norflash_resource,
161};
162
63534443
SN		 163static struct davinci_pm_config da850_pm_pdata = {
164 .sleepcount = 128,
165};
166
167static struct platform_device da850_pm_device = {
168 .name = "pm-davinci",
169 .dev = {
170 .platform_data = &da850_pm_pdata,
171 },
172 .id = -1,
173};
174
38beb929
SR		 175/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
176 * (128K blocks). It may be used instead of the (default) SPI flash
177 * to boot, using TI's tools to install the secondary boot loader
178 * (UBL) and U-Boot.
179 */
db549d22 180static struct mtd_partition da850_evm_nandflash_partition[] = {
38beb929
SR		 181 {
182 .name = "u-boot env",
183 .offset = 0,
184 .size = SZ_128K,
185 .mask_flags = MTD_WRITEABLE,
186 },
187 {
188 .name = "UBL",
189 .offset = MTDPART_OFS_APPEND,
190 .size = SZ_128K,
191 .mask_flags = MTD_WRITEABLE,
192 },
193 {
194 .name = "u-boot",
195 .offset = MTDPART_OFS_APPEND,
196 .size = 4 * SZ_128K,
197 .mask_flags = MTD_WRITEABLE,
198 },
199 {
200 .name = "kernel",
201 .offset = 0x200000,
202 .size = SZ_2M,
203 .mask_flags = 0,
204 },
205 {
206 .name = "filesystem",
207 .offset = MTDPART_OFS_APPEND,
208 .size = MTDPART_SIZ_FULL,
209 .mask_flags = 0,
210 },
211};
212
18a8505c
SN		 213static struct davinci_aemif_timing da850_evm_nandflash_timing = {
214 .wsetup = 24,
215 .wstrobe = 21,
216 .whold = 14,
217 .rsetup = 19,
218 .rstrobe = 50,
219 .rhold = 0,
220 .ta = 20,
221};
222
38beb929
SR		 223static struct davinci_nand_pdata da850_evm_nandflash_data = {
224 .parts = da850_evm_nandflash_partition,
225 .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
226 .ecc_mode = NAND_ECC_HW,
fc42e335 227 .ecc_bits = 4,
38beb929 228 .options = NAND_USE_FLASH_BBT,
18a8505c 229 .timing = &da850_evm_nandflash_timing,
38beb929
SR		 230};
231
232static struct resource da850_evm_nandflash_resource[] = {
233 {
234 .start = DA8XX_AEMIF_CS3_BASE,
235 .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
236 .flags = IORESOURCE_MEM,
237 },
238 {
239 .start = DA8XX_AEMIF_CTL_BASE,
240 .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
241 .flags = IORESOURCE_MEM,
242 },
243};
244
245static struct platform_device da850_evm_nandflash_device = {
246 .name = "davinci_nand",
247 .id = 1,
248 .dev = {
249 .platform_data = &da850_evm_nandflash_data,
250 },
251 .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
252 .resource = da850_evm_nandflash_resource,
253};
254
039c5ee3
SR		 255static struct platform_device *da850_evm_devices[] __initdata = {
256 &da850_evm_nandflash_device,
257 &da850_evm_norflash_device,
258};
259
260#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
261#define DA8XX_AEMIF_ASIZE_16BIT 0x1
262
263static void __init da850_evm_init_nor(void)
264{
265 void __iomem *aemif_addr;
266
267 aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
268
269 /* Configure data bus width of CS2 to 16 bit */
270 writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
271 DA8XX_AEMIF_ASIZE_16BIT,
272 aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
273
274 iounmap(aemif_addr);
275}
276
f48ecc2f
SS		 277static const short da850_evm_nand_pins[] = {
278 DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
279 DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
280 DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
281 DA850_NEMA_WE, DA850_NEMA_OE,
282 -1
283};
284
285static const short da850_evm_nor_pins[] = {
286 DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
287 DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
288 DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
289 DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
290 DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
291 DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
292 DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
293 DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
294 DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
295 DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
296 DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
297 DA850_EMA_A_22, DA850_EMA_A_23,
298 -1
299};
300
039c5ee3
SR		 301#if defined(CONFIG_MMC_DAVINCI) || \
302 defined(CONFIG_MMC_DAVINCI_MODULE)
303#define HAS_MMC 1
304#else
305#define HAS_MMC 0
306#endif
307
f48ecc2f 308static inline void da850_evm_setup_nor_nand(void)
039c5ee3
SR		 309{
310 int ret = 0;
311
b688c2fb 312 if (!HAS_MMC) {
f48ecc2f 313 ret = davinci_cfg_reg_list(da850_evm_nand_pins);
039c5ee3
SR		 314 if (ret)
315 pr_warning("da850_evm_init: nand mux setup failed: "
316 "%d\n", ret);
317
f48ecc2f 318 ret = davinci_cfg_reg_list(da850_evm_nor_pins);
039c5ee3
SR		 319 if (ret)
320 pr_warning("da850_evm_init: nor mux setup failed: %d\n",
321 ret);
322
323 da850_evm_init_nor();
324
325 platform_add_devices(da850_evm_devices,
326 ARRAY_SIZE(da850_evm_devices));
327 }
328}
75e2ea64 329
bae10587
SN		 330#ifdef CONFIG_DA850_UI_RMII
331static inline void da850_evm_setup_emac_rmii(int rmii_sel)
332{
333 struct davinci_soc_info *soc_info = &davinci_soc_info;
334
335 soc_info->emac_pdata->rmii_en = 1;
47e7cb14 336 gpio_set_value_cansleep(rmii_sel, 0);
bae10587
SN		 337}
338#else
339static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
340#endif
341
75929f5e
BG		 342
343#define DA850_KEYS_DEBOUNCE_MS 10
344/*
345 * At 200ms polling interval it is possible to miss an
346 * event by tapping very lightly on the push button but most
347 * pushes do result in an event; longer intervals require the
348 * user to hold the button whereas shorter intervals require
349 * more CPU time for polling.
350 */
351#define DA850_GPIO_KEYS_POLL_MS 200
352
353enum da850_evm_ui_exp_pins {
354 DA850_EVM_UI_EXP_SEL_C = 5,
355 DA850_EVM_UI_EXP_SEL_B,
356 DA850_EVM_UI_EXP_SEL_A,
357 DA850_EVM_UI_EXP_PB8,
358 DA850_EVM_UI_EXP_PB7,
359 DA850_EVM_UI_EXP_PB6,
360 DA850_EVM_UI_EXP_PB5,
361 DA850_EVM_UI_EXP_PB4,
362 DA850_EVM_UI_EXP_PB3,
363 DA850_EVM_UI_EXP_PB2,
364 DA850_EVM_UI_EXP_PB1,
365};
366
367static const char const *da850_evm_ui_exp[] = {
368 [DA850_EVM_UI_EXP_SEL_C] = "sel_c",
369 [DA850_EVM_UI_EXP_SEL_B] = "sel_b",
370 [DA850_EVM_UI_EXP_SEL_A] = "sel_a",
371 [DA850_EVM_UI_EXP_PB8] = "pb8",
372 [DA850_EVM_UI_EXP_PB7] = "pb7",
373 [DA850_EVM_UI_EXP_PB6] = "pb6",
374 [DA850_EVM_UI_EXP_PB5] = "pb5",
375 [DA850_EVM_UI_EXP_PB4] = "pb4",
376 [DA850_EVM_UI_EXP_PB3] = "pb3",
377 [DA850_EVM_UI_EXP_PB2] = "pb2",
378 [DA850_EVM_UI_EXP_PB1] = "pb1",
379};
380
381#define DA850_N_UI_PB 8
382
383static struct gpio_keys_button da850_evm_ui_keys[] = {
384 [0 ... DA850_N_UI_PB - 1] = {
385 .type = EV_KEY,
386 .active_low = 1,
387 .wakeup = 0,
388 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
389 .code = -1, /* assigned at runtime */
390 .gpio = -1, /* assigned at runtime */
391 .desc = NULL, /* assigned at runtime */
392 },
393};
394
395static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = {
396 .buttons = da850_evm_ui_keys,
397 .nbuttons = ARRAY_SIZE(da850_evm_ui_keys),
398 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
399};
400
401static struct platform_device da850_evm_ui_keys_device = {
402 .name = "gpio-keys-polled",
403 .id = 0,
404 .dev = {
405 .platform_data = &da850_evm_ui_keys_pdata
406 },
407};
408
409static void da850_evm_ui_keys_init(unsigned gpio)
410{
411 int i;
412 struct gpio_keys_button *button;
413
414 for (i = 0; i < DA850_N_UI_PB; i++) {
415 button = &da850_evm_ui_keys[i];
416 button->code = KEY_F8 - i;
417 button->desc = (char *)
418 da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i];
419 button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i;
420 }
421}
422
75e2ea64
C		 423static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
424 unsigned ngpio, void *c)
425{
426 int sel_a, sel_b, sel_c, ret;
427
53c2897d
BG		 428 sel_a = gpio + DA850_EVM_UI_EXP_SEL_A;
429 sel_b = gpio + DA850_EVM_UI_EXP_SEL_B;
430 sel_c = gpio + DA850_EVM_UI_EXP_SEL_C;
75e2ea64 431
53c2897d 432 ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]);
75e2ea64
C		 433 if (ret) {
434 pr_warning("Cannot open UI expander pin %d\n", sel_a);
435 goto exp_setup_sela_fail;
436 }
437
53c2897d 438 ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]);
75e2ea64
C		 439 if (ret) {
440 pr_warning("Cannot open UI expander pin %d\n", sel_b);
441 goto exp_setup_selb_fail;
442 }
443
53c2897d 444 ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]);
75e2ea64
C		 445 if (ret) {
446 pr_warning("Cannot open UI expander pin %d\n", sel_c);
447 goto exp_setup_selc_fail;
448 }
449
450 /* deselect all functionalities */
451 gpio_direction_output(sel_a, 1);
452 gpio_direction_output(sel_b, 1);
453 gpio_direction_output(sel_c, 1);
454
75929f5e
BG		 455 da850_evm_ui_keys_init(gpio);
456 ret = platform_device_register(&da850_evm_ui_keys_device);
457 if (ret) {
458 pr_warning("Could not register UI GPIO expander push-buttons");
459 goto exp_setup_keys_fail;
460 }
461
75e2ea64
C		 462 pr_info("DA850/OMAP-L138 EVM UI card detected\n");
463
464 da850_evm_setup_nor_nand();
465
bae10587 466 da850_evm_setup_emac_rmii(sel_a);
2206771c 467
75e2ea64
C		 468 return 0;
469
75929f5e
BG		 470exp_setup_keys_fail:
471 gpio_free(sel_c);
75e2ea64
C		 472exp_setup_selc_fail:
473 gpio_free(sel_b);
474exp_setup_selb_fail:
475 gpio_free(sel_a);
476exp_setup_sela_fail:
477 return ret;
478}
479
480static int da850_evm_ui_expander_teardown(struct i2c_client *client,
481 unsigned gpio, unsigned ngpio, void *c)
482{
75929f5e
BG		 483 platform_device_unregister(&da850_evm_ui_keys_device);
484
75e2ea64 485 /* deselect all functionalities */
53c2897d
BG		 486 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1);
487 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1);
488 gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1);
75e2ea64 489
53c2897d
BG		 490 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C);
491 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B);
492 gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A);
75e2ea64
C		 493
494 return 0;
495}
496
70b30939
BG		 497/* assign the baseboard expander's GPIOs after the UI board's */
498#define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp)
499#define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS)
500
501enum da850_evm_bb_exp_pins {
502 DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0,
503 DA850_EVM_BB_EXP_SW_RST,
504 DA850_EVM_BB_EXP_TP_23,
505 DA850_EVM_BB_EXP_TP_22,
506 DA850_EVM_BB_EXP_TP_21,
507 DA850_EVM_BB_EXP_USER_PB1,
508 DA850_EVM_BB_EXP_USER_LED2,
509 DA850_EVM_BB_EXP_USER_LED1,
510 DA850_EVM_BB_EXP_USER_SW1,
511 DA850_EVM_BB_EXP_USER_SW2,
512 DA850_EVM_BB_EXP_USER_SW3,
513 DA850_EVM_BB_EXP_USER_SW4,
514 DA850_EVM_BB_EXP_USER_SW5,
515 DA850_EVM_BB_EXP_USER_SW6,
516 DA850_EVM_BB_EXP_USER_SW7,
517 DA850_EVM_BB_EXP_USER_SW8
518};
519
520static const char const *da850_evm_bb_exp[] = {
521 [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en",
522 [DA850_EVM_BB_EXP_SW_RST] = "sw_rst",
523 [DA850_EVM_BB_EXP_TP_23] = "tp_23",
524 [DA850_EVM_BB_EXP_TP_22] = "tp_22",
525 [DA850_EVM_BB_EXP_TP_21] = "tp_21",
526 [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1",
527 [DA850_EVM_BB_EXP_USER_LED2] = "user_led2",
528 [DA850_EVM_BB_EXP_USER_LED1] = "user_led1",
529 [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1",
530 [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2",
531 [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3",
532 [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4",
533 [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5",
534 [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6",
535 [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7",
536 [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8",
537};
538
539#define DA850_N_BB_USER_SW 8
540
541static struct gpio_keys_button da850_evm_bb_keys[] = {
542 [0] = {
543 .type = EV_KEY,
544 .active_low = 1,
545 .wakeup = 0,
546 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
547 .code = KEY_PROG1,
548 .desc = NULL, /* assigned at runtime */
549 .gpio = -1, /* assigned at runtime */
550 },
551 [1 ... DA850_N_BB_USER_SW] = {
552 .type = EV_SW,
553 .active_low = 1,
554 .wakeup = 0,
555 .debounce_interval = DA850_KEYS_DEBOUNCE_MS,
556 .code = -1, /* assigned at runtime */
557 .desc = NULL, /* assigned at runtime */
558 .gpio = -1, /* assigned at runtime */
559 },
560};
561
562static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = {
563 .buttons = da850_evm_bb_keys,
564 .nbuttons = ARRAY_SIZE(da850_evm_bb_keys),
565 .poll_interval = DA850_GPIO_KEYS_POLL_MS,
566};
567
568static struct platform_device da850_evm_bb_keys_device = {
569 .name = "gpio-keys-polled",
570 .id = 1,
571 .dev = {
572 .platform_data = &da850_evm_bb_keys_pdata
573 },
574};
575
576static void da850_evm_bb_keys_init(unsigned gpio)
577{
578 int i;
579 struct gpio_keys_button *button;
580
581 button = &da850_evm_bb_keys[0];
582 button->desc = (char *)
583 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1];
584 button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1;
585
586 for (i = 0; i < DA850_N_BB_USER_SW; i++) {
587 button = &da850_evm_bb_keys[i + 1];
588 button->code = SW_LID + i;
589 button->desc = (char *)
590 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i];
591 button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i;
592 }
593}
594
595#define DA850_N_BB_USER_LED 2
596
597static struct gpio_led da850_evm_bb_leds[] = {
598 [0 ... DA850_N_BB_USER_LED - 1] = {
599 .active_low = 1,
600 .gpio = -1, /* assigned at runtime */
601 .name = NULL, /* assigned at runtime */
602 },
603};
604
605static struct gpio_led_platform_data da850_evm_bb_leds_pdata = {
606 .leds = da850_evm_bb_leds,
607 .num_leds = ARRAY_SIZE(da850_evm_bb_leds),
608};
609
610static struct platform_device da850_evm_bb_leds_device = {
611 .name = "leds-gpio",
612 .id = -1,
613 .dev = {
614 .platform_data = &da850_evm_bb_leds_pdata
615 }
616};
617
618static void da850_evm_bb_leds_init(unsigned gpio)
619{
620 int i;
621 struct gpio_led *led;
622
623 for (i = 0; i < DA850_N_BB_USER_LED; i++) {
624 led = &da850_evm_bb_leds[i];
625
626 led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
627 led->name =
628 da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
629 }
630}
631
632static int da850_evm_bb_expander_setup(struct i2c_client *client,
633 unsigned gpio, unsigned ngpio,
634 void *c)
635{
636 int ret;
637
638 /*
639 * Register the switches and pushbutton on the baseboard as a gpio-keys
640 * device.
641 */
642 da850_evm_bb_keys_init(gpio);
643 ret = platform_device_register(&da850_evm_bb_keys_device);
644 if (ret) {
645 pr_warning("Could not register baseboard GPIO expander keys");
646 goto io_exp_setup_sw_fail;
647 }
648
649 da850_evm_bb_leds_init(gpio);
650 ret = platform_device_register(&da850_evm_bb_leds_device);
651 if (ret) {
652 pr_warning("Could not register baseboard GPIO expander LEDS");
653 goto io_exp_setup_leds_fail;
654 }
655
656 return 0;
657
658io_exp_setup_leds_fail:
659 platform_device_unregister(&da850_evm_bb_keys_device);
660io_exp_setup_sw_fail:
661 return ret;
662}
663
664static int da850_evm_bb_expander_teardown(struct i2c_client *client,
665 unsigned gpio, unsigned ngpio, void *c)
666{
667 platform_device_unregister(&da850_evm_bb_leds_device);
668 platform_device_unregister(&da850_evm_bb_keys_device);
669
670 return 0;
671}
672
75e2ea64
C		 673static struct pca953x_platform_data da850_evm_ui_expander_info = {
674 .gpio_base = DAVINCI_N_GPIO,
675 .setup = da850_evm_ui_expander_setup,
676 .teardown = da850_evm_ui_expander_teardown,
75929f5e 677 .names = da850_evm_ui_exp,
75e2ea64
C		 678};
679
70b30939
BG		 680static struct pca953x_platform_data da850_evm_bb_expander_info = {
681 .gpio_base = DA850_BB_EXPANDER_GPIO_BASE,
682 .setup = da850_evm_bb_expander_setup,
683 .teardown = da850_evm_bb_expander_teardown,
684 .names = da850_evm_bb_exp,
685};
686
1a7ff8ff
C		 687static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
688 {
689 I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64
C		 690 },
691 {
692 I2C_BOARD_INFO("tca6416", 0x20),
693 .platform_data = &da850_evm_ui_expander_info,
694 },
70b30939
BG		 695 {
696 I2C_BOARD_INFO("tca6416", 0x21),
697 .platform_data = &da850_evm_bb_expander_info,
698 },
1a7ff8ff
C		 699};
700
0fbc5592
SR		 701static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
702 .bus_freq = 100, /* kHz */
703 .bus_delay = 0, /* usec */
704};
705
706static struct davinci_uart_config da850_evm_uart_config __initdata = {
707 .enabled_uarts = 0x7,
708};
709
491214e1
C		 710/* davinci da850 evm audio machine driver */
711static u8 da850_iis_serializer_direction[] = {
712 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
713 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
714 INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
715 RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
716};
717
718static struct snd_platform_data da850_evm_snd_data = {
719 .tx_dma_offset = 0x2000,
720 .rx_dma_offset = 0x2000,
721 .op_mode = DAVINCI_MCASP_IIS_MODE,
722 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
723 .tdm_slots = 2,
724 .serial_dir = da850_iis_serializer_direction,
48519f0a 725 .asp_chan_q = EVENTQ_1,
491214e1
C		 726 .version = MCASP_VERSION_2,
727 .txnumevt = 1,
728 .rxnumevt = 1,
729};
730
c840fc74
MW		 731static const short da850_evm_mcasp_pins[] __initconst = {
732 DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
733 DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,
734 DA850_AXR_11, DA850_AXR_12,
735 -1
736};
737
700691f2
SR		 738static int da850_evm_mmc_get_ro(int index)
739{
740 return gpio_get_value(DA850_MMCSD_WP_PIN);
741}
742
743static int da850_evm_mmc_get_cd(int index)
744{
745 return !gpio_get_value(DA850_MMCSD_CD_PIN);
746}
747
748static struct davinci_mmc_config da850_mmc_config = {
749 .get_ro = da850_evm_mmc_get_ro,
750 .get_cd = da850_evm_mmc_get_cd,
751 .wires = 4,
0046d0bf
C		 752 .max_freq = 50000000,
753 .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
700691f2
SR		 754 .version = MMC_CTLR_VERSION_2,
755};
756
5a0d80ea
MW		 757static const short da850_evm_mmcsd0_pins[] __initconst = {
758 DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2,
759 DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD,
760 DA850_GPIO4_0, DA850_GPIO4_1,
761 -1
762};
763
d52f235f
C		 764static void da850_panel_power_ctrl(int val)
765{
766 /* lcd backlight */
767 gpio_set_value(DA850_LCD_BL_PIN, val);
768
769 /* lcd power */
770 gpio_set_value(DA850_LCD_PWR_PIN, val);
771}
772
5cbdf276
SR		 773static int da850_lcd_hw_init(void)
774{
775 int status;
776
777 status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
778 if (status < 0)
779 return status;
780
781 status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
782 if (status < 0) {
783 gpio_free(DA850_LCD_BL_PIN);
784 return status;
785 }
786
787 gpio_direction_output(DA850_LCD_BL_PIN, 0);
788 gpio_direction_output(DA850_LCD_PWR_PIN, 0);
789
d52f235f
C		 790 /* Switch off panel power and backlight */
791 da850_panel_power_ctrl(0);
5cbdf276 792
d52f235f
C		 793 /* Switch on panel power and backlight */
794 da850_panel_power_ctrl(1);
5cbdf276
SR		 795
796 return 0;
797}
491214e1 798
a9eb1f67
SN		 799/* TPS65070 voltage regulator support */
800
801/* 3.3V */
db549d22 802static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
a9eb1f67
SN		 803 {
804 .supply = "usb0_vdda33",
805 },
806 {
807 .supply = "usb1_vdda33",
808 },
809};
810
811/* 3.3V or 1.8V */
db549d22 812static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
a9eb1f67
SN		 813 {
814 .supply = "dvdd3318_a",
815 },
816 {
817 .supply = "dvdd3318_b",
818 },
819 {
820 .supply = "dvdd3318_c",
821 },
822};
823
824/* 1.2V */
db549d22 825static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
a9eb1f67
SN		 826 {
827 .supply = "cvdd",
828 },
829};
830
831/* 1.8V LDO */
db549d22 832static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
a9eb1f67
SN		 833 {
834 .supply = "sata_vddr",
835 },
836 {
837 .supply = "usb0_vdda18",
838 },
839 {
840 .supply = "usb1_vdda18",
841 },
842 {
843 .supply = "ddr_dvdd18",
844 },
845};
846
847/* 1.2V LDO */
db549d22 848static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
a9eb1f67
SN		 849 {
850 .supply = "sata_vdd",
851 },
852 {
853 .supply = "pll0_vdda",
854 },
855 {
856 .supply = "pll1_vdda",
857 },
858 {
859 .supply = "usbs_cvdd",
860 },
861 {
862 .supply = "vddarnwa1",
863 },
864};
865
8b24599e
SN		 866/* We take advantage of the fact that both defdcdc{2,3} are tied high */
867static struct tps6507x_reg_platform_data tps6507x_platform_data = {
868 .defdcdc_default = true,
869};
870
db549d22 871static struct regulator_init_data tps65070_regulator_data[] = {
a9eb1f67
SN		 872 /* dcdc1 */
873 {
874 .constraints = {
875 .min_uV = 3150000,
876 .max_uV = 3450000,
877 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
878 REGULATOR_CHANGE_STATUS),
879 .boot_on = 1,
880 },
881 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
882 .consumer_supplies = tps65070_dcdc1_consumers,
883 },
884
885 /* dcdc2 */
886 {
887 .constraints = {
888 .min_uV = 1710000,
889 .max_uV = 3450000,
890 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
891 REGULATOR_CHANGE_STATUS),
892 .boot_on = 1,
893 },
894 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
895 .consumer_supplies = tps65070_dcdc2_consumers,
8b24599e 896 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 897 },
898
899 /* dcdc3 */
900 {
901 .constraints = {
902 .min_uV = 950000,
28bd2c34 903 .max_uV = 1350000,
a9eb1f67
SN		 904 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
905 REGULATOR_CHANGE_STATUS),
906 .boot_on = 1,
907 },
908 .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
909 .consumer_supplies = tps65070_dcdc3_consumers,
8b24599e 910 .driver_data = &tps6507x_platform_data,
a9eb1f67
SN		 911 },
912
913 /* ldo1 */
914 {
915 .constraints = {
916 .min_uV = 1710000,
917 .max_uV = 1890000,
918 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
919 REGULATOR_CHANGE_STATUS),
920 .boot_on = 1,
921 },
922 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
923 .consumer_supplies = tps65070_ldo1_consumers,
924 },
925
926 /* ldo2 */
927 {
928 .constraints = {
929 .min_uV = 1140000,
930 .max_uV = 1320000,
931 .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
932 REGULATOR_CHANGE_STATUS),
933 .boot_on = 1,
934 },
935 .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
936 .consumer_supplies = tps65070_ldo2_consumers,
937 },
938};
939
da1e3680
TF		 940static struct touchscreen_init_data tps6507x_touchscreen_data = {
941 .poll_period = 30, /* ms between touch samples */
942 .min_pressure = 0x30, /* minimum pressure to trigger touch */
943 .vref = 0, /* turn off vref when not using A/D */
944 .vendor = 0, /* /sys/class/input/input?/id/vendor */
945 .product = 65070, /* /sys/class/input/input?/id/product */
946 .version = 0x100, /* /sys/class/input/input?/id/version */
947};
948
0bc20bba
TF		 949static struct tps6507x_board tps_board = {
950 .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
da1e3680 951 .tps6507x_ts_init_data = &tps6507x_touchscreen_data,
0bc20bba
TF		 952};
953
3506f277 954static struct i2c_board_info __initdata da850_evm_tps65070_info[] = {
a9eb1f67
SN		 955 {
956 I2C_BOARD_INFO("tps6507x", 0x48),
0bc20bba 957 .platform_data = &tps_board,
a9eb1f67
SN		 958 },
959};
960
961static int __init pmic_tps65070_init(void)
962{
3506f277
BG		 963 return i2c_register_board_info(1, da850_evm_tps65070_info,
964 ARRAY_SIZE(da850_evm_tps65070_info));
a9eb1f67
SN		 965}
966
7761ef67
SR		 967static const short da850_evm_lcdc_pins[] = {
968 DA850_GPIO2_8, DA850_GPIO2_15,
969 -1
970};
971
85b8307f
SS		 972static const short da850_evm_mii_pins[] = {
973 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
974 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
975 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
976 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
977 DA850_MDIO_D,
978 -1
979};
980
981static const short da850_evm_rmii_pins[] = {
982 DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
983 DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
984 DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
985 DA850_MDIO_D,
986 -1
987};
988
bae10587 989static int __init da850_evm_config_emac(void)
2206771c
C		 990{
991 void __iomem *cfg_chip3_base;
992 int ret;
993 u32 val;
bae10587
SN		 994 struct davinci_soc_info *soc_info = &davinci_soc_info;
995 u8 rmii_en = soc_info->emac_pdata->rmii_en;
996
997 if (!machine_is_davinci_da850_evm())
998 return 0;
2206771c 999
d2de0582 1000 cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c 1001
2206771c 1002 val = __raw_readl(cfg_chip3_base);
17fadd9a
SN		 1003
1004 if (rmii_en) {
2206771c 1005 val |= BIT(8);
85b8307f 1006 ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
17fadd9a
SN		 1007 pr_info("EMAC: RMII PHY configured, MII PHY will not be"
1008 " functional\n");
1009 } else {
2206771c 1010 val &= ~BIT(8);
85b8307f 1011 ret = davinci_cfg_reg_list(da850_evm_mii_pins);
17fadd9a
SN		 1012 pr_info("EMAC: MII PHY configured, RMII PHY will not be"
1013 " functional\n");
1014 }
1015
2206771c
C		 1016 if (ret)
1017 pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
1018 ret);
1019
17fadd9a
SN		 1020 /* configure the CFGCHIP3 register for RMII or MII */
1021 __raw_writel(val, cfg_chip3_base);
1022
2206771c
C		 1023 ret = davinci_cfg_reg(DA850_GPIO2_6);
1024 if (ret)
1025 pr_warning("da850_evm_init:GPIO(2,6) mux setup "
1026 "failed\n");
1027
1028 ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
1029 if (ret) {
1030 pr_warning("Cannot open GPIO %d\n",
1031 DA850_MII_MDIO_CLKEN_PIN);
1032 return ret;
1033 }
1034
17fadd9a
SN		 1035 /* Enable/Disable MII MDIO clock */
1036 gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c 1037
782f2d78 1038 soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
bae10587
SN		 1039
1040 ret = da8xx_register_emac();
1041 if (ret)
1042 pr_warning("da850_evm_init: emac registration failed: %d\n",
1043 ret);
1044
2206771c
C		 1045 return 0;
1046}
bae10587 1047device_initcall(da850_evm_config_emac);
2206771c 1048
a941c503
RS		 1049/*
1050 * The following EDMA channels/slots are not being used by drivers (for
1051 * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
1052 * they are being reserved for codecs on the DSP side.
1053 */
1054static const s16 da850_dma0_rsv_chans[][2] = {
1055 /* (offset, number) */
1056 { 8, 6},
1057 {24, 4},
1058 {30, 2},
1059 {-1, -1}
1060};
1061
1062static const s16 da850_dma0_rsv_slots[][2] = {
1063 /* (offset, number) */
1064 { 8, 6},
1065 {24, 4},
1066 {30, 50},
1067 {-1, -1}
1068};
1069
1070static const s16 da850_dma1_rsv_chans[][2] = {
1071 /* (offset, number) */
1072 { 0, 28},
1073 {30, 2},
1074 {-1, -1}
1075};
1076
1077static const s16 da850_dma1_rsv_slots[][2] = {
1078 /* (offset, number) */
1079 { 0, 28},
1080 {30, 90},
1081 {-1, -1}
1082};
1083
1084static struct edma_rsv_info da850_edma_cc0_rsv = {
1085 .rsv_chans = da850_dma0_rsv_chans,
1086 .rsv_slots = da850_dma0_rsv_slots,
1087};
1088
1089static struct edma_rsv_info da850_edma_cc1_rsv = {
1090 .rsv_chans = da850_dma1_rsv_chans,
1091 .rsv_slots = da850_dma1_rsv_slots,
1092};
1093
1094static struct edma_rsv_info *da850_edma_rsv[2] = {
1095 &da850_edma_cc0_rsv,
1096 &da850_edma_cc1_rsv,
1097};
1098
28bd2c34
SN		 1099#ifdef CONFIG_CPU_FREQ
1100static __init int da850_evm_init_cpufreq(void)
1101{
1102 switch (system_rev & 0xF) {
1103 case 3:
1104 da850_max_speed = 456000;
1105 break;
1106 case 2:
1107 da850_max_speed = 408000;
1108 break;
1109 case 1:
1110 da850_max_speed = 372000;
1111 break;
1112 }
1113
1114 return da850_register_cpufreq("pll0_sysclk3");
1115}
1116#else
1117static __init int da850_evm_init_cpufreq(void) { return 0; }
1118#endif
1119
0fbc5592
SR		 1120static __init void da850_evm_init(void)
1121{
1122 int ret;
1123
a9eb1f67
SN		 1124 ret = pmic_tps65070_init();
1125 if (ret)
1126 pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
1127 ret);
1128
a941c503 1129 ret = da850_register_edma(da850_edma_rsv);
0fbc5592
SR		 1130 if (ret)
1131 pr_warning("da850_evm_init: edma registration failed: %d\n",
1132 ret);
1133
3821d10a 1134 ret = davinci_cfg_reg_list(da850_i2c0_pins);
0fbc5592
SR		 1135 if (ret)
1136 pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
1137 ret);
1138
1139 ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
1140 if (ret)
1141 pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
1142 ret);
1143
5a4b1315 1144
0fbc5592
SR		 1145 ret = da8xx_register_watchdog();
1146 if (ret)
1147 pr_warning("da830_evm_init: watchdog registration failed: %d\n",
1148 ret);
1149
820c4fe3 1150 if (HAS_MMC) {
5a0d80ea 1151 ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins);
820c4fe3
SR		 1152 if (ret)
1153 pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
1154 " %d\n", ret);
1155
1156 ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
1157 if (ret)
1158 pr_warning("da850_evm_init: can not open GPIO %d\n",
1159 DA850_MMCSD_CD_PIN);
1160 gpio_direction_input(DA850_MMCSD_CD_PIN);
1161
1162 ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
1163 if (ret)
1164 pr_warning("da850_evm_init: can not open GPIO %d\n",
1165 DA850_MMCSD_WP_PIN);
1166 gpio_direction_input(DA850_MMCSD_WP_PIN);
1167
1168 ret = da8xx_register_mmcsd0(&da850_mmc_config);
1169 if (ret)
1170 pr_warning("da850_evm_init: mmcsd0 registration failed:"
1171 " %d\n", ret);
1172 }
700691f2 1173
0fbc5592
SR		 1174 davinci_serial_init(&da850_evm_uart_config);
1175
1a7ff8ff
C		 1176 i2c_register_board_info(1, da850_evm_i2c_devices,
1177 ARRAY_SIZE(da850_evm_i2c_devices));
1178
0fbc5592
SR		 1179 /*
1180 * shut down uart 0 and 1; they are not used on the board and
1181 * accessing them causes endless "too much work in irq53" messages
1182 * with arago fs
1183 */
1184 __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
1185 __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 1186
c840fc74 1187 ret = davinci_cfg_reg_list(da850_evm_mcasp_pins);
491214e1
C		 1188 if (ret)
1189 pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
1190 ret);
1191
b8864aa4 1192 da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 1193
3821d10a 1194 ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
5cbdf276
SR		 1195 if (ret)
1196 pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
1197 ret);
1198
7761ef67 1199 /* Handle board specific muxing for LCD here */
3821d10a 1200 ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
7761ef67
SR		 1201 if (ret)
1202 pr_warning("da850_evm_init: evm specific lcd mux setup "
1203 "failed: %d\n", ret);
1204
5cbdf276
SR		 1205 ret = da850_lcd_hw_init();
1206 if (ret)
1207 pr_warning("da850_evm_init: lcd initialization failed: %d\n",
1208 ret);
1209
d52f235f 1210 sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b 1211 ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276
SR		 1212 if (ret)
1213 pr_warning("da850_evm_init: lcdc registration failed: %d\n",
1214 ret);
c51df70b
MG		 1215
1216 ret = da8xx_register_rtc();
1217 if (ret)
1218 pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 1219
28bd2c34 1220 ret = da850_evm_init_cpufreq();
09dc2d45
SN		 1221 if (ret)
1222 pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
1223 ret);
5aeb15aa
SN		 1224
1225 ret = da8xx_register_cpuidle();
1226 if (ret)
1227 pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
1228 ret);
63534443
SN		 1229
1230 ret = da850_register_pm(&da850_pm_device);
1231 if (ret)
1232 pr_warning("da850_evm_init: suspend registration failed: %d\n",
1233 ret);
fdce5568
SN		 1234
1235 ret = da8xx_register_spi(1, da850evm_spi_info,
1236 ARRAY_SIZE(da850evm_spi_info));
1237 if (ret)
1238 pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
1239 ret);
0fbc5592
SR		 1240}
1241
1242#ifdef CONFIG_SERIAL_8250_CONSOLE
1243static int __init da850_evm_console_init(void)
1244{
1aa5f2a9
MW		 1245 if (!machine_is_davinci_da850_evm())
1246 return 0;
1247
0fbc5592
SR		 1248 return add_preferred_console("ttyS", 2, "115200");
1249}
1250console_initcall(da850_evm_console_init);
1251#endif
1252
0fbc5592
SR		 1253static void __init da850_evm_map_io(void)
1254{
1255 da850_init();
1256}
1257
48ea89ea 1258MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
0fbc5592
SR		 1259 .boot_params = (DA8XX_DDR_BASE + 0x100),
1260 .map_io = da850_evm_map_io,
bd808947 1261 .init_irq = cp_intc_init,
0fbc5592
SR		 1262 .timer = &davinci_timer,
1263 .init_machine = da850_evm_init,
f68deabf 1264 .dma_zone_size = SZ_128M,
0fbc5592 1265MACHINE_END
Linux kernel - Deliverables
This page took 0.284418 seconds and 5 git commands to generate.