[deliverable/linux.git] / arch / arm / mach-davinci / board-dm644x-evm.c

/*
 * TI DaVinci EVM board support
 *
 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
 *
 * 2007 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/i2c/pcf857x.h>
#include <linux/i2c/at24.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/phy.h>
#include <linux/clk.h>
#include <linux/videodev2.h>

#include <media/tvp514x.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <mach/dm644x.h>
#include <mach/common.h>
#include <mach/i2c.h>
#include <mach/serial.h>
#include <mach/mux.h>
#include <mach/nand.h>
#include <mach/mmc.h>
#include <mach/usb.h>
#include <mach/aemif.h>

#define DM644X_EVM_PHY_ID		"0:01"
#define LXT971_PHY_ID	(0x001378e2)
#define LXT971_PHY_MASK	(0xfffffff0)

static struct mtd_partition davinci_evm_norflash_partitions[] = {
	/* bootloader (UBL, U-Boot, etc) in first 5 sectors */
	{
		.name		= "bootloader",
		.offset		= 0,
		.size		= 5 * SZ_64K,
		.mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next 1 sectors */
	{
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_64K,
		.mask_flags	= 0,
	},
	/* kernel */
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_2M,
		.mask_flags	= 0
	},
	/* file system */
	{
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0
	}
};

static struct physmap_flash_data davinci_evm_norflash_data = {
	.width		= 2,
	.parts		= davinci_evm_norflash_partitions,
	.nr_parts	= ARRAY_SIZE(davinci_evm_norflash_partitions),
};

/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
 * limits addresses to 16M, so using addresses past 16M will wrap */
static struct resource davinci_evm_norflash_resource = {
	.start		= DM644X_ASYNC_EMIF_DATA_CE0_BASE,
	.end		= DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device davinci_evm_norflash_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data	= &davinci_evm_norflash_data,
	},
	.num_resources	= 1,
	.resource	= &davinci_evm_norflash_resource,
};

/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
 * It may used instead of the (default) NOR chip to boot, using TI's
 * tools to install the secondary boot loader (UBL) and U-Boot.
 */
static struct mtd_partition davinci_evm_nandflash_partition[] = {
	/* Bootloader layout depends on whose u-boot is installed, but we
	 * can hide all the details.
	 *  - block 0 for u-boot environment ... in mainline u-boot
	 *  - block 1 for UBL (plus up to four backup copies in blocks 2..5)
	 *  - blocks 6...? for u-boot
	 *  - blocks 16..23 for u-boot environment ... in TI's u-boot
	 */
	{
		.name		= "bootloader",
		.offset		= 0,
		.size		= SZ_256K + SZ_128K,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	/* Kernel */
	{
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_4M,
		.mask_flags	= 0,
	},
	/* File system (older GIT kernels started this on the 5MB mark) */
	{
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	}
	/* A few blocks at end hold a flash BBT ... created by TI's CCS
	 * using flashwriter_nand.out, but ignored by TI's versions of
	 * Linux and u-boot.  We boot faster by using them.
	 */
};

static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
	.wsetup		= 20,
	.wstrobe	= 40,
	.whold		= 20,
	.rsetup		= 10,
	.rstrobe	= 40,
	.rhold		= 10,
	.ta		= 40,
};

static struct davinci_nand_pdata davinci_evm_nandflash_data = {
	.parts		= davinci_evm_nandflash_partition,
	.nr_parts	= ARRAY_SIZE(davinci_evm_nandflash_partition),
	.ecc_mode	= NAND_ECC_HW,
	.options	= NAND_USE_FLASH_BBT,
	.timing		= &davinci_evm_nandflash_timing,
};

static struct resource davinci_evm_nandflash_resource[] = {
	{
		.start		= DM644X_ASYNC_EMIF_DATA_CE0_BASE,
		.end		= DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
		.flags		= IORESOURCE_MEM,
	}, {
		.start		= DM644X_ASYNC_EMIF_CONTROL_BASE,
		.end		= DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device davinci_evm_nandflash_device = {
	.name		= "davinci_nand",
	.id		= 0,
	.dev		= {
		.platform_data	= &davinci_evm_nandflash_data,
	},
	.num_resources	= ARRAY_SIZE(davinci_evm_nandflash_resource),
	.resource	= davinci_evm_nandflash_resource,
};

static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);

static struct platform_device davinci_fb_device = {
	.name		= "davincifb",
	.id		= -1,
	.dev = {
		.dma_mask		= &davinci_fb_dma_mask,
		.coherent_dma_mask      = DMA_BIT_MASK(32),
	},
	.num_resources = 0,
};

static struct tvp514x_platform_data tvp5146_pdata = {
	.clk_polarity = 0,
	.hs_polarity = 1,
	.vs_polarity = 1
};

#define TVP514X_STD_ALL	(V4L2_STD_NTSC | V4L2_STD_PAL)
/* Inputs available at the TVP5146 */
static struct v4l2_input tvp5146_inputs[] = {
	{
		.index = 0,
		.name = "Composite",
		.type = V4L2_INPUT_TYPE_CAMERA,
		.std = TVP514X_STD_ALL,
	},
	{
		.index = 1,
		.name = "S-Video",
		.type = V4L2_INPUT_TYPE_CAMERA,
		.std = TVP514X_STD_ALL,
	},
};

/*
 * this is the route info for connecting each input to decoder
 * ouput that goes to vpfe. There is a one to one correspondence
 * with tvp5146_inputs
 */
static struct vpfe_route tvp5146_routes[] = {
	{
		.input = INPUT_CVBS_VI2B,
		.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
	},
	{
		.input = INPUT_SVIDEO_VI2C_VI1C,
		.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
	},
};

static struct vpfe_subdev_info vpfe_sub_devs[] = {
	{
		.name = "tvp5146",
		.grp_id = 0,
		.num_inputs = ARRAY_SIZE(tvp5146_inputs),
		.inputs = tvp5146_inputs,
		.routes = tvp5146_routes,
		.can_route = 1,
		.ccdc_if_params = {
			.if_type = VPFE_BT656,
			.hdpol = VPFE_PINPOL_POSITIVE,
			.vdpol = VPFE_PINPOL_POSITIVE,
		},
		.board_info = {
			I2C_BOARD_INFO("tvp5146", 0x5d),
			.platform_data = &tvp5146_pdata,
		},
	},
};

static struct vpfe_config vpfe_cfg = {
	.num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
	.i2c_adapter_id = 1,
	.sub_devs = vpfe_sub_devs,
	.card_name = "DM6446 EVM",
	.ccdc = "DM6446 CCDC",
};

static struct platform_device rtc_dev = {
	.name           = "rtc_davinci_evm",
	.id             = -1,
};

static struct snd_platform_data dm644x_evm_snd_data;

/*----------------------------------------------------------------------*/

/*
 * I2C GPIO expanders
 */

#define PCF_Uxx_BASE(x)	(DAVINCI_N_GPIO + ((x) * 8))


/* U2 -- LEDs */

static struct gpio_led evm_leds[] = {
	{ .name = "DS8", .active_low = 1,
		.default_trigger = "heartbeat", },
	{ .name = "DS7", .active_low = 1, },
	{ .name = "DS6", .active_low = 1, },
	{ .name = "DS5", .active_low = 1, },
	{ .name = "DS4", .active_low = 1, },
	{ .name = "DS3", .active_low = 1, },
	{ .name = "DS2", .active_low = 1,
		.default_trigger = "mmc0", },
	{ .name = "DS1", .active_low = 1,
		.default_trigger = "ide-disk", },
};

static const struct gpio_led_platform_data evm_led_data = {
	.num_leds	= ARRAY_SIZE(evm_leds),
	.leds		= evm_leds,
};

static struct platform_device *evm_led_dev;

static int
evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	struct gpio_led *leds = evm_leds;
	int status;

	while (ngpio--) {
		leds->gpio = gpio++;
		leds++;
	}

	/* what an extremely annoying way to be forced to handle
	 * device unregistration ...
	 */
	evm_led_dev = platform_device_alloc("leds-gpio", 0);
	platform_device_add_data(evm_led_dev,
			&evm_led_data, sizeof evm_led_data);

	evm_led_dev->dev.parent = &client->dev;
	status = platform_device_add(evm_led_dev);
	if (status < 0) {
		platform_device_put(evm_led_dev);
		evm_led_dev = NULL;
	}
	return status;
}

static int
evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	if (evm_led_dev) {
		platform_device_unregister(evm_led_dev);
		evm_led_dev = NULL;
	}
	return 0;
}

static struct pcf857x_platform_data pcf_data_u2 = {
	.gpio_base	= PCF_Uxx_BASE(0),
	.setup		= evm_led_setup,
	.teardown	= evm_led_teardown,
};


/* U18 - A/V clock generator and user switch */

static int sw_gpio;

static ssize_t
sw_show(struct device *d, struct device_attribute *a, char *buf)
{
	char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";

	strcpy(buf, s);
	return strlen(s);
}

static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);

static int
evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	int	status;

	/* export dip switch option */
	sw_gpio = gpio + 7;
	status = gpio_request(sw_gpio, "user_sw");
	if (status == 0)
		status = gpio_direction_input(sw_gpio);
	if (status == 0)
		status = device_create_file(&client->dev, &dev_attr_user_sw);
	else
		gpio_free(sw_gpio);
	if (status != 0)
		sw_gpio = -EINVAL;

	/* audio PLL:  48 kHz (vs 44.1 or 32), single rate (vs double) */
	gpio_request(gpio + 3, "pll_fs2");
	gpio_direction_output(gpio + 3, 0);

	gpio_request(gpio + 2, "pll_fs1");
	gpio_direction_output(gpio + 2, 0);

	gpio_request(gpio + 1, "pll_sr");
	gpio_direction_output(gpio + 1, 0);

	return 0;
}

static int
evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	gpio_free(gpio + 1);
	gpio_free(gpio + 2);
	gpio_free(gpio + 3);

	if (sw_gpio > 0) {
		device_remove_file(&client->dev, &dev_attr_user_sw);
		gpio_free(sw_gpio);
	}
	return 0;
}

static struct pcf857x_platform_data pcf_data_u18 = {
	.gpio_base	= PCF_Uxx_BASE(1),
	.n_latch	= (1 << 3) | (1 << 2) | (1 << 1),
	.setup		= evm_u18_setup,
	.teardown	= evm_u18_teardown,
};


/* U35 - various I/O signals used to manage USB, CF, ATA, etc */

static int
evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	/* p0 = nDRV_VBUS (initial:  don't supply it) */
	gpio_request(gpio + 0, "nDRV_VBUS");
	gpio_direction_output(gpio + 0, 1);

	/* p1 = VDDIMX_EN */
	gpio_request(gpio + 1, "VDDIMX_EN");
	gpio_direction_output(gpio + 1, 1);

	/* p2 = VLYNQ_EN */
	gpio_request(gpio + 2, "VLYNQ_EN");
	gpio_direction_output(gpio + 2, 1);

	/* p3 = n3V3_CF_RESET (initial: stay in reset) */
	gpio_request(gpio + 3, "nCF_RESET");
	gpio_direction_output(gpio + 3, 0);

	/* (p4 unused) */

	/* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
	gpio_request(gpio + 5, "WLAN_RESET");
	gpio_direction_output(gpio + 5, 1);

	/* p6 = nATA_SEL (initial: select) */
	gpio_request(gpio + 6, "nATA_SEL");
	gpio_direction_output(gpio + 6, 0);

	/* p7 = nCF_SEL (initial: deselect) */
	gpio_request(gpio + 7, "nCF_SEL");
	gpio_direction_output(gpio + 7, 1);

	return 0;
}

static int
evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
{
	gpio_free(gpio + 7);
	gpio_free(gpio + 6);
	gpio_free(gpio + 5);
	gpio_free(gpio + 3);
	gpio_free(gpio + 2);
	gpio_free(gpio + 1);
	gpio_free(gpio + 0);
	return 0;
}

static struct pcf857x_platform_data pcf_data_u35 = {
	.gpio_base	= PCF_Uxx_BASE(2),
	.setup		= evm_u35_setup,
	.teardown	= evm_u35_teardown,
};

/*----------------------------------------------------------------------*/

/* Most of this EEPROM is unused, but U-Boot uses some data:
 *  - 0x7f00, 6 bytes Ethernet Address
 *  - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
 *  - ... newer boards may have more
 */

static struct at24_platform_data eeprom_info = {
	.byte_len	= (256*1024) / 8,
	.page_size	= 64,
	.flags		= AT24_FLAG_ADDR16,
	.setup          = davinci_get_mac_addr,
	.context	= (void *)0x7f00,
};

/*
 * MSP430 supports RTC, card detection, input from IR remote, and
 * a bit more.  It triggers interrupts on GPIO(7) from pressing
 * buttons on the IR remote, and for card detect switches.
 */
static struct i2c_client *dm6446evm_msp;

static int dm6446evm_msp_probe(struct i2c_client *client,
		const struct i2c_device_id *id)
{
	dm6446evm_msp = client;
	return 0;
}

static int dm6446evm_msp_remove(struct i2c_client *client)
{
	dm6446evm_msp = NULL;
	return 0;
}

static const struct i2c_device_id dm6446evm_msp_ids[] = {
	{ "dm6446evm_msp", 0, },
	{ /* end of list */ },
};

static struct i2c_driver dm6446evm_msp_driver = {
	.driver.name	= "dm6446evm_msp",
	.id_table	= dm6446evm_msp_ids,
	.probe		= dm6446evm_msp_probe,
	.remove		= dm6446evm_msp_remove,
};

static int dm6444evm_msp430_get_pins(void)
{
	static const char txbuf[2] = { 2, 4, };
	char buf[4];
	struct i2c_msg msg[2] = {
		{
			.addr = dm6446evm_msp->addr,
			.flags = 0,
			.len = 2,
			.buf = (void __force *)txbuf,
		},
		{
			.addr = dm6446evm_msp->addr,
			.flags = I2C_M_RD,
			.len = 4,
			.buf = buf,
		},
	};
	int status;

	if (!dm6446evm_msp)
		return -ENXIO;

	/* Command 4 == get input state, returns port 2 and port3 data
	 *   S Addr W [A] len=2 [A] cmd=4 [A]
	 *   RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
	 */
	status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
	if (status < 0)
		return status;

	dev_dbg(&dm6446evm_msp->dev,
		"PINS: %02x %02x %02x %02x\n",
		buf[0], buf[1], buf[2], buf[3]);

	return (buf[3] << 8) | buf[2];
}

static int dm6444evm_mmc_get_cd(int module)
{
	int status = dm6444evm_msp430_get_pins();

	return (status < 0) ? status : !(status & BIT(1));
}

static int dm6444evm_mmc_get_ro(int module)
{
	int status = dm6444evm_msp430_get_pins();

	return (status < 0) ? status : status & BIT(6 + 8);
}

static struct davinci_mmc_config dm6446evm_mmc_config = {
	.get_cd		= dm6444evm_mmc_get_cd,
	.get_ro		= dm6444evm_mmc_get_ro,
	.wires		= 4,
	.version	= MMC_CTLR_VERSION_1
};

static struct i2c_board_info __initdata i2c_info[] =  {
	{
		I2C_BOARD_INFO("dm6446evm_msp", 0x23),
	},
	{
		I2C_BOARD_INFO("pcf8574", 0x38),
		.platform_data	= &pcf_data_u2,
	},
	{
		I2C_BOARD_INFO("pcf8574", 0x39),
		.platform_data	= &pcf_data_u18,
	},
	{
		I2C_BOARD_INFO("pcf8574", 0x3a),
		.platform_data	= &pcf_data_u35,
	},
	{
		I2C_BOARD_INFO("24c256", 0x50),
		.platform_data	= &eeprom_info,
	},
	{
		I2C_BOARD_INFO("tlv320aic33", 0x1b),
	},
};

/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
 * which requires 100 usec of idle bus after i2c writes sent to it.
 */
static struct davinci_i2c_platform_data i2c_pdata = {
	.bus_freq	= 20 /* kHz */,
	.bus_delay	= 100 /* usec */,
	.sda_pin        = 44,
	.scl_pin        = 43,
};

static void __init evm_init_i2c(void)
{
	davinci_init_i2c(&i2c_pdata);
	i2c_add_driver(&dm6446evm_msp_driver);
	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
}

static struct platform_device *davinci_evm_devices[] __initdata = {
	&davinci_fb_device,
	&rtc_dev,
};

static struct davinci_uart_config uart_config __initdata = {
	.enabled_uarts = (1 << 0),
};

static void __init
davinci_evm_map_io(void)
{
	/* setup input configuration for VPFE input devices */
	dm644x_set_vpfe_config(&vpfe_cfg);
	dm644x_init();
}

static int davinci_phy_fixup(struct phy_device *phydev)
{
	unsigned int control;
	/* CRITICAL: Fix for increasing PHY signal drive strength for
	 * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
	 * signal strength was low causing  TX to fail randomly. The
	 * fix is to Set bit 11 (Increased MII drive strength) of PHY
	 * register 26 (Digital Config register) on this phy. */
	control = phy_read(phydev, 26);
	phy_write(phydev, 26, (control | 0x800));
	return 0;
}

#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
    defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
#define HAS_ATA 1
#else
#define HAS_ATA 0
#endif

#if defined(CONFIG_MTD_PHYSMAP) || \
    defined(CONFIG_MTD_PHYSMAP_MODULE)
#define HAS_NOR 1
#else
#define HAS_NOR 0
#endif

#if defined(CONFIG_MTD_NAND_DAVINCI) || \
    defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
#define HAS_NAND 1
#else
#define HAS_NAND 0
#endif

static __init void davinci_evm_init(void)
{
	struct clk *aemif_clk;
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	aemif_clk = clk_get(NULL, "aemif");
	clk_enable(aemif_clk);

	if (HAS_ATA) {
		if (HAS_NAND || HAS_NOR)
			pr_warning("WARNING: both IDE and Flash are "
				"enabled, but they share AEMIF pins.\n"
				"\tDisable IDE for NAND/NOR support.\n");
		davinci_init_ide();
	} else if (HAS_NAND || HAS_NOR) {
		davinci_cfg_reg(DM644X_HPIEN_DISABLE);
		davinci_cfg_reg(DM644X_ATAEN_DISABLE);

		/* only one device will be jumpered and detected */
		if (HAS_NAND) {
			platform_device_register(&davinci_evm_nandflash_device);
			evm_leds[7].default_trigger = "nand-disk";
			if (HAS_NOR)
				pr_warning("WARNING: both NAND and NOR flash "
					"are enabled; disable one of them.\n");
		} else if (HAS_NOR)
			platform_device_register(&davinci_evm_norflash_device);
	}

	platform_add_devices(davinci_evm_devices,
			     ARRAY_SIZE(davinci_evm_devices));
	evm_init_i2c();

	davinci_setup_mmc(0, &dm6446evm_mmc_config);

	davinci_serial_init(&uart_config);
	dm644x_init_asp(&dm644x_evm_snd_data);

	/* irlml6401 switches over 1A, in under 8 msec */
	davinci_setup_usb(1000, 8);

	soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
	/* Register the fixup for PHY on DaVinci */
	phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
					davinci_phy_fixup);

}

MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
	/* Maintainer: MontaVista Software <source@mvista.com> */
	.atag_offset  = 0x100,
	.map_io	      = davinci_evm_map_io,
	.init_irq     = davinci_irq_init,
	.timer	      = &davinci_timer,
	.init_machine = davinci_evm_init,
	.dma_zone_size	= SZ_128M,
MACHINE_END
Commit	Line	Data
7c6337e2 KH	1	/*
	2	* TI DaVinci EVM board support
	3	*
	4	* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
	5	*
	6	* 2007 (c) MontaVista Software, Inc. This file is licensed under
	7	* the terms of the GNU General Public License version 2. This program
	8	* is licensed "as is" without any warranty of any kind, whether express
	9	* or implied.
	10	*/
	11	#include <linux/kernel.h>
7c6337e2 KH	12	#include <linux/init.h>
	13	#include <linux/dma-mapping.h>
	14	#include <linux/platform_device.h>
7bff3c4c	15	#include <linux/gpio.h>
7bff3c4c DB	16	#include <linux/i2c.h>
	17	#include <linux/i2c/pcf857x.h>
	18	#include <linux/i2c/at24.h>
7c6337e2	19	#include <linux/mtd/mtd.h>
d0e47fba	20	#include <linux/mtd/nand.h>
7c6337e2 KH	21	#include <linux/mtd/partitions.h>
7c6337e2 KH	22	#include <linux/mtd/physmap.h>
d0e47fba KH	23	#include <linux/phy.h>
d0e47fba KH	24	#include <linux/clk.h>
ab8e8df8 MK	25	#include <linux/videodev2.h>
	26
	27	#include <media/tvp514x.h>
7c6337e2	28
7c6337e2	29	#include <asm/mach-types.h>
7c6337e2	30	#include <asm/mach/arch.h>
7c6337e2	31
d0e47fba	32	#include <mach/dm644x.h>
a09e64fb	33	#include <mach/common.h>
7bff3c4c	34	#include <mach/i2c.h>
d0e47fba KH	35	#include <mach/serial.h>
d0e47fba KH	36	#include <mach/mux.h>
d0e47fba	37	#include <mach/nand.h>
2dbf56ae	38	#include <mach/mmc.h>
355fb4e3	39	#include <mach/usb.h>
fe69c82d	40	#include <mach/aemif.h>
d0e47fba	41
782f2d78	42	#define DM644X_EVM_PHY_ID "0:01"
d0e47fba KH	43	#define LXT971_PHY_ID (0x001378e2)
d0e47fba KH	44	#define LXT971_PHY_MASK (0xfffffff0)
7c6337e2	45
7bff3c4c	46	static struct mtd_partition davinci_evm_norflash_partitions[] = {
d0e47fba	47	/* bootloader (UBL, U-Boot, etc) in first 5 sectors */
7c6337e2 KH	48	{
	49	.name = "bootloader",
	50	.offset = 0,
d0e47fba	51	.size = 5 * SZ_64K,
7c6337e2 KH	52	.mask_flags = MTD_WRITEABLE, /* force read-only */
	53	},
	54	/* bootloader params in the next 1 sectors */
	55	{
	56	.name = "params",
	57	.offset = MTDPART_OFS_APPEND,
	58	.size = SZ_64K,
	59	.mask_flags = 0,
	60	},
	61	/* kernel */
	62	{
	63	.name = "kernel",
	64	.offset = MTDPART_OFS_APPEND,
	65	.size = SZ_2M,
	66	.mask_flags = 0
	67	},
	68	/* file system */
	69	{
	70	.name = "filesystem",
	71	.offset = MTDPART_OFS_APPEND,
	72	.size = MTDPART_SIZ_FULL,
	73	.mask_flags = 0
	74	}
	75	};
	76
7bff3c4c	77	static struct physmap_flash_data davinci_evm_norflash_data = {
7c6337e2	78	.width = 2,
7bff3c4c DB	79	.parts = davinci_evm_norflash_partitions,
7bff3c4c DB	80	.nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
7c6337e2 KH	81	};
	82
	83	/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
	84	* limits addresses to 16M, so using addresses past 16M will wrap */
7bff3c4c	85	static struct resource davinci_evm_norflash_resource = {
70342174 SS	86	.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
70342174 SS	87	.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
7c6337e2 KH	88	.flags = IORESOURCE_MEM,
	89	};
	90
7bff3c4c	91	static struct platform_device davinci_evm_norflash_device = {
7c6337e2 KH	92	.name = "physmap-flash",
	93	.id = 0,
	94	.dev = {
7bff3c4c	95	.platform_data = &davinci_evm_norflash_data,
7c6337e2 KH	96	},
7c6337e2 KH	97	.num_resources = 1,
7bff3c4c DB	98	.resource = &davinci_evm_norflash_resource,
	99	};
	100
3e9c18e1 DB	101	/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
	102	* It may used instead of the (default) NOR chip to boot, using TI's
	103	* tools to install the secondary boot loader (UBL) and U-Boot.
	104	*/
28552c2e	105	static struct mtd_partition davinci_evm_nandflash_partition[] = {
3e9c18e1 DB	106	/* Bootloader layout depends on whose u-boot is installed, but we
	107	* can hide all the details.
	108	* - block 0 for u-boot environment ... in mainline u-boot
	109	* - block 1 for UBL (plus up to four backup copies in blocks 2..5)
	110	* - blocks 6...? for u-boot
	111	* - blocks 16..23 for u-boot environment ... in TI's u-boot
	112	*/
	113	{
	114	.name = "bootloader",
	115	.offset = 0,
	116	.size = SZ_256K + SZ_128K,
	117	.mask_flags = MTD_WRITEABLE, /* force read-only */
	118	},
	119	/* Kernel */
d0e47fba	120	{
3e9c18e1 DB	121	.name = "kernel",
	122	.offset = MTDPART_OFS_APPEND,
	123	.size = SZ_4M,
	124	.mask_flags = 0,
	125	},
	126	/* File system (older GIT kernels started this on the 5MB mark) */
	127	{
	128	.name = "filesystem",
	129	.offset = MTDPART_OFS_APPEND,
d0e47fba KH	130	.size = MTDPART_SIZ_FULL,
	131	.mask_flags = 0,
	132	}
3e9c18e1 DB	133	/* A few blocks at end hold a flash BBT ... created by TI's CCS
	134	* using flashwriter_nand.out, but ignored by TI's versions of
	135	* Linux and u-boot. We boot faster by using them.
	136	*/
d0e47fba	137	};
7bff3c4c	138
fe69c82d SN	139	static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
	140	.wsetup = 20,
	141	.wstrobe = 40,
	142	.whold = 20,
	143	.rsetup = 10,
	144	.rstrobe = 40,
	145	.rhold = 10,
	146	.ta = 40,
	147	};
	148
d0e47fba KH	149	static struct davinci_nand_pdata davinci_evm_nandflash_data = {
	150	.parts = davinci_evm_nandflash_partition,
	151	.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
	152	.ecc_mode = NAND_ECC_HW,
3e9c18e1	153	.options = NAND_USE_FLASH_BBT,
fe69c82d	154	.timing = &davinci_evm_nandflash_timing,
d0e47fba KH	155	};
	156
	157	static struct resource davinci_evm_nandflash_resource[] = {
	158	{
70342174 SS	159	.start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
70342174 SS	160	.end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
d0e47fba KH	161	.flags = IORESOURCE_MEM,
d0e47fba KH	162	}, {
70342174 SS	163	.start = DM644X_ASYNC_EMIF_CONTROL_BASE,
70342174 SS	164	.end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
d0e47fba KH	165	.flags = IORESOURCE_MEM,
	166	},
	167	};
	168
	169	static struct platform_device davinci_evm_nandflash_device = {
	170	.name = "davinci_nand",
	171	.id = 0,
	172	.dev = {
	173	.platform_data = &davinci_evm_nandflash_data,
	174	},
	175	.num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
	176	.resource = davinci_evm_nandflash_resource,
	177	};
	178
3e9c18e1	179	static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
d0e47fba KH	180
	181	static struct platform_device davinci_fb_device = {
	182	.name = "davincifb",
	183	.id = -1,
	184	.dev = {
	185	.dma_mask = &davinci_fb_dma_mask,
3e9c18e1	186	.coherent_dma_mask = DMA_BIT_MASK(32),
d0e47fba KH	187	},
	188	.num_resources = 0,
	189	};
	190
ab8e8df8 MK	191	static struct tvp514x_platform_data tvp5146_pdata = {
	192	.clk_polarity = 0,
	193	.hs_polarity = 1,
	194	.vs_polarity = 1
	195	};
	196
	197	#define TVP514X_STD_ALL (V4L2_STD_NTSC \| V4L2_STD_PAL)
	198	/* Inputs available at the TVP5146 */
	199	static struct v4l2_input tvp5146_inputs[] = {
	200	{
	201	.index = 0,
	202	.name = "Composite",
	203	.type = V4L2_INPUT_TYPE_CAMERA,
	204	.std = TVP514X_STD_ALL,
	205	},
	206	{
	207	.index = 1,
	208	.name = "S-Video",
	209	.type = V4L2_INPUT_TYPE_CAMERA,
	210	.std = TVP514X_STD_ALL,
	211	},
	212	};
	213
	214	/*
	215	* this is the route info for connecting each input to decoder
	216	* ouput that goes to vpfe. There is a one to one correspondence
	217	* with tvp5146_inputs
	218	*/
	219	static struct vpfe_route tvp5146_routes[] = {
	220	{
	221	.input = INPUT_CVBS_VI2B,
	222	.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
	223	},
	224	{
	225	.input = INPUT_SVIDEO_VI2C_VI1C,
	226	.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
	227	},
	228	};
	229
	230	static struct vpfe_subdev_info vpfe_sub_devs[] = {
	231	{
	232	.name = "tvp5146",
	233	.grp_id = 0,
	234	.num_inputs = ARRAY_SIZE(tvp5146_inputs),
	235	.inputs = tvp5146_inputs,
	236	.routes = tvp5146_routes,
	237	.can_route = 1,
	238	.ccdc_if_params = {
	239	.if_type = VPFE_BT656,
	240	.hdpol = VPFE_PINPOL_POSITIVE,
	241	.vdpol = VPFE_PINPOL_POSITIVE,
	242	},
	243	.board_info = {
	244	I2C_BOARD_INFO("tvp5146", 0x5d),
	245	.platform_data = &tvp5146_pdata,
	246	},
	247	},
	248	};
	249
	250	static struct vpfe_config vpfe_cfg = {
	251	.num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
077639f4	252	.i2c_adapter_id = 1,
ab8e8df8 MK	253	.sub_devs = vpfe_sub_devs,
	254	.card_name = "DM6446 EVM",
	255	.ccdc = "DM6446 CCDC",
	256	};
	257
d0e47fba KH	258	static struct platform_device rtc_dev = {
	259	.name = "rtc_davinci_evm",
	260	.id = -1,
	261	};
7bff3c4c	262
61aa0732	263	static struct snd_platform_data dm644x_evm_snd_data;
25acf553	264
7bff3c4c DB	265	/----------------------------------------------------------------------/
	266
	267	/*
	268	* I2C GPIO expanders
	269	*/
	270
	271	#define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
	272
	273
	274	/* U2 -- LEDs */
	275
	276	static struct gpio_led evm_leds[] = {
	277	{ .name = "DS8", .active_low = 1,
	278	.default_trigger = "heartbeat", },
	279	{ .name = "DS7", .active_low = 1, },
	280	{ .name = "DS6", .active_low = 1, },
	281	{ .name = "DS5", .active_low = 1, },
	282	{ .name = "DS4", .active_low = 1, },
	283	{ .name = "DS3", .active_low = 1, },
	284	{ .name = "DS2", .active_low = 1,
	285	.default_trigger = "mmc0", },
	286	{ .name = "DS1", .active_low = 1,
	287	.default_trigger = "ide-disk", },
	288	};
	289
	290	static const struct gpio_led_platform_data evm_led_data = {
	291	.num_leds = ARRAY_SIZE(evm_leds),
	292	.leds = evm_leds,
	293	};
	294
	295	static struct platform_device *evm_led_dev;
	296
	297	static int
	298	evm_led_setup(struct i2c_client client, int gpio, unsigned ngpio, void c)
	299	{
	300	struct gpio_led *leds = evm_leds;
	301	int status;
	302
	303	while (ngpio--) {
	304	leds->gpio = gpio++;
	305	leds++;
	306	}
	307
	308	/* what an extremely annoying way to be forced to handle
	309	* device unregistration ...
	310	*/
	311	evm_led_dev = platform_device_alloc("leds-gpio", 0);
	312	platform_device_add_data(evm_led_dev,
	313	&evm_led_data, sizeof evm_led_data);
	314
	315	evm_led_dev->dev.parent = &client->dev;
	316	status = platform_device_add(evm_led_dev);
	317	if (status < 0) {
	318	platform_device_put(evm_led_dev);
	319	evm_led_dev = NULL;
	320	}
	321	return status;
	322	}
	323
	324	static int
	325	evm_led_teardown(struct i2c_client client, int gpio, unsigned ngpio, void c)
	326	{
	327	if (evm_led_dev) {
	328	platform_device_unregister(evm_led_dev);
329	evm_led_dev = NULL;
330	}
331	return 0;
332	}
333
334	static struct pcf857x_platform_data pcf_data_u2 = {
335	.gpio_base = PCF_Uxx_BASE(0),
336	.setup = evm_led_setup,
337	.teardown = evm_led_teardown,
338	};
339
340
341	/* U18 - A/V clock generator and user switch */
342
343	static int sw_gpio;
344
345	static ssize_t
346	sw_show(struct device d, struct device_attribute a, char *buf)
347	{
348	char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
349
350	strcpy(buf, s);
351	return strlen(s);
352	}
353
354	static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
355
356	static int
357	evm_u18_setup(struct i2c_client client, int gpio, unsigned ngpio, void c)
358	{
359	int status;
360
361	/* export dip switch option */
362	sw_gpio = gpio + 7;
363	status = gpio_request(sw_gpio, "user_sw");
364	if (status == 0)
365	status = gpio_direction_input(sw_gpio);
366	if (status == 0)
367	status = device_create_file(&client->dev, &dev_attr_user_sw);
368	else
369	gpio_free(sw_gpio);
370	if (status != 0)
371	sw_gpio = -EINVAL;
372
373	/* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
374	gpio_request(gpio + 3, "pll_fs2");
375	gpio_direction_output(gpio + 3, 0);
376
377	gpio_request(gpio + 2, "pll_fs1");
378	gpio_direction_output(gpio + 2, 0);
379
380	gpio_request(gpio + 1, "pll_sr");
381	gpio_direction_output(gpio + 1, 0);
382
383	return 0;
384	}
385
386	static int
387	evm_u18_teardown(struct i2c_client client, int gpio, unsigned ngpio, void c)
388	{
389	gpio_free(gpio + 1);
390	gpio_free(gpio + 2);
391	gpio_free(gpio + 3);
392
393	if (sw_gpio > 0) {
394	device_remove_file(&client->dev, &dev_attr_user_sw);
395	gpio_free(sw_gpio);
396	}
397	return 0;
398	}
399
400	static struct pcf857x_platform_data pcf_data_u18 = {
401	.gpio_base = PCF_Uxx_BASE(1),
402	.n_latch = (1 << 3) \| (1 << 2) \| (1 << 1),
403	.setup = evm_u18_setup,
404	.teardown = evm_u18_teardown,
7c6337e2 KH	405	};
7c6337e2 KH	406
7bff3c4c DB	407
	408	/* U35 - various I/O signals used to manage USB, CF, ATA, etc */
	409
	410	static int
	411	evm_u35_setup(struct i2c_client client, int gpio, unsigned ngpio, void c)
	412	{
	413	/* p0 = nDRV_VBUS (initial: don't supply it) */
	414	gpio_request(gpio + 0, "nDRV_VBUS");
	415	gpio_direction_output(gpio + 0, 1);
	416
	417	/* p1 = VDDIMX_EN */
	418	gpio_request(gpio + 1, "VDDIMX_EN");
	419	gpio_direction_output(gpio + 1, 1);
	420
	421	/* p2 = VLYNQ_EN */
	422	gpio_request(gpio + 2, "VLYNQ_EN");
	423	gpio_direction_output(gpio + 2, 1);
	424
	425	/* p3 = n3V3_CF_RESET (initial: stay in reset) */
	426	gpio_request(gpio + 3, "nCF_RESET");
	427	gpio_direction_output(gpio + 3, 0);
	428
	429	/* (p4 unused) */
	430
	431	/* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
	432	gpio_request(gpio + 5, "WLAN_RESET");
	433	gpio_direction_output(gpio + 5, 1);
	434
	435	/* p6 = nATA_SEL (initial: select) */
	436	gpio_request(gpio + 6, "nATA_SEL");
	437	gpio_direction_output(gpio + 6, 0);
	438
	439	/* p7 = nCF_SEL (initial: deselect) */
	440	gpio_request(gpio + 7, "nCF_SEL");
	441	gpio_direction_output(gpio + 7, 1);
	442
	443	return 0;
	444	}
	445
	446	static int
	447	evm_u35_teardown(struct i2c_client client, int gpio, unsigned ngpio, void c)
	448	{
	449	gpio_free(gpio + 7);
	450	gpio_free(gpio + 6);
	451	gpio_free(gpio + 5);
	452	gpio_free(gpio + 3);
	453	gpio_free(gpio + 2);
	454	gpio_free(gpio + 1);
	455	gpio_free(gpio + 0);
	456	return 0;
	457	}
	458
	459	static struct pcf857x_platform_data pcf_data_u35 = {
	460	.gpio_base = PCF_Uxx_BASE(2),
	461	.setup = evm_u35_setup,
	462	.teardown = evm_u35_teardown,
	463	};
	464
	465	/----------------------------------------------------------------------/
	466
	467	/* Most of this EEPROM is unused, but U-Boot uses some data:
	468	* - 0x7f00, 6 bytes Ethernet Address
	469	* - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
	470	* - ... newer boards may have more
471	*/
d0e47fba	472
7bff3c4c DB	473	static struct at24_platform_data eeprom_info = {
	474	.byte_len = (256*1024) / 8,
	475	.page_size = 64,
	476	.flags = AT24_FLAG_ADDR16,
b14dc0f9 MG	477	.setup = davinci_get_mac_addr,
b14dc0f9 MG	478	.context = (void *)0x7f00,
d0e47fba KH	479	};
d0e47fba KH	480
d0e47fba KH	481	/*
	482	* MSP430 supports RTC, card detection, input from IR remote, and
	483	* a bit more. It triggers interrupts on GPIO(7) from pressing
	484	* buttons on the IR remote, and for card detect switches.
	485	*/
	486	static struct i2c_client *dm6446evm_msp;
	487
	488	static int dm6446evm_msp_probe(struct i2c_client *client,
	489	const struct i2c_device_id *id)
	490	{
	491	dm6446evm_msp = client;
	492	return 0;
	493	}
	494
	495	static int dm6446evm_msp_remove(struct i2c_client *client)
	496	{
	497	dm6446evm_msp = NULL;
	498	return 0;
	499	}
	500
	501	static const struct i2c_device_id dm6446evm_msp_ids[] = {
	502	{ "dm6446evm_msp", 0, },
	503	{ /* end of list */ },
	504	};
	505
	506	static struct i2c_driver dm6446evm_msp_driver = {
	507	.driver.name = "dm6446evm_msp",
	508	.id_table = dm6446evm_msp_ids,
	509	.probe = dm6446evm_msp_probe,
	510	.remove = dm6446evm_msp_remove,
7bff3c4c DB	511	};
7bff3c4c DB	512
d0e47fba KH	513	static int dm6444evm_msp430_get_pins(void)
	514	{
	515	static const char txbuf[2] = { 2, 4, };
	516	char buf[4];
	517	struct i2c_msg msg[2] = {
	518	{
	519	.addr = dm6446evm_msp->addr,
	520	.flags = 0,
	521	.len = 2,
	522	.buf = (void __force *)txbuf,
	523	},
	524	{
	525	.addr = dm6446evm_msp->addr,
	526	.flags = I2C_M_RD,
	527	.len = 4,
	528	.buf = buf,
	529	},
	530	};
	531	int status;
	532
	533	if (!dm6446evm_msp)
	534	return -ENXIO;
	535
	536	/* Command 4 == get input state, returns port 2 and port3 data
	537	* S Addr W [A] len=2 [A] cmd=4 [A]
	538	* RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
	539	*/
	540	status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
	541	if (status < 0)
	542	return status;
	543
	544	dev_dbg(&dm6446evm_msp->dev,
	545	"PINS: %02x %02x %02x %02x\n",
	546	buf[0], buf[1], buf[2], buf[3]);
	547
	548	return (buf[3] << 8) \| buf[2];
	549	}
	550
2dbf56ae KH	551	static int dm6444evm_mmc_get_cd(int module)
	552	{
	553	int status = dm6444evm_msp430_get_pins();
	554
	555	return (status < 0) ? status : !(status & BIT(1));
	556	}
	557
	558	static int dm6444evm_mmc_get_ro(int module)
	559	{
	560	int status = dm6444evm_msp430_get_pins();
	561
	562	return (status < 0) ? status : status & BIT(6 + 8);
	563	}
	564
	565	static struct davinci_mmc_config dm6446evm_mmc_config = {
	566	.get_cd = dm6444evm_mmc_get_cd,
	567	.get_ro = dm6444evm_mmc_get_ro,
	568	.wires = 4,
	569	.version = MMC_CTLR_VERSION_1
	570	};
	571
7bff3c4c	572	static struct i2c_board_info __initdata i2c_info[] = {
d0e47fba KH	573	{
	574	I2C_BOARD_INFO("dm6446evm_msp", 0x23),
	575	},
7bff3c4c DB	576	{
	577	I2C_BOARD_INFO("pcf8574", 0x38),
	578	.platform_data = &pcf_data_u2,
	579	},
	580	{
	581	I2C_BOARD_INFO("pcf8574", 0x39),
	582	.platform_data = &pcf_data_u18,
	583	},
	584	{
	585	I2C_BOARD_INFO("pcf8574", 0x3a),
	586	.platform_data = &pcf_data_u35,
	587	},
	588	{
	589	I2C_BOARD_INFO("24c256", 0x50),
	590	.platform_data = &eeprom_info,
	591	},
1a7ff8ff C	592	{
	593	I2C_BOARD_INFO("tlv320aic33", 0x1b),
	594	},
7bff3c4c DB	595	};
	596
	597	/* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
	598	* which requires 100 usec of idle bus after i2c writes sent to it.
	599	*/
	600	static struct davinci_i2c_platform_data i2c_pdata = {
	601	.bus_freq = 20 /* kHz */,
	602	.bus_delay = 100 /* usec */,
00642f66 PJ	603	.sda_pin = 44,
00642f66 PJ	604	.scl_pin = 43,
7bff3c4c DB	605	};
	606
	607	static void __init evm_init_i2c(void)
	608	{
	609	davinci_init_i2c(&i2c_pdata);
d0e47fba	610	i2c_add_driver(&dm6446evm_msp_driver);
7bff3c4c DB	611	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
	612	}
	613
7c6337e2	614	static struct platform_device *davinci_evm_devices[] __initdata = {
d0e47fba KH	615	&davinci_fb_device,
	616	&rtc_dev,
	617	};
	618
	619	static struct davinci_uart_config uart_config __initdata = {
	620	.enabled_uarts = (1 << 0),
7c6337e2 KH	621	};
	622
	623	static void __init
	624	davinci_evm_map_io(void)
	625	{
ab8e8df8 MK	626	/* setup input configuration for VPFE input devices */
ab8e8df8 MK	627	dm644x_set_vpfe_config(&vpfe_cfg);
d0e47fba	628	dm644x_init();
7c6337e2 KH	629	}
7c6337e2 KH	630
d0e47fba	631	static int davinci_phy_fixup(struct phy_device *phydev)
7c6337e2	632	{
d0e47fba KH	633	unsigned int control;
	634	/* CRITICAL: Fix for increasing PHY signal drive strength for
	635	* TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
	636	* signal strength was low causing TX to fail randomly. The
	637	* fix is to Set bit 11 (Increased MII drive strength) of PHY
	638	* register 26 (Digital Config register) on this phy. */
	639	control = phy_read(phydev, 26);
	640	phy_write(phydev, 26, (control \| 0x800));
	641	return 0;
	642	}
	643
7bff3c4c DB	644	#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) \|\| \
7bff3c4c DB	645	defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
d0e47fba KH	646	#define HAS_ATA 1
	647	#else
	648	#define HAS_ATA 0
	649	#endif
	650
7bff3c4c DB	651	#if defined(CONFIG_MTD_PHYSMAP) \|\| \
7bff3c4c DB	652	defined(CONFIG_MTD_PHYSMAP_MODULE)
d0e47fba KH	653	#define HAS_NOR 1
	654	#else
	655	#define HAS_NOR 0
7bff3c4c	656	#endif
d0e47fba KH	657
	658	#if defined(CONFIG_MTD_NAND_DAVINCI) \|\| \
	659	defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
	660	#define HAS_NAND 1
	661	#else
	662	#define HAS_NAND 0
7c6337e2 KH	663	#endif
7c6337e2 KH	664
d0e47fba KH	665	static __init void davinci_evm_init(void)
	666	{
	667	struct clk *aemif_clk;
972412b6	668	struct davinci_soc_info *soc_info = &davinci_soc_info;
d0e47fba KH	669
	670	aemif_clk = clk_get(NULL, "aemif");
	671	clk_enable(aemif_clk);
	672
	673	if (HAS_ATA) {
	674	if (HAS_NAND \|\| HAS_NOR)
	675	pr_warning("WARNING: both IDE and Flash are "
	676	"enabled, but they share AEMIF pins.\n"
	677	"\tDisable IDE for NAND/NOR support.\n");
7a9978a1	678	davinci_init_ide();
d0e47fba KH	679	} else if (HAS_NAND \|\| HAS_NOR) {
	680	davinci_cfg_reg(DM644X_HPIEN_DISABLE);
	681	davinci_cfg_reg(DM644X_ATAEN_DISABLE);
	682
	683	/* only one device will be jumpered and detected */
	684	if (HAS_NAND) {
	685	platform_device_register(&davinci_evm_nandflash_device);
	686	evm_leds[7].default_trigger = "nand-disk";
	687	if (HAS_NOR)
	688	pr_warning("WARNING: both NAND and NOR flash "
	689	"are enabled; disable one of them.\n");
	690	} else if (HAS_NOR)
	691	platform_device_register(&davinci_evm_norflash_device);
	692	}
	693
7c6337e2 KH	694	platform_add_devices(davinci_evm_devices,
7c6337e2 KH	695	ARRAY_SIZE(davinci_evm_devices));
7bff3c4c	696	evm_init_i2c();
d0e47fba	697
2dbf56ae KH	698	davinci_setup_mmc(0, &dm6446evm_mmc_config);
2dbf56ae KH	699
d0e47fba	700	davinci_serial_init(&uart_config);
25acf553	701	dm644x_init_asp(&dm644x_evm_snd_data);
d0e47fba	702
60d97a84 SS	703	/* irlml6401 switches over 1A, in under 8 msec */
	704	davinci_setup_usb(1000, 8);
	705
782f2d78	706	soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
d0e47fba KH	707	/* Register the fixup for PHY on DaVinci */
	708	phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
	709	davinci_phy_fixup);
	710
7c6337e2 KH	711	}
7c6337e2 KH	712
d0e47fba	713	MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
7c6337e2	714	/* Maintainer: MontaVista Software <source@mvista.com> */
e7e56014	715	.atag_offset = 0x100,
7c6337e2	716	.map_io = davinci_evm_map_io,
bd808947	717	.init_irq = davinci_irq_init,
7c6337e2 KH	718	.timer = &davinci_timer,
7c6337e2 KH	719	.init_machine = davinci_evm_init,
f68deabf	720	.dma_zone_size = SZ_128M,
7c6337e2	721	MACHINE_END