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e38d92fd KH |
1 | /* |
2 | * TI DaVinci DM646X EVM board | |
3 | * | |
4 | * Derived from: arch/arm/mach-davinci/board-evm.c | |
5 | * Copyright (C) 2006 Texas Instruments. | |
6 | * | |
7 | * (C) 2007-2008, MontaVista Software, Inc. | |
8 | * | |
9 | * This file is licensed under the terms of the GNU General Public License | |
10 | * version 2. This program is licensed "as is" without any warranty of any | |
11 | * kind, whether express or implied. | |
12 | * | |
13 | */ | |
14 | ||
15 | /************************************************************************** | |
16 | * Included Files | |
17 | **************************************************************************/ | |
18 | ||
19 | #include <linux/kernel.h> | |
e38d92fd | 20 | #include <linux/init.h> |
e38d92fd KH |
21 | #include <linux/leds.h> |
22 | #include <linux/gpio.h> | |
e38d92fd KH |
23 | #include <linux/platform_device.h> |
24 | #include <linux/i2c.h> | |
25 | #include <linux/i2c/at24.h> | |
26 | #include <linux/i2c/pcf857x.h> | |
e38d92fd | 27 | |
85609c1c MK |
28 | #include <media/tvp514x.h> |
29 | ||
e38d92fd KH |
30 | #include <asm/mach-types.h> |
31 | #include <asm/mach/arch.h> | |
e38d92fd KH |
32 | |
33 | #include <mach/dm646x.h> | |
34 | #include <mach/common.h> | |
e38d92fd KH |
35 | #include <mach/serial.h> |
36 | #include <mach/i2c.h> | |
ac7b75b5 | 37 | |
548197bd HP |
38 | #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ |
39 | defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) | |
40 | #define HAS_ATA 1 | |
41 | #else | |
42 | #define HAS_ATA 0 | |
43 | #endif | |
44 | ||
45 | /* CPLD Register 0 bits to control ATA */ | |
46 | #define DM646X_EVM_ATA_RST BIT(0) | |
47 | #define DM646X_EVM_ATA_PWD BIT(1) | |
48 | ||
ac7b75b5 KH |
49 | #define DM646X_EVM_PHY_MASK (0x2) |
50 | #define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ | |
51 | ||
85609c1c MK |
52 | #define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38) |
53 | #define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c) | |
54 | #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) | |
55 | #define VCH2CLK_SYSCLK8 (BIT(9)) | |
56 | #define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) | |
57 | #define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12)) | |
58 | #define VCH3CLK_SYSCLK8 (BIT(13)) | |
59 | #define VCH3CLK_AUXCLK (BIT(14) | BIT(13)) | |
60 | ||
61 | #define VIDCH2CLK (BIT(10)) | |
62 | #define VIDCH3CLK (BIT(11)) | |
63 | #define VIDCH1CLK (BIT(4)) | |
64 | #define TVP7002_INPUT (BIT(4)) | |
65 | #define TVP5147_INPUT (~BIT(4)) | |
66 | #define VPIF_INPUT_ONE_CHANNEL (BIT(5)) | |
67 | #define VPIF_INPUT_TWO_CHANNEL (~BIT(5)) | |
68 | #define TVP5147_CH0 "tvp514x-0" | |
69 | #define TVP5147_CH1 "tvp514x-1" | |
70 | ||
71 | static void __iomem *vpif_vidclkctl_reg; | |
72 | static void __iomem *vpif_vsclkdis_reg; | |
73 | /* spin lock for updating above registers */ | |
74 | static spinlock_t vpif_reg_lock; | |
75 | ||
e38d92fd KH |
76 | static struct davinci_uart_config uart_config __initdata = { |
77 | .enabled_uarts = (1 << 0), | |
78 | }; | |
79 | ||
548197bd HP |
80 | /* CPLD Register 0 Client: used for I/O Control */ |
81 | static int cpld_reg0_probe(struct i2c_client *client, | |
82 | const struct i2c_device_id *id) | |
83 | { | |
84 | if (HAS_ATA) { | |
85 | u8 data; | |
86 | struct i2c_msg msg[2] = { | |
87 | { | |
88 | .addr = client->addr, | |
89 | .flags = I2C_M_RD, | |
90 | .len = 1, | |
91 | .buf = &data, | |
92 | }, | |
93 | { | |
94 | .addr = client->addr, | |
95 | .flags = 0, | |
96 | .len = 1, | |
97 | .buf = &data, | |
98 | }, | |
99 | }; | |
100 | ||
101 | /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */ | |
102 | i2c_transfer(client->adapter, msg, 1); | |
103 | data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD); | |
104 | i2c_transfer(client->adapter, msg + 1, 1); | |
105 | } | |
106 | ||
107 | return 0; | |
108 | } | |
109 | ||
110 | static const struct i2c_device_id cpld_reg_ids[] = { | |
111 | { "cpld_reg0", 0, }, | |
112 | { }, | |
113 | }; | |
114 | ||
115 | static struct i2c_driver dm6467evm_cpld_driver = { | |
116 | .driver.name = "cpld_reg0", | |
117 | .id_table = cpld_reg_ids, | |
118 | .probe = cpld_reg0_probe, | |
119 | }; | |
120 | ||
e38d92fd KH |
121 | /* LEDS */ |
122 | ||
123 | static struct gpio_led evm_leds[] = { | |
124 | { .name = "DS1", .active_low = 1, }, | |
125 | { .name = "DS2", .active_low = 1, }, | |
126 | { .name = "DS3", .active_low = 1, }, | |
127 | { .name = "DS4", .active_low = 1, }, | |
128 | }; | |
129 | ||
130 | static __initconst struct gpio_led_platform_data evm_led_data = { | |
131 | .num_leds = ARRAY_SIZE(evm_leds), | |
132 | .leds = evm_leds, | |
133 | }; | |
134 | ||
135 | static struct platform_device *evm_led_dev; | |
136 | ||
137 | static int evm_led_setup(struct i2c_client *client, int gpio, | |
138 | unsigned int ngpio, void *c) | |
139 | { | |
140 | struct gpio_led *leds = evm_leds; | |
141 | int status; | |
142 | ||
143 | while (ngpio--) { | |
144 | leds->gpio = gpio++; | |
145 | leds++; | |
146 | }; | |
147 | ||
148 | evm_led_dev = platform_device_alloc("leds-gpio", 0); | |
149 | platform_device_add_data(evm_led_dev, &evm_led_data, | |
150 | sizeof(evm_led_data)); | |
151 | ||
152 | evm_led_dev->dev.parent = &client->dev; | |
153 | status = platform_device_add(evm_led_dev); | |
154 | if (status < 0) { | |
155 | platform_device_put(evm_led_dev); | |
156 | evm_led_dev = NULL; | |
157 | } | |
158 | return status; | |
159 | } | |
160 | ||
161 | static int evm_led_teardown(struct i2c_client *client, int gpio, | |
162 | unsigned ngpio, void *c) | |
163 | { | |
164 | if (evm_led_dev) { | |
165 | platform_device_unregister(evm_led_dev); | |
166 | evm_led_dev = NULL; | |
167 | } | |
168 | return 0; | |
169 | } | |
170 | ||
171 | static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL }; | |
172 | ||
173 | static int evm_sw_setup(struct i2c_client *client, int gpio, | |
174 | unsigned ngpio, void *c) | |
175 | { | |
176 | int status; | |
177 | int i; | |
178 | char label[10]; | |
179 | ||
180 | for (i = 0; i < 4; ++i) { | |
181 | snprintf(label, 10, "user_sw%d", i); | |
182 | status = gpio_request(gpio, label); | |
183 | if (status) | |
184 | goto out_free; | |
185 | evm_sw_gpio[i] = gpio++; | |
186 | ||
187 | status = gpio_direction_input(evm_sw_gpio[i]); | |
188 | if (status) { | |
189 | gpio_free(evm_sw_gpio[i]); | |
190 | evm_sw_gpio[i] = -EINVAL; | |
191 | goto out_free; | |
192 | } | |
193 | ||
194 | status = gpio_export(evm_sw_gpio[i], 0); | |
195 | if (status) { | |
196 | gpio_free(evm_sw_gpio[i]); | |
197 | evm_sw_gpio[i] = -EINVAL; | |
198 | goto out_free; | |
199 | } | |
200 | } | |
201 | return status; | |
202 | out_free: | |
203 | for (i = 0; i < 4; ++i) { | |
204 | if (evm_sw_gpio[i] != -EINVAL) { | |
205 | gpio_free(evm_sw_gpio[i]); | |
206 | evm_sw_gpio[i] = -EINVAL; | |
207 | } | |
208 | } | |
209 | return status; | |
210 | } | |
211 | ||
212 | static int evm_sw_teardown(struct i2c_client *client, int gpio, | |
213 | unsigned ngpio, void *c) | |
214 | { | |
215 | int i; | |
216 | ||
217 | for (i = 0; i < 4; ++i) { | |
218 | if (evm_sw_gpio[i] != -EINVAL) { | |
219 | gpio_unexport(evm_sw_gpio[i]); | |
220 | gpio_free(evm_sw_gpio[i]); | |
221 | evm_sw_gpio[i] = -EINVAL; | |
222 | } | |
223 | } | |
224 | return 0; | |
225 | } | |
226 | ||
227 | static int evm_pcf_setup(struct i2c_client *client, int gpio, | |
228 | unsigned int ngpio, void *c) | |
229 | { | |
230 | int status; | |
231 | ||
232 | if (ngpio < 8) | |
233 | return -EINVAL; | |
234 | ||
235 | status = evm_sw_setup(client, gpio, 4, c); | |
236 | if (status) | |
237 | return status; | |
238 | ||
239 | return evm_led_setup(client, gpio+4, 4, c); | |
240 | } | |
241 | ||
242 | static int evm_pcf_teardown(struct i2c_client *client, int gpio, | |
243 | unsigned int ngpio, void *c) | |
244 | { | |
245 | BUG_ON(ngpio < 8); | |
246 | ||
247 | evm_sw_teardown(client, gpio, 4, c); | |
248 | evm_led_teardown(client, gpio+4, 4, c); | |
249 | ||
250 | return 0; | |
251 | } | |
252 | ||
253 | static struct pcf857x_platform_data pcf_data = { | |
254 | .gpio_base = DAVINCI_N_GPIO+1, | |
255 | .setup = evm_pcf_setup, | |
256 | .teardown = evm_pcf_teardown, | |
257 | }; | |
258 | ||
259 | /* Most of this EEPROM is unused, but U-Boot uses some data: | |
260 | * - 0x7f00, 6 bytes Ethernet Address | |
261 | * - ... newer boards may have more | |
262 | */ | |
e38d92fd KH |
263 | |
264 | static struct at24_platform_data eeprom_info = { | |
265 | .byte_len = (256*1024) / 8, | |
266 | .page_size = 64, | |
267 | .flags = AT24_FLAG_ADDR16, | |
b14dc0f9 MG |
268 | .setup = davinci_get_mac_addr, |
269 | .context = (void *)0x7f00, | |
e38d92fd KH |
270 | }; |
271 | ||
25acf553 C |
272 | static u8 dm646x_iis_serializer_direction[] = { |
273 | TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
274 | }; | |
275 | ||
276 | static u8 dm646x_dit_serializer_direction[] = { | |
277 | TX_MODE, | |
278 | }; | |
279 | ||
280 | static struct snd_platform_data dm646x_evm_snd_data[] = { | |
281 | { | |
25acf553 C |
282 | .tx_dma_offset = 0x400, |
283 | .rx_dma_offset = 0x400, | |
284 | .op_mode = DAVINCI_MCASP_IIS_MODE, | |
285 | .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction), | |
286 | .tdm_slots = 2, | |
287 | .serial_dir = dm646x_iis_serializer_direction, | |
288 | .eventq_no = EVENTQ_0, | |
289 | }, | |
290 | { | |
25acf553 C |
291 | .tx_dma_offset = 0x400, |
292 | .rx_dma_offset = 0, | |
293 | .op_mode = DAVINCI_MCASP_DIT_MODE, | |
294 | .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction), | |
295 | .tdm_slots = 32, | |
296 | .serial_dir = dm646x_dit_serializer_direction, | |
297 | .eventq_no = EVENTQ_0, | |
298 | }, | |
299 | }; | |
300 | ||
85609c1c MK |
301 | static struct i2c_client *cpld_client; |
302 | ||
303 | static int cpld_video_probe(struct i2c_client *client, | |
304 | const struct i2c_device_id *id) | |
305 | { | |
306 | cpld_client = client; | |
307 | return 0; | |
308 | } | |
309 | ||
310 | static int __devexit cpld_video_remove(struct i2c_client *client) | |
311 | { | |
312 | cpld_client = NULL; | |
313 | return 0; | |
314 | } | |
315 | ||
316 | static const struct i2c_device_id cpld_video_id[] = { | |
317 | { "cpld_video", 0 }, | |
318 | { } | |
319 | }; | |
320 | ||
321 | static struct i2c_driver cpld_video_driver = { | |
322 | .driver = { | |
323 | .name = "cpld_video", | |
324 | }, | |
325 | .probe = cpld_video_probe, | |
326 | .remove = cpld_video_remove, | |
327 | .id_table = cpld_video_id, | |
328 | }; | |
329 | ||
330 | static void evm_init_cpld(void) | |
331 | { | |
332 | i2c_add_driver(&cpld_video_driver); | |
333 | } | |
334 | ||
e38d92fd KH |
335 | static struct i2c_board_info __initdata i2c_info[] = { |
336 | { | |
337 | I2C_BOARD_INFO("24c256", 0x50), | |
338 | .platform_data = &eeprom_info, | |
339 | }, | |
340 | { | |
341 | I2C_BOARD_INFO("pcf8574a", 0x38), | |
342 | .platform_data = &pcf_data, | |
343 | }, | |
548197bd HP |
344 | { |
345 | I2C_BOARD_INFO("cpld_reg0", 0x3a), | |
346 | }, | |
1a7ff8ff C |
347 | { |
348 | I2C_BOARD_INFO("tlv320aic33", 0x18), | |
85609c1c MK |
349 | }, |
350 | { | |
351 | I2C_BOARD_INFO("cpld_video", 0x3b), | |
352 | }, | |
e38d92fd KH |
353 | }; |
354 | ||
355 | static struct davinci_i2c_platform_data i2c_pdata = { | |
356 | .bus_freq = 100 /* kHz */, | |
357 | .bus_delay = 0 /* usec */, | |
358 | }; | |
359 | ||
85609c1c MK |
360 | static int set_vpif_clock(int mux_mode, int hd) |
361 | { | |
362 | unsigned long flags; | |
363 | unsigned int value; | |
364 | int val = 0; | |
365 | int err = 0; | |
366 | ||
367 | if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client) | |
368 | return -ENXIO; | |
369 | ||
370 | /* disable the clock */ | |
371 | spin_lock_irqsave(&vpif_reg_lock, flags); | |
372 | value = __raw_readl(vpif_vsclkdis_reg); | |
373 | value |= (VIDCH3CLK | VIDCH2CLK); | |
374 | __raw_writel(value, vpif_vsclkdis_reg); | |
375 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | |
376 | ||
377 | val = i2c_smbus_read_byte(cpld_client); | |
378 | if (val < 0) | |
379 | return val; | |
380 | ||
381 | if (mux_mode == 1) | |
382 | val &= ~0x40; | |
383 | else | |
384 | val |= 0x40; | |
385 | ||
386 | err = i2c_smbus_write_byte(cpld_client, val); | |
387 | if (err) | |
388 | return err; | |
389 | ||
390 | value = __raw_readl(vpif_vidclkctl_reg); | |
391 | value &= ~(VCH2CLK_MASK); | |
392 | value &= ~(VCH3CLK_MASK); | |
393 | ||
394 | if (hd >= 1) | |
395 | value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8); | |
396 | else | |
397 | value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK); | |
398 | ||
399 | __raw_writel(value, vpif_vidclkctl_reg); | |
400 | ||
401 | spin_lock_irqsave(&vpif_reg_lock, flags); | |
402 | value = __raw_readl(vpif_vsclkdis_reg); | |
403 | /* enable the clock */ | |
404 | value &= ~(VIDCH3CLK | VIDCH2CLK); | |
405 | __raw_writel(value, vpif_vsclkdis_reg); | |
406 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | |
407 | ||
408 | return 0; | |
409 | } | |
410 | ||
411 | static struct vpif_subdev_info dm646x_vpif_subdev[] = { | |
412 | { | |
413 | .name = "adv7343", | |
414 | .board_info = { | |
415 | I2C_BOARD_INFO("adv7343", 0x2a), | |
416 | }, | |
417 | }, | |
418 | { | |
419 | .name = "ths7303", | |
420 | .board_info = { | |
421 | I2C_BOARD_INFO("ths7303", 0x2c), | |
422 | }, | |
423 | }, | |
424 | }; | |
425 | ||
426 | static const char *output[] = { | |
427 | "Composite", | |
428 | "Component", | |
429 | "S-Video", | |
430 | }; | |
431 | ||
432 | static struct vpif_display_config dm646x_vpif_display_config = { | |
433 | .set_clock = set_vpif_clock, | |
434 | .subdevinfo = dm646x_vpif_subdev, | |
435 | .subdev_count = ARRAY_SIZE(dm646x_vpif_subdev), | |
436 | .output = output, | |
437 | .output_count = ARRAY_SIZE(output), | |
438 | .card_name = "DM646x EVM", | |
439 | }; | |
440 | ||
441 | /** | |
442 | * setup_vpif_input_path() | |
443 | * @channel: channel id (0 - CH0, 1 - CH1) | |
444 | * @sub_dev_name: ptr sub device name | |
445 | * | |
446 | * This will set vpif input to capture data from tvp514x or | |
447 | * tvp7002. | |
448 | */ | |
449 | static int setup_vpif_input_path(int channel, const char *sub_dev_name) | |
450 | { | |
451 | int err = 0; | |
452 | int val; | |
453 | ||
454 | /* for channel 1, we don't do anything */ | |
455 | if (channel != 0) | |
456 | return 0; | |
457 | ||
458 | if (!cpld_client) | |
459 | return -ENXIO; | |
460 | ||
461 | val = i2c_smbus_read_byte(cpld_client); | |
462 | if (val < 0) | |
463 | return val; | |
464 | ||
465 | if (!strcmp(sub_dev_name, TVP5147_CH0) || | |
466 | !strcmp(sub_dev_name, TVP5147_CH1)) | |
467 | val &= TVP5147_INPUT; | |
468 | else | |
469 | val |= TVP7002_INPUT; | |
470 | ||
471 | err = i2c_smbus_write_byte(cpld_client, val); | |
472 | if (err) | |
473 | return err; | |
474 | return 0; | |
475 | } | |
476 | ||
477 | /** | |
478 | * setup_vpif_input_channel_mode() | |
479 | * @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel | |
480 | * | |
481 | * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147) | |
482 | */ | |
483 | static int setup_vpif_input_channel_mode(int mux_mode) | |
484 | { | |
485 | unsigned long flags; | |
486 | int err = 0; | |
487 | int val; | |
488 | u32 value; | |
489 | ||
490 | if (!vpif_vsclkdis_reg || !cpld_client) | |
491 | return -ENXIO; | |
492 | ||
493 | val = i2c_smbus_read_byte(cpld_client); | |
494 | if (val < 0) | |
495 | return val; | |
496 | ||
497 | spin_lock_irqsave(&vpif_reg_lock, flags); | |
498 | value = __raw_readl(vpif_vsclkdis_reg); | |
499 | if (mux_mode) { | |
500 | val &= VPIF_INPUT_TWO_CHANNEL; | |
501 | value |= VIDCH1CLK; | |
502 | } else { | |
503 | val |= VPIF_INPUT_ONE_CHANNEL; | |
504 | value &= ~VIDCH1CLK; | |
505 | } | |
506 | __raw_writel(value, vpif_vsclkdis_reg); | |
507 | spin_unlock_irqrestore(&vpif_reg_lock, flags); | |
508 | ||
509 | err = i2c_smbus_write_byte(cpld_client, val); | |
510 | if (err) | |
511 | return err; | |
512 | ||
513 | return 0; | |
514 | } | |
515 | ||
516 | static struct tvp514x_platform_data tvp5146_pdata = { | |
517 | .clk_polarity = 0, | |
518 | .hs_polarity = 1, | |
519 | .vs_polarity = 1 | |
520 | }; | |
521 | ||
522 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | |
523 | ||
524 | static struct vpif_subdev_info vpif_capture_sdev_info[] = { | |
525 | { | |
526 | .name = TVP5147_CH0, | |
527 | .board_info = { | |
528 | I2C_BOARD_INFO("tvp5146", 0x5d), | |
529 | .platform_data = &tvp5146_pdata, | |
530 | }, | |
531 | .input = INPUT_CVBS_VI2B, | |
532 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
533 | .can_route = 1, | |
534 | .vpif_if = { | |
535 | .if_type = VPIF_IF_BT656, | |
536 | .hd_pol = 1, | |
537 | .vd_pol = 1, | |
538 | .fid_pol = 0, | |
539 | }, | |
540 | }, | |
541 | { | |
542 | .name = TVP5147_CH1, | |
543 | .board_info = { | |
544 | I2C_BOARD_INFO("tvp5146", 0x5c), | |
545 | .platform_data = &tvp5146_pdata, | |
546 | }, | |
547 | .input = INPUT_SVIDEO_VI2C_VI1C, | |
548 | .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
549 | .can_route = 1, | |
550 | .vpif_if = { | |
551 | .if_type = VPIF_IF_BT656, | |
552 | .hd_pol = 1, | |
553 | .vd_pol = 1, | |
554 | .fid_pol = 0, | |
555 | }, | |
556 | }, | |
557 | }; | |
558 | ||
559 | static const struct vpif_input dm6467_ch0_inputs[] = { | |
560 | { | |
561 | .input = { | |
562 | .index = 0, | |
563 | .name = "Composite", | |
564 | .type = V4L2_INPUT_TYPE_CAMERA, | |
565 | .std = TVP514X_STD_ALL, | |
566 | }, | |
567 | .subdev_name = TVP5147_CH0, | |
568 | }, | |
569 | }; | |
570 | ||
571 | static const struct vpif_input dm6467_ch1_inputs[] = { | |
572 | { | |
573 | .input = { | |
574 | .index = 0, | |
575 | .name = "S-Video", | |
576 | .type = V4L2_INPUT_TYPE_CAMERA, | |
577 | .std = TVP514X_STD_ALL, | |
578 | }, | |
579 | .subdev_name = TVP5147_CH1, | |
580 | }, | |
581 | }; | |
582 | ||
583 | static struct vpif_capture_config dm646x_vpif_capture_cfg = { | |
584 | .setup_input_path = setup_vpif_input_path, | |
585 | .setup_input_channel_mode = setup_vpif_input_channel_mode, | |
586 | .subdev_info = vpif_capture_sdev_info, | |
587 | .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info), | |
588 | .chan_config[0] = { | |
589 | .inputs = dm6467_ch0_inputs, | |
590 | .input_count = ARRAY_SIZE(dm6467_ch0_inputs), | |
591 | }, | |
592 | .chan_config[1] = { | |
593 | .inputs = dm6467_ch1_inputs, | |
594 | .input_count = ARRAY_SIZE(dm6467_ch1_inputs), | |
595 | }, | |
596 | }; | |
597 | ||
598 | static void __init evm_init_video(void) | |
599 | { | |
600 | vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4); | |
601 | vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4); | |
602 | if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) { | |
603 | pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n"); | |
604 | return; | |
605 | } | |
606 | spin_lock_init(&vpif_reg_lock); | |
607 | ||
608 | dm646x_setup_vpif(&dm646x_vpif_display_config, | |
609 | &dm646x_vpif_capture_cfg); | |
610 | } | |
611 | ||
e38d92fd KH |
612 | static void __init evm_init_i2c(void) |
613 | { | |
614 | davinci_init_i2c(&i2c_pdata); | |
548197bd | 615 | i2c_add_driver(&dm6467evm_cpld_driver); |
e38d92fd | 616 | i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); |
85609c1c MK |
617 | evm_init_cpld(); |
618 | evm_init_video(); | |
e38d92fd KH |
619 | } |
620 | ||
621 | static void __init davinci_map_io(void) | |
622 | { | |
e38d92fd KH |
623 | dm646x_init(); |
624 | } | |
625 | ||
626 | static __init void evm_init(void) | |
627 | { | |
972412b6 MG |
628 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
629 | ||
e38d92fd KH |
630 | evm_init_i2c(); |
631 | davinci_serial_init(&uart_config); | |
25acf553 C |
632 | dm646x_init_mcasp0(&dm646x_evm_snd_data[0]); |
633 | dm646x_init_mcasp1(&dm646x_evm_snd_data[1]); | |
972412b6 | 634 | |
548197bd HP |
635 | if (HAS_ATA) |
636 | dm646x_init_ide(); | |
637 | ||
972412b6 MG |
638 | soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK; |
639 | soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY; | |
e38d92fd KH |
640 | } |
641 | ||
642 | static __init void davinci_dm646x_evm_irq_init(void) | |
643 | { | |
644 | davinci_irq_init(); | |
645 | } | |
646 | ||
647 | MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") | |
648 | .phys_io = IO_PHYS, | |
649 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, | |
650 | .boot_params = (0x80000100), | |
651 | .map_io = davinci_map_io, | |
652 | .init_irq = davinci_dm646x_evm_irq_init, | |
653 | .timer = &davinci_timer, | |
654 | .init_machine = evm_init, | |
655 | MACHINE_END | |
656 |