projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 6c18c91b VR |
1 | /* |
| 2 | * Hawkboard.org based on TI's OMAP-L138 Platform | |
| 3 | * | |
| 4 | * Initial code: Syed Mohammed Khasim | |
| 5 | * | |
| 6 | * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com | |
| 7 | * | |
| 8 | * This file is licensed under the terms of the GNU General Public License | |
| 9 | * version 2. This program is licensed "as is" without any warranty of | |
| 10 | * any kind, whether express or implied. | |
| 11 | */ | |
| 12 | #include <linux/kernel.h> | |
| 13 | #include <linux/init.h> | |
| 14 | #include <linux/console.h> | |
| 15 | #include <linux/gpio.h> | |
| 16 | ||
| 17 | #include <asm/mach-types.h> | |
| 18 | #include <asm/mach/arch.h> | |
| 19 | ||
| 20 | #include <mach/cp_intc.h> | |
| 21 | #include <mach/da8xx.h> | |
| bb59b7fd VR |
22 | #include <mach/mux.h> |
| 23 | ||
| 24 | #define HAWKBOARD_PHY_ID "0:07" | |
| 25 | ||
| 26 | static short omapl138_hawk_mii_pins[] __initdata = { | |
| 27 | DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, | |
| 28 | DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, | |
| 29 | DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, | |
| 30 | DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, | |
| 31 | DA850_MDIO_D, | |
| 32 | -1 | |
| 33 | }; | |
| 34 | ||
| 35 | static __init void omapl138_hawk_config_emac(void) | |
| 36 | { | |
| 37 | void __iomem *cfgchip3 = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); | |
| 38 | int ret; | |
| 39 | u32 val; | |
| 40 | struct davinci_soc_info *soc_info = &davinci_soc_info; | |
| 41 | ||
| 42 | val = __raw_readl(cfgchip3); | |
| 43 | val &= ~BIT(8); | |
| 44 | ret = davinci_cfg_reg_list(omapl138_hawk_mii_pins); | |
| 45 | if (ret) { | |
| 46 | pr_warning("%s: cpgmac/mii mux setup failed: %d\n", | |
| 47 | __func__, ret); | |
| 48 | return; | |
| 49 | } | |
| 50 | ||
| 51 | /* configure the CFGCHIP3 register for MII */ | |
| 52 | __raw_writel(val, cfgchip3); | |
| 53 | pr_info("EMAC: MII PHY configured\n"); | |
| 54 | ||
| 55 | soc_info->emac_pdata->phy_id = HAWKBOARD_PHY_ID; | |
| 56 | ||
| 57 | ret = da8xx_register_emac(); | |
| 58 | if (ret) | |
| 59 | pr_warning("%s: emac registration failed: %d\n", | |
| 60 | __func__, ret); | |
| 61 | } | |
| 62 | ||
| 5f72f380 VR |
63 | /* |
| 64 | * The following EDMA channels/slots are not being used by drivers (for | |
| 65 | * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM/Hawkboard, | |
| 66 | * hence they are being reserved for codecs on the DSP side. | |
| 67 | */ | |
| 68 | static const s16 da850_dma0_rsv_chans[][2] = { | |
| 69 | /* (offset, number) */ | |
| 70 | { 8, 6}, | |
| 71 | {24, 4}, | |
| 72 | {30, 2}, | |
| 73 | {-1, -1} | |
| 74 | }; | |
| 75 | ||
| 76 | static const s16 da850_dma0_rsv_slots[][2] = { | |
| 77 | /* (offset, number) */ | |
| 78 | { 8, 6}, | |
| 79 | {24, 4}, | |
| 80 | {30, 50}, | |
| 81 | {-1, -1} | |
| 82 | }; | |
| 83 | ||
| 84 | static const s16 da850_dma1_rsv_chans[][2] = { | |
| 85 | /* (offset, number) */ | |
| 86 | { 0, 28}, | |
| 87 | {30, 2}, | |
| 88 | {-1, -1} | |
| 89 | }; | |
| 90 | ||
| 91 | static const s16 da850_dma1_rsv_slots[][2] = { | |
| 92 | /* (offset, number) */ | |
| 93 | { 0, 28}, | |
| 94 | {30, 90}, | |
| 95 | {-1, -1} | |
| 96 | }; | |
| 97 | ||
| 98 | static struct edma_rsv_info da850_edma_cc0_rsv = { | |
| 99 | .rsv_chans = da850_dma0_rsv_chans, | |
| 100 | .rsv_slots = da850_dma0_rsv_slots, | |
| 101 | }; | |
| 102 | ||
| 103 | static struct edma_rsv_info da850_edma_cc1_rsv = { | |
| 104 | .rsv_chans = da850_dma1_rsv_chans, | |
| 105 | .rsv_slots = da850_dma1_rsv_slots, | |
| 106 | }; | |
| 107 | ||
| 108 | static struct edma_rsv_info *da850_edma_rsv[2] = { | |
| 109 | &da850_edma_cc0_rsv, | |
| 110 | &da850_edma_cc1_rsv, | |
| 111 | }; | |
| 6c18c91b VR |
112 | |
| 113 | static struct davinci_uart_config omapl138_hawk_uart_config __initdata = { | |
| 114 | .enabled_uarts = 0x7, | |
| 115 | }; | |
| 116 | ||
| 117 | static __init void omapl138_hawk_init(void) | |
| 118 | { | |
| 119 | int ret; | |
| 120 | ||
| 121 | davinci_serial_init(&omapl138_hawk_uart_config); | |
| 122 | ||
| bb59b7fd VR |
123 | omapl138_hawk_config_emac(); |
| 124 | ||
| 5f72f380 VR |
125 | ret = da850_register_edma(da850_edma_rsv); |
| 126 | if (ret) | |
| 127 | pr_warning("%s: EDMA registration failed: %d\n", | |
| 128 | __func__, ret); | |
| 129 | ||
| 6c18c91b VR |
130 | ret = da8xx_register_watchdog(); |
| 131 | if (ret) | |
| 132 | pr_warning("omapl138_hawk_init: " | |
| 133 | "watchdog registration failed: %d\n", | |
| 134 | ret); | |
| 135 | } | |
| 136 | ||
| 137 | #ifdef CONFIG_SERIAL_8250_CONSOLE | |
| 138 | static int __init omapl138_hawk_console_init(void) | |
| 139 | { | |
| 140 | if (!machine_is_omapl138_hawkboard()) | |
| 141 | return 0; | |
| 142 | ||
| 143 | return add_preferred_console("ttyS", 2, "115200"); | |
| 144 | } | |
| 145 | console_initcall(omapl138_hawk_console_init); | |
| 146 | #endif | |
| 147 | ||
| 148 | static void __init omapl138_hawk_map_io(void) | |
| 149 | { | |
| 150 | da850_init(); | |
| 151 | } | |
| 152 | ||
| 153 | MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard") | |
| 6c18c91b VR |
154 | .boot_params = (DA8XX_DDR_BASE + 0x100), |
| 155 | .map_io = omapl138_hawk_map_io, | |
| 156 | .init_irq = cp_intc_init, | |
| 157 | .timer = &davinci_timer, | |
| 158 | .init_machine = omapl138_hawk_init, | |
| 159 | MACHINE_END |