[deliverable/linux.git] / arch / arm / mach-davinci / board-sffsdr.c

/*
 * Lyrtech SFFSDR board support.
 *
 * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
 *
 * Based on DV-EVM platform, original copyright follows:
 *
 * Copyright (C) 2007 MontaVista Software, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>

#include <mach/dm644x.h>
#include <mach/common.h>
#include <mach/i2c.h>
#include <mach/serial.h>
#include <mach/mux.h>

#define SFFSDR_PHY_MASK		(0x2)
#define SFFSDR_MDIO_FREQUENCY	(2200000) /* PHY bus frequency */

#define DAVINCI_ASYNC_EMIF_CONTROL_BASE   0x01e00000
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE  0x02000000

struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
	/* U-Boot Environment: Block 0
	 * UBL:                Block 1
	 * U-Boot:             Blocks 6-7 (256 kb)
	 * Integrity Kernel:   Blocks 8-31 (3 Mb)
	 * Integrity Data:     Blocks 100-END
	 */
	{
		.name		= "Linux Kernel",
		.offset		= 32 * SZ_128K,
		.size		= 16 * SZ_128K, /* 2 Mb */
		.mask_flags	= MTD_WRITEABLE, /* Force read-only */
	},
	{
		.name		= "Linux ROOT",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 256 * SZ_128K, /* 32 Mb */
		.mask_flags	= 0, /* R/W */
	},
};

static struct flash_platform_data davinci_sffsdr_nandflash_data = {
	.parts		= davinci_sffsdr_nandflash_partition,
	.nr_parts	= ARRAY_SIZE(davinci_sffsdr_nandflash_partition),
};

static struct resource davinci_sffsdr_nandflash_resource[] = {
	{
		.start		= DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
		.end		= DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
		.flags		= IORESOURCE_MEM,
	}, {
		.start		= DAVINCI_ASYNC_EMIF_CONTROL_BASE,
		.end		= DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device davinci_sffsdr_nandflash_device = {
	.name		= "davinci_nand", /* Name of driver */
	.id		= 0,
	.dev		= {
		.platform_data	= &davinci_sffsdr_nandflash_data,
	},
	.num_resources	= ARRAY_SIZE(davinci_sffsdr_nandflash_resource),
	.resource	= davinci_sffsdr_nandflash_resource,
};

static struct emac_platform_data sffsdr_emac_pdata = {
	.phy_mask	= SFFSDR_PHY_MASK,
	.mdio_max_freq	= SFFSDR_MDIO_FREQUENCY,
};

static struct at24_platform_data eeprom_info = {
	.byte_len	= (64*1024) / 8,
	.page_size	= 32,
	.flags		= AT24_FLAG_ADDR16,
};

static struct i2c_board_info __initdata i2c_info[] =  {
	{
		I2C_BOARD_INFO("24lc64", 0x50),
		.platform_data	= &eeprom_info,
	},
	/* Other I2C devices:
	 * MSP430,  addr 0x23 (not used)
	 * PCA9543, addr 0x70 (setup done by U-Boot)
	 * ADS7828, addr 0x48 (ADC for voltage monitoring.)
	 */
};

static struct davinci_i2c_platform_data i2c_pdata = {
	.bus_freq	= 20 /* kHz */,
	.bus_delay	= 100 /* usec */,
};

static void __init sffsdr_init_i2c(void)
{
	davinci_init_i2c(&i2c_pdata);
	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
}

static struct platform_device *davinci_sffsdr_devices[] __initdata = {
	&davinci_sffsdr_nandflash_device,
};

static struct davinci_uart_config uart_config __initdata = {
	.enabled_uarts = (1 << 0),
};

static void __init davinci_sffsdr_map_io(void)
{
	dm644x_init();
}

static __init void davinci_sffsdr_init(void)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	platform_add_devices(davinci_sffsdr_devices,
			     ARRAY_SIZE(davinci_sffsdr_devices));
	sffsdr_init_i2c();
	davinci_serial_init(&uart_config);
	soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK;
	soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY;
	setup_usb(0, 0); /* We support only peripheral mode. */

	/* mux VLYNQ pins */
	davinci_cfg_reg(DM644X_VLYNQEN);
	davinci_cfg_reg(DM644X_VLYNQWD);
}

static __init void davinci_sffsdr_irq_init(void)
{
	davinci_irq_init();
}

MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
	/* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */
	.phys_io      = IO_PHYS,
	.io_pg_offst  = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	.boot_params  = (DAVINCI_DDR_BASE + 0x100),
	.map_io	      = davinci_sffsdr_map_io,
	.init_irq     = davinci_sffsdr_irq_init,
	.timer	      = &davinci_timer,
	.init_machine = davinci_sffsdr_init,
MACHINE_END
Commit	Line	Data
f5ce6a67 HV	1	/*
	2	* Lyrtech SFFSDR board support.
	3	*
	4	* Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
	5	* Copyright (C) 2008 Lyrtech <www.lyrtech.com>
	6	*
	7	* Based on DV-EVM platform, original copyright follows:
	8	*
	9	* Copyright (C) 2007 MontaVista Software, Inc.
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or
	14	* (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25
f5ce6a67	26	#include <linux/init.h>
f5ce6a67	27	#include <linux/platform_device.h>
f5ce6a67 HV	28	#include <linux/i2c.h>
f5ce6a67 HV	29	#include <linux/i2c/at24.h>
f5ce6a67 HV	30	#include <linux/mtd/mtd.h>
	31	#include <linux/mtd/nand.h>
	32	#include <linux/mtd/partitions.h>
f5ce6a67	33
f5ce6a67	34	#include <asm/mach-types.h>
f5ce6a67	35	#include <asm/mach/arch.h>
f5ce6a67 HV	36	#include <asm/mach/flash.h>
	37
	38	#include <mach/dm644x.h>
	39	#include <mach/common.h>
	40	#include <mach/i2c.h>
	41	#include <mach/serial.h>
f5ce6a67 HV	42	#include <mach/mux.h>
f5ce6a67 HV	43
ac7b75b5 KH	44	#define SFFSDR_PHY_MASK (0x2)
	45	#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
	46
f5ce6a67 HV	47	#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
	48	#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
	49
	50	struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
	51	/* U-Boot Environment: Block 0
	52	* UBL: Block 1
	53	* U-Boot: Blocks 6-7 (256 kb)
	54	* Integrity Kernel: Blocks 8-31 (3 Mb)
	55	* Integrity Data: Blocks 100-END
	56	*/
	57	{
	58	.name = "Linux Kernel",
	59	.offset = 32 * SZ_128K,
	60	.size = 16 * SZ_128K, /* 2 Mb */
	61	.mask_flags = MTD_WRITEABLE, /* Force read-only */
	62	},
	63	{
	64	.name = "Linux ROOT",
	65	.offset = MTDPART_OFS_APPEND,
	66	.size = 256 * SZ_128K, /* 32 Mb */
	67	.mask_flags = 0, /* R/W */
	68	},
	69	};
	70
	71	static struct flash_platform_data davinci_sffsdr_nandflash_data = {
	72	.parts = davinci_sffsdr_nandflash_partition,
	73	.nr_parts = ARRAY_SIZE(davinci_sffsdr_nandflash_partition),
	74	};
	75
	76	static struct resource davinci_sffsdr_nandflash_resource[] = {
	77	{
	78	.start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
	79	.end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
	80	.flags = IORESOURCE_MEM,
	81	}, {
	82	.start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
	83	.end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
	84	.flags = IORESOURCE_MEM,
	85	},
	86	};
	87
	88	static struct platform_device davinci_sffsdr_nandflash_device = {
	89	.name = "davinci_nand", /* Name of driver */
	90	.id = 0,
	91	.dev = {
	92	.platform_data = &davinci_sffsdr_nandflash_data,
	93	},
	94	.num_resources = ARRAY_SIZE(davinci_sffsdr_nandflash_resource),
	95	.resource = davinci_sffsdr_nandflash_resource,
	96	};
	97
ac7b75b5 KH	98	static struct emac_platform_data sffsdr_emac_pdata = {
	99	.phy_mask = SFFSDR_PHY_MASK,
	100	.mdio_max_freq = SFFSDR_MDIO_FREQUENCY,
	101	};
f5ce6a67 HV	102
	103	static struct at24_platform_data eeprom_info = {
	104	.byte_len = (64*1024) / 8,
	105	.page_size = 32,
	106	.flags = AT24_FLAG_ADDR16,
	107	};
	108
	109	static struct i2c_board_info __initdata i2c_info[] = {
	110	{
	111	I2C_BOARD_INFO("24lc64", 0x50),
	112	.platform_data = &eeprom_info,
	113	},
	114	/* Other I2C devices:
	115	* MSP430, addr 0x23 (not used)
	116	* PCA9543, addr 0x70 (setup done by U-Boot)
	117	* ADS7828, addr 0x48 (ADC for voltage monitoring.)
	118	*/
	119	};
	120
	121	static struct davinci_i2c_platform_data i2c_pdata = {
	122	.bus_freq = 20 /* kHz */,
	123	.bus_delay = 100 /* usec */,
	124	};
	125
	126	static void __init sffsdr_init_i2c(void)
	127	{
	128	davinci_init_i2c(&i2c_pdata);
	129	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
	130	}
	131
	132	static struct platform_device *davinci_sffsdr_devices[] __initdata = {
	133	&davinci_sffsdr_nandflash_device,
	134	};
	135
	136	static struct davinci_uart_config uart_config __initdata = {
	137	.enabled_uarts = (1 << 0),
	138	};
	139
	140	static void __init davinci_sffsdr_map_io(void)
	141	{
f5ce6a67 HV	142	dm644x_init();
	143	}
	144
	145	static __init void davinci_sffsdr_init(void)
	146	{
972412b6 MG	147	struct davinci_soc_info *soc_info = &davinci_soc_info;
972412b6 MG	148
f5ce6a67 HV	149	platform_add_devices(davinci_sffsdr_devices,
	150	ARRAY_SIZE(davinci_sffsdr_devices));
	151	sffsdr_init_i2c();
	152	davinci_serial_init(&uart_config);
972412b6 MG	153	soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK;
972412b6 MG	154	soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY;
f5ce6a67 HV	155	setup_usb(0, 0); /* We support only peripheral mode. */
	156
	157	/* mux VLYNQ pins */
	158	davinci_cfg_reg(DM644X_VLYNQEN);
	159	davinci_cfg_reg(DM644X_VLYNQWD);
	160	}
	161
	162	static __init void davinci_sffsdr_irq_init(void)
	163	{
	164	davinci_irq_init();
	165	}
	166
	167	MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
	168	/* Maintainer: Hugo Villeneuve hugo.villeneuve@lyrtech.com */
	169	.phys_io = IO_PHYS,
	170	.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	171	.boot_params = (DAVINCI_DDR_BASE + 0x100),
	172	.map_io = davinci_sffsdr_map_io,
	173	.init_irq = davinci_sffsdr_irq_init,
	174	.timer = &davinci_timer,
	175	.init_machine = davinci_sffsdr_init,
	176	MACHINE_END