[deliverable/linux.git] / arch / arm / mach-davinci / cpuidle.c

/*
 * CPU idle for DaVinci SoCs
 *
 * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/
 *
 * Derived from Marvell Kirkwood CPU idle code
 * (arch/arm/mach-kirkwood/cpuidle.c)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/cpuidle.h>
#include <linux/io.h>
#include <linux/export.h>
#include <asm/proc-fns.h>
#include <asm/cpuidle.h>

#include <mach/cpuidle.h>
#include <mach/ddr2.h>

#define DAVINCI_CPUIDLE_MAX_STATES	2

static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
static void __iomem *ddr2_reg_base;
static bool ddr2_pdown;

static void davinci_save_ddr_power(int enter, bool pdown)
{
	u32 val;

	val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET);

	if (enter) {
		if (pdown)
			val |= DDR2_SRPD_BIT;
		else
			val &= ~DDR2_SRPD_BIT;
		val |= DDR2_LPMODEN_BIT;
	} else {
		val &= ~(DDR2_SRPD_BIT | DDR2_LPMODEN_BIT);
	}

	__raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
}

/* Actual code that puts the SoC in different idle states */
static int davinci_enter_idle(struct cpuidle_device *dev,
			      struct cpuidle_driver *drv, int index)
{
	davinci_save_ddr_power(1, ddr2_pdown);
	cpu_do_idle();
	davinci_save_ddr_power(0, ddr2_pdown);

	return index;
}

static struct cpuidle_driver davinci_idle_driver = {
	.name			= "cpuidle-davinci",
	.owner			= THIS_MODULE,
	.states[0]		= ARM_CPUIDLE_WFI_STATE,
	.states[1]		= {
		.enter			= davinci_enter_idle,
		.exit_latency		= 10,
		.target_residency	= 100000,
		.flags			= CPUIDLE_FLAG_TIME_VALID,
		.name			= "DDR SR",
		.desc			= "WFI and DDR Self Refresh",
	},
	.state_count = DAVINCI_CPUIDLE_MAX_STATES,
};

static int __init davinci_cpuidle_probe(struct platform_device *pdev)
{
	int ret;
	struct cpuidle_device *device;
	struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;

	device = &per_cpu(davinci_cpuidle_device, smp_processor_id());

	if (!pdata) {
		dev_err(&pdev->dev, "cannot get platform data\n");
		return -ENOENT;
	}

	ddr2_reg_base = pdata->ddr2_ctlr_base;

	ddr2_pdown = pdata->ddr2_pdown;

	ret = cpuidle_register_driver(&davinci_idle_driver);
	if (ret) {
		dev_err(&pdev->dev, "failed to register driver\n");
		return ret;
	}

	ret = cpuidle_register_device(device);
	if (ret) {
		dev_err(&pdev->dev, "failed to register device\n");
		cpuidle_unregister_driver(&davinci_idle_driver);
		return ret;
	}

	return 0;
}

static struct platform_driver davinci_cpuidle_driver = {
	.driver = {
		.name	= "cpuidle-davinci",
		.owner	= THIS_MODULE,
	},
};

static int __init davinci_cpuidle_init(void)
{
	return platform_driver_probe(&davinci_cpuidle_driver,
						davinci_cpuidle_probe);
}
device_initcall(davinci_cpuidle_init);
Commit	Line	Data
a6c0f6ec SN	1	/*
	2	* CPU idle for DaVinci SoCs
	3	*
	4	* Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/
	5	*
	6	* Derived from Marvell Kirkwood CPU idle code
	7	* (arch/arm/mach-kirkwood/cpuidle.c)
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/init.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/cpuidle.h>
	18	#include <linux/io.h>
dc28094b	19	#include <linux/export.h>
a6c0f6ec	20	#include <asm/proc-fns.h>
19976c2a	21	#include <asm/cpuidle.h>
a6c0f6ec SN	22
a6c0f6ec SN	23	#include <mach/cpuidle.h>
0020afb3	24	#include <mach/ddr2.h>
a6c0f6ec SN	25
	26	#define DAVINCI_CPUIDLE_MAX_STATES 2
	27
a6c0f6ec SN	28	static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
a6c0f6ec SN	29	static void __iomem *ddr2_reg_base;
5af4a21c	30	static bool ddr2_pdown;
a6c0f6ec	31
a6c0f6ec SN	32	static void davinci_save_ddr_power(int enter, bool pdown)
	33	{
	34	u32 val;
	35
	36	val = __raw_readl(ddr2_reg_base + DDR2_SDRCR_OFFSET);
	37
	38	if (enter) {
	39	if (pdown)
	40	val \|= DDR2_SRPD_BIT;
	41	else
	42	val &= ~DDR2_SRPD_BIT;
	43	val \|= DDR2_LPMODEN_BIT;
	44	} else {
	45	val &= ~(DDR2_SRPD_BIT \| DDR2_LPMODEN_BIT);
	46	}
	47
	48	__raw_writel(val, ddr2_reg_base + DDR2_SDRCR_OFFSET);
	49	}
	50
8d60143a DL	51	/* Actual code that puts the SoC in different idle states */
8d60143a DL	52	static int davinci_enter_idle(struct cpuidle_device *dev,
c062d443	53	struct cpuidle_driver *drv, int index)
8d60143a	54	{
36ce8d4f	55	davinci_save_ddr_power(1, ddr2_pdown);
c062d443	56	cpu_do_idle();
36ce8d4f	57	davinci_save_ddr_power(0, ddr2_pdown);
8d60143a DL	58
	59	return index;
	60	}
	61
	62	static struct cpuidle_driver davinci_idle_driver = {
	63	.name = "cpuidle-davinci",
	64	.owner = THIS_MODULE,
8d60143a DL	65	.states[0] = ARM_CPUIDLE_WFI_STATE,
	66	.states[1] = {
	67	.enter = davinci_enter_idle,
	68	.exit_latency = 10,
	69	.target_residency = 100000,
	70	.flags = CPUIDLE_FLAG_TIME_VALID,
	71	.name = "DDR SR",
	72	.desc = "WFI and DDR Self Refresh",
	73	},
	74	.state_count = DAVINCI_CPUIDLE_MAX_STATES,
	75	};
	76
a6c0f6ec SN	77	static int __init davinci_cpuidle_probe(struct platform_device *pdev)
	78	{
	79	int ret;
	80	struct cpuidle_device *device;
	81	struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
a6c0f6ec SN	82
	83	device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
	84
	85	if (!pdata) {
	86	dev_err(&pdev->dev, "cannot get platform data\n");
	87	return -ENOENT;
	88	}
	89
948c66df	90	ddr2_reg_base = pdata->ddr2_ctlr_base;
a6c0f6ec	91
5af4a21c	92	ddr2_pdown = pdata->ddr2_pdown;
a6c0f6ec	93
46bcfad7 DD	94	ret = cpuidle_register_driver(&davinci_idle_driver);
	95	if (ret) {
	96	dev_err(&pdev->dev, "failed to register driver\n");
	97	return ret;
	98	}
a6c0f6ec SN	99
	100	ret = cpuidle_register_device(device);
	101	if (ret) {
	102	dev_err(&pdev->dev, "failed to register device\n");
948c66df SN	103	cpuidle_unregister_driver(&davinci_idle_driver);
948c66df SN	104	return ret;
a6c0f6ec SN	105	}
	106
	107	return 0;
a6c0f6ec SN	108	}
	109
	110	static struct platform_driver davinci_cpuidle_driver = {
	111	.driver = {
	112	.name = "cpuidle-davinci",
	113	.owner = THIS_MODULE,
	114	},
	115	};
	116
	117	static int __init davinci_cpuidle_init(void)
	118	{
	119	return platform_driver_probe(&davinci_cpuidle_driver,
	120	davinci_cpuidle_probe);
	121	}
	122	device_initcall(davinci_cpuidle_init);
	123