[deliverable/linux.git] / arch / arm / mach-davinci / devices.c

/*
 * mach-davinci/devices.c
 *
 * DaVinci platform device setup/initialization
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/reboot.h>

#include <mach/hardware.h>
#include <linux/platform_data/i2c-davinci.h>
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
#include <linux/platform_data/edma.h>


#include "davinci.h"
#include "clock.h"

#define DAVINCI_I2C_BASE	     0x01C21000
#define DAVINCI_ATA_BASE	     0x01C66000
#define DAVINCI_MMCSD0_BASE	     0x01E10000
#define DM355_MMCSD0_BASE	     0x01E11000
#define DM355_MMCSD1_BASE	     0x01E00000
#define DM365_MMCSD0_BASE	     0x01D11000
#define DM365_MMCSD1_BASE	     0x01D00000

#define DAVINCI_DMA_MMCRXEVT	26
#define DAVINCI_DMA_MMCTXEVT	27

void __iomem  *davinci_sysmod_base;

void davinci_map_sysmod(void)
{
	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
					      0x800);
	/*
	 * Throw a bug since a lot of board initialization code depends
	 * on system module availability. ioremap() failing this early
	 * need careful looking into anyway.
	 */
	BUG_ON(!davinci_sysmod_base);
}

static struct resource i2c_resources[] = {
	{
		.start		= DAVINCI_I2C_BASE,
		.end		= DAVINCI_I2C_BASE + 0x40,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_I2C,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_i2c_device = {
	.name           = "i2c_davinci",
	.id             = 1,
	.num_resources	= ARRAY_SIZE(i2c_resources),
	.resource	= i2c_resources,
};

void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
{
	if (cpu_is_davinci_dm644x())
		davinci_cfg_reg(DM644X_I2C);

	davinci_i2c_device.dev.platform_data = pdata;
	(void) platform_device_register(&davinci_i2c_device);
}

static struct resource ide_resources[] = {
	{
		.start		= DAVINCI_ATA_BASE,
		.end		= DAVINCI_ATA_BASE + 0x7ff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_IDE,
		.end		= IRQ_IDE,
		.flags		= IORESOURCE_IRQ,
	},
};

static u64 ide_dma_mask = DMA_BIT_MASK(32);

static struct platform_device ide_device = {
	.name           = "palm_bk3710",
	.id             = -1,
	.resource       = ide_resources,
	.num_resources  = ARRAY_SIZE(ide_resources),
	.dev = {
		.dma_mask		= &ide_dma_mask,
		.coherent_dma_mask      = DMA_BIT_MASK(32),
	},
};

void __init davinci_init_ide(void)
{
	if (cpu_is_davinci_dm644x()) {
		davinci_cfg_reg(DM644X_HPIEN_DISABLE);
		davinci_cfg_reg(DM644X_ATAEN);
		davinci_cfg_reg(DM644X_HDIREN);
	} else if (cpu_is_davinci_dm646x()) {
		/* IRQ_DM646X_IDE is the same as IRQ_IDE */
		davinci_cfg_reg(DM646X_ATAEN);
	} else {
		WARN_ON(1);
		return;
	}

	platform_device_register(&ide_device);
}

#if IS_ENABLED(CONFIG_MMC_DAVINCI)

static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd0_resources[] = {
	{
		/* different on dm355 */
		.start = DAVINCI_MMCSD0_BASE,
		.end   = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_MMCINT,
		.flags = IORESOURCE_IRQ,
	}, {
		/* different on dm355 */
		.start = IRQ_SDIOINT,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_mmcsd0_device = {
	.name = "dm6441-mmc",
	.id = 0,
	.dev = {
		.dma_mask = &mmcsd0_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	.resource = mmcsd0_resources,
};

static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd1_resources[] = {
	{
		.start = DM355_MMCSD1_BASE,
		.end   = DM355_MMCSD1_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_DM355_MMCINT1,
		.flags = IORESOURCE_IRQ,
	}, {
		.start = IRQ_DM355_SDIOINT1,
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_mmcsd1_device = {
	.name = "dm6441-mmc",
	.id = 1,
	.dev = {
		.dma_mask = &mmcsd1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	.resource = mmcsd1_resources,
};


void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
	struct platform_device	*pdev = NULL;

	if (WARN_ON(cpu_is_davinci_dm646x()))
		return;

	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	 *
	 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	 * not handled right here ...
	 */
	switch (module) {
	case 1:
		if (cpu_is_davinci_dm355()) {
			/* REVISIT we may not need all these pins if e.g. this
			 * is a hard-wired SDIO device...
			 */
			davinci_cfg_reg(DM355_SD1_CMD);
			davinci_cfg_reg(DM355_SD1_CLK);
			davinci_cfg_reg(DM355_SD1_DATA0);
			davinci_cfg_reg(DM355_SD1_DATA1);
			davinci_cfg_reg(DM355_SD1_DATA2);
			davinci_cfg_reg(DM355_SD1_DATA3);
		} else if (cpu_is_davinci_dm365()) {
			/* Configure pull down control */
			unsigned v;

			v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
			__raw_writel(v & ~0xfc0,
					DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));

			mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
			mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
							SZ_4K - 1;
			mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
			davinci_mmcsd1_device.name = "da830-mmc";
		} else
			break;

		pdev = &davinci_mmcsd1_device;
		break;
	case 0:
		if (cpu_is_davinci_dm355()) {
			mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;

			/* expose all 6 MMC0 signals:  CLK, CMD, DATA[0..3] */
			davinci_cfg_reg(DM355_MMCSD0);

			/* enable RX EDMA */
			davinci_cfg_reg(DM355_EVT26_MMC0_RX);
		} else if (cpu_is_davinci_dm365()) {
			mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
							SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
			davinci_mmcsd0_device.name = "da830-mmc";
		} else if (cpu_is_davinci_dm644x()) {
			/* REVISIT: should this be in board-init code? */
			/* Power-on 3.3V IO cells */
			__raw_writel(0,
				DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
			/*Set up the pull regiter for MMC */
			davinci_cfg_reg(DM644X_MSTK);
		}

		pdev = &davinci_mmcsd0_device;
		break;
	}

	if (WARN_ON(!pdev))
		return;

	pdev->dev.platform_data = config;
	platform_device_register(pdev);
}

#else

void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
}

#endif

/*-------------------------------------------------------------------------*/

static struct resource wdt_resources[] = {
	{
		.start	= DAVINCI_WDOG_BASE,
		.end	= DAVINCI_WDOG_BASE + SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device davinci_wdt_device = {
	.name		= "davinci-wdt",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

void davinci_restart(enum reboot_mode mode, const char *cmd)
{
	davinci_watchdog_reset(&davinci_wdt_device);
}

int davinci_init_wdt(void)
{
	return platform_device_register(&davinci_wdt_device);
}

static struct platform_device davinci_gpio_device = {
	.name	= "davinci_gpio",
	.id	= -1,
};

int davinci_gpio_register(struct resource *res, int size, void *pdata)
{
	davinci_gpio_device.resource = res;
	davinci_gpio_device.num_resources = size;
	davinci_gpio_device.dev.platform_data = pdata;
	return platform_device_register(&davinci_gpio_device);
}

/*-------------------------------------------------------------------------*/

/*-------------------------------------------------------------------------*/

struct davinci_timer_instance davinci_timer_instance[2] = {
	{
		.base		= DAVINCI_TIMER0_BASE,
		.bottom_irq	= IRQ_TINT0_TINT12,
		.top_irq	= IRQ_TINT0_TINT34,
	},
	{
		.base		= DAVINCI_TIMER1_BASE,
		.bottom_irq	= IRQ_TINT1_TINT12,
		.top_irq	= IRQ_TINT1_TINT34,
	},
};
Commit	Line	Data
d395e6ad KS	1	/*
	2	* mach-davinci/devices.c
	3	*
	4	* DaVinci platform device setup/initialization
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
d395e6ad KS	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/dma-mapping.h>
	15	#include <linux/io.h>
7b6d864b	16	#include <linux/reboot.h>
d395e6ad	17
d395e6ad	18	#include <mach/hardware.h>
ec2a0833	19	#include <linux/platform_data/i2c-davinci.h>
80b02c17	20	#include <mach/irqs.h>
5526b3f7 KH	21	#include <mach/cputype.h>
5526b3f7 KH	22	#include <mach/mux.h>
ec2a0833	23	#include <linux/platform_data/mmc-davinci.h>
f64691b3	24	#include <mach/time.h>
3ad7a42d MP	25	#include <linux/platform_data/edma.h>
3ad7a42d MP	26
d395e6ad	27
5cfb19ac	28	#include "davinci.h"
28552c2e KH	29	#include "clock.h"
28552c2e KH	30
f5c122da	31	#define DAVINCI_I2C_BASE 0x01C21000
7a9978a1	32	#define DAVINCI_ATA_BASE 0x01C66000
2dbf56ae KH	33	#define DAVINCI_MMCSD0_BASE 0x01E10000
	34	#define DM355_MMCSD0_BASE 0x01E11000
	35	#define DM355_MMCSD1_BASE 0x01E00000
19ff3bf2 SP	36	#define DM365_MMCSD0_BASE 0x01D11000
19ff3bf2 SP	37	#define DM365_MMCSD1_BASE 0x01D00000
f5c122da	38
3ad7a42d MP	39	#define DAVINCI_DMA_MMCRXEVT 26
	40	#define DAVINCI_DMA_MMCTXEVT 27
	41
5cfb19ac MH	42	void __iomem *davinci_sysmod_base;
	43
	44	void davinci_map_sysmod(void)
	45	{
	46	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
	47	0x800);
	48	/*
	49	* Throw a bug since a lot of board initialization code depends
	50	* on system module availability. ioremap() failing this early
	51	* need careful looking into anyway.
	52	*/
	53	BUG_ON(!davinci_sysmod_base);
	54	}
1a717c00	55
d395e6ad KS	56	static struct resource i2c_resources[] = {
	57	{
	58	.start = DAVINCI_I2C_BASE,
	59	.end = DAVINCI_I2C_BASE + 0x40,
	60	.flags = IORESOURCE_MEM,
	61	},
	62	{
	63	.start = IRQ_I2C,
	64	.flags = IORESOURCE_IRQ,
	65	},
	66	};
	67
	68	static struct platform_device davinci_i2c_device = {
	69	.name = "i2c_davinci",
	70	.id = 1,
	71	.num_resources = ARRAY_SIZE(i2c_resources),
	72	.resource = i2c_resources,
	73	};
	74
	75	void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
	76	{
5526b3f7 KH	77	if (cpu_is_davinci_dm644x())
	78	davinci_cfg_reg(DM644X_I2C);
	79
d395e6ad KS	80	davinci_i2c_device.dev.platform_data = pdata;
	81	(void) platform_device_register(&davinci_i2c_device);
	82	}
	83
7a9978a1 SS	84	static struct resource ide_resources[] = {
	85	{
	86	.start = DAVINCI_ATA_BASE,
	87	.end = DAVINCI_ATA_BASE + 0x7ff,
	88	.flags = IORESOURCE_MEM,
	89	},
	90	{
	91	.start = IRQ_IDE,
	92	.end = IRQ_IDE,
	93	.flags = IORESOURCE_IRQ,
	94	},
	95	};
	96
	97	static u64 ide_dma_mask = DMA_BIT_MASK(32);
	98
	99	static struct platform_device ide_device = {
	100	.name = "palm_bk3710",
	101	.id = -1,
	102	.resource = ide_resources,
	103	.num_resources = ARRAY_SIZE(ide_resources),
	104	.dev = {
	105	.dma_mask = &ide_dma_mask,
	106	.coherent_dma_mask = DMA_BIT_MASK(32),
	107	},
	108	};
	109
	110	void __init davinci_init_ide(void)
	111	{
	112	if (cpu_is_davinci_dm644x()) {
	113	davinci_cfg_reg(DM644X_HPIEN_DISABLE);
	114	davinci_cfg_reg(DM644X_ATAEN);
	115	davinci_cfg_reg(DM644X_HDIREN);
	116	} else if (cpu_is_davinci_dm646x()) {
	117	/* IRQ_DM646X_IDE is the same as IRQ_IDE */
	118	davinci_cfg_reg(DM646X_ATAEN);
	119	} else {
	120	WARN_ON(1);
	121	return;
	122	}
	123
	124	platform_device_register(&ide_device);
	125	}
	126
a0a56db9	127	#if IS_ENABLED(CONFIG_MMC_DAVINCI)
2dbf56ae	128
b0958aed	129	static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	130
	131	static struct resource mmcsd0_resources[] = {
	132	{
	133	/* different on dm355 */
	134	.start = DAVINCI_MMCSD0_BASE,
	135	.end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
	136	.flags = IORESOURCE_MEM,
	137	},
	138	/* IRQs: MMC/SD, then SDIO */
	139	{
	140	.start = IRQ_MMCINT,
	141	.flags = IORESOURCE_IRQ,
	142	}, {
	143	/* different on dm355 */
	144	.start = IRQ_SDIOINT,
	145	.flags = IORESOURCE_IRQ,
	146	},
2dbf56ae KH	147	};
	148
	149	static struct platform_device davinci_mmcsd0_device = {
d7ca4c75	150	.name = "dm6441-mmc",
2dbf56ae KH	151	.id = 0,
	152	.dev = {
	153	.dma_mask = &mmcsd0_dma_mask,
b0958aed	154	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	155	},
	156	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	157	.resource = mmcsd0_resources,
	158	};
	159
b0958aed	160	static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	161
	162	static struct resource mmcsd1_resources[] = {
	163	{
	164	.start = DM355_MMCSD1_BASE,
	165	.end = DM355_MMCSD1_BASE + SZ_4K - 1,
	166	.flags = IORESOURCE_MEM,
	167	},
	168	/* IRQs: MMC/SD, then SDIO */
	169	{
	170	.start = IRQ_DM355_MMCINT1,
	171	.flags = IORESOURCE_IRQ,
	172	}, {
	173	.start = IRQ_DM355_SDIOINT1,
	174	.flags = IORESOURCE_IRQ,
	175	},
2dbf56ae KH	176	};
	177
	178	static struct platform_device davinci_mmcsd1_device = {
d7ca4c75	179	.name = "dm6441-mmc",
2dbf56ae KH	180	.id = 1,
	181	.dev = {
	182	.dma_mask = &mmcsd1_dma_mask,
b0958aed	183	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	184	},
	185	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	186	.resource = mmcsd1_resources,
	187	};
	188
	189
	190	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	191	{
	192	struct platform_device *pdev = NULL;
	193
	194	if (WARN_ON(cpu_is_davinci_dm646x()))
	195	return;
	196
	197	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	198	* for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	199	*
	200	* FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	201	* not handled right here ...
	202	*/
	203	switch (module) {
	204	case 1:
19ff3bf2 SP	205	if (cpu_is_davinci_dm355()) {
	206	/* REVISIT we may not need all these pins if e.g. this
	207	* is a hard-wired SDIO device...
	208	*/
	209	davinci_cfg_reg(DM355_SD1_CMD);
	210	davinci_cfg_reg(DM355_SD1_CLK);
	211	davinci_cfg_reg(DM355_SD1_DATA0);
	212	davinci_cfg_reg(DM355_SD1_DATA1);
	213	davinci_cfg_reg(DM355_SD1_DATA2);
	214	davinci_cfg_reg(DM355_SD1_DATA3);
	215	} else if (cpu_is_davinci_dm365()) {
19ff3bf2	216	/* Configure pull down control */
5cfb19ac MH	217	unsigned v;
	218
	219	v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
	220	__raw_writel(v & ~0xfc0,
	221	DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
19ff3bf2 SP	222
	223	mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
	224	mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
	225	SZ_4K - 1;
eb5ba378	226	mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
d7ca4c75	227	davinci_mmcsd1_device.name = "da830-mmc";
19ff3bf2	228	} else
2dbf56ae KH	229	break;
2dbf56ae KH	230
2dbf56ae KH	231	pdev = &davinci_mmcsd1_device;
	232	break;
	233	case 0:
	234	if (cpu_is_davinci_dm355()) {
	235	mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
	236	mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
	237	mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
	238
	239	/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
	240	davinci_cfg_reg(DM355_MMCSD0);
	241
	242	/* enable RX EDMA */
	243	davinci_cfg_reg(DM355_EVT26_MMC0_RX);
19ff3bf2 SP	244	} else if (cpu_is_davinci_dm365()) {
	245	mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
	246	mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
	247	SZ_4K - 1;
	248	mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
d7ca4c75	249	davinci_mmcsd0_device.name = "da830-mmc";
19ff3bf2	250	} else if (cpu_is_davinci_dm644x()) {
2dbf56ae	251	/* REVISIT: should this be in board-init code? */
2dbf56ae	252	/* Power-on 3.3V IO cells */
5cfb19ac MH	253	__raw_writel(0,
5cfb19ac MH	254	DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
2dbf56ae KH	255	/Set up the pull regiter for MMC /
	256	davinci_cfg_reg(DM644X_MSTK);
	257	}
	258
	259	pdev = &davinci_mmcsd0_device;
	260	break;
	261	}
	262
	263	if (WARN_ON(!pdev))
	264	return;
	265
	266	pdev->dev.platform_data = config;
	267	platform_device_register(pdev);
	268	}
	269
	270	#else
	271
	272	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	273	{
	274	}
	275
	276	#endif
	277
fb631387 KH	278	/-------------------------------------------------------------------------/
	279
	280	static struct resource wdt_resources[] = {
	281	{
5fcd294d KH	282	.start = DAVINCI_WDOG_BASE,
5fcd294d KH	283	.end = DAVINCI_WDOG_BASE + SZ_1K - 1,
fb631387 KH	284	.flags = IORESOURCE_MEM,
	285	},
	286	};
	287
	288	struct platform_device davinci_wdt_device = {
84374812	289	.name = "davinci-wdt",
fb631387 KH	290	.id = -1,
	291	.num_resources = ARRAY_SIZE(wdt_resources),
	292	.resource = wdt_resources,
	293	};
	294
7b6d864b	295	void davinci_restart(enum reboot_mode mode, const char *cmd)
c6121ddd SN	296	{
	297	davinci_watchdog_reset(&davinci_wdt_device);
	298	}
	299
1233090c	300	int davinci_init_wdt(void)
fb631387	301	{
1233090c	302	return platform_device_register(&davinci_wdt_device);
fb631387 KH	303	}
fb631387 KH	304
9cc1515c PA	305	static struct platform_device davinci_gpio_device = {
	306	.name = "davinci_gpio",
	307	.id = -1,
	308	};
	309
	310	int davinci_gpio_register(struct resource res, int size, void pdata)
	311	{
	312	davinci_gpio_device.resource = res;
	313	davinci_gpio_device.num_resources = size;
	314	davinci_gpio_device.dev.platform_data = pdata;
	315	return platform_device_register(&davinci_gpio_device);
	316	}
	317
fb631387 KH	318	/-------------------------------------------------------------------------/
fb631387 KH	319
f0fba2ad LG	320	/-------------------------------------------------------------------------/
f0fba2ad LG	321
f64691b3 MG	322	struct davinci_timer_instance davinci_timer_instance[2] = {
f64691b3 MG	323	{
1bcd38ad	324	.base = DAVINCI_TIMER0_BASE,
f64691b3 MG	325	.bottom_irq = IRQ_TINT0_TINT12,
	326	.top_irq = IRQ_TINT0_TINT34,
	327	},
	328	{
1bcd38ad	329	.base = DAVINCI_TIMER1_BASE,
f64691b3 MG	330	.bottom_irq = IRQ_TINT1_TINT12,
	331	.top_irq = IRQ_TINT1_TINT34,
	332	},
	333	};
	334