[deliverable/linux.git] / arch / arm / mach-davinci / devices.c

/*
 * mach-davinci/devices.c
 *
 * DaVinci platform device setup/initialization
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <linux/platform_data/i2c-davinci.h>
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
#include <linux/platform_data/edma.h>


#include "davinci.h"
#include "clock.h"

#define DAVINCI_I2C_BASE	     0x01C21000
#define DAVINCI_ATA_BASE	     0x01C66000
#define DAVINCI_MMCSD0_BASE	     0x01E10000
#define DM355_MMCSD0_BASE	     0x01E11000
#define DM355_MMCSD1_BASE	     0x01E00000
#define DM365_MMCSD0_BASE	     0x01D11000
#define DM365_MMCSD1_BASE	     0x01D00000

#define DAVINCI_DMA_MMCRXEVT	26
#define DAVINCI_DMA_MMCTXEVT	27

void __iomem  *davinci_sysmod_base;

void davinci_map_sysmod(void)
{
	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
					      0x800);
	/*
	 * Throw a bug since a lot of board initialization code depends
	 * on system module availability. ioremap() failing this early
	 * need careful looking into anyway.
	 */
	BUG_ON(!davinci_sysmod_base);
}

static struct resource i2c_resources[] = {
	{
		.start		= DAVINCI_I2C_BASE,
		.end		= DAVINCI_I2C_BASE + 0x40,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_I2C,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_i2c_device = {
	.name           = "i2c_davinci",
	.id             = 1,
	.num_resources	= ARRAY_SIZE(i2c_resources),
	.resource	= i2c_resources,
};

void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
{
	if (cpu_is_davinci_dm644x())
		davinci_cfg_reg(DM644X_I2C);

	davinci_i2c_device.dev.platform_data = pdata;
	(void) platform_device_register(&davinci_i2c_device);
}

static struct resource ide_resources[] = {
	{
		.start		= DAVINCI_ATA_BASE,
		.end		= DAVINCI_ATA_BASE + 0x7ff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_IDE,
		.end		= IRQ_IDE,
		.flags		= IORESOURCE_IRQ,
	},
};

static u64 ide_dma_mask = DMA_BIT_MASK(32);

static struct platform_device ide_device = {
	.name           = "palm_bk3710",
	.id             = -1,
	.resource       = ide_resources,
	.num_resources  = ARRAY_SIZE(ide_resources),
	.dev = {
		.dma_mask		= &ide_dma_mask,
		.coherent_dma_mask      = DMA_BIT_MASK(32),
	},
};

void __init davinci_init_ide(void)
{
	if (cpu_is_davinci_dm644x()) {
		davinci_cfg_reg(DM644X_HPIEN_DISABLE);
		davinci_cfg_reg(DM644X_ATAEN);
		davinci_cfg_reg(DM644X_HDIREN);
	} else if (cpu_is_davinci_dm646x()) {
		/* IRQ_DM646X_IDE is the same as IRQ_IDE */
		davinci_cfg_reg(DM646X_ATAEN);
	} else {
		WARN_ON(1);
		return;
	}

	platform_device_register(&ide_device);
}

#if IS_ENABLED(CONFIG_MMC_DAVINCI)

static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd0_resources[] = {
	{
		/* different on dm355 */
		.start = DAVINCI_MMCSD0_BASE,
		.end   = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_MMCINT,
		.flags = IORESOURCE_IRQ,
	}, {
		/* different on dm355 */
		.start = IRQ_SDIOINT,
		.flags = IORESOURCE_IRQ,
	},
	/* DMA channels: RX, then TX */
	{
		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
		.flags = IORESOURCE_DMA,
	}, {
		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device davinci_mmcsd0_device = {
	.name = "dm6441-mmc",
	.id = 0,
	.dev = {
		.dma_mask = &mmcsd0_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	.resource = mmcsd0_resources,
};

static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd1_resources[] = {
	{
		.start = DM355_MMCSD1_BASE,
		.end   = DM355_MMCSD1_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_DM355_MMCINT1,
		.flags = IORESOURCE_IRQ,
	}, {
		.start = IRQ_DM355_SDIOINT1,
		.flags = IORESOURCE_IRQ,
	},
	/* DMA channels: RX, then TX */
	{
		.start = EDMA_CTLR_CHAN(0, 30),	/* rx */
		.flags = IORESOURCE_DMA,
	}, {
		.start = EDMA_CTLR_CHAN(0, 31),	/* tx */
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device davinci_mmcsd1_device = {
	.name = "dm6441-mmc",
	.id = 1,
	.dev = {
		.dma_mask = &mmcsd1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	.resource = mmcsd1_resources,
};


void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
	struct platform_device	*pdev = NULL;

	if (WARN_ON(cpu_is_davinci_dm646x()))
		return;

	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	 *
	 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	 * not handled right here ...
	 */
	switch (module) {
	case 1:
		if (cpu_is_davinci_dm355()) {
			/* REVISIT we may not need all these pins if e.g. this
			 * is a hard-wired SDIO device...
			 */
			davinci_cfg_reg(DM355_SD1_CMD);
			davinci_cfg_reg(DM355_SD1_CLK);
			davinci_cfg_reg(DM355_SD1_DATA0);
			davinci_cfg_reg(DM355_SD1_DATA1);
			davinci_cfg_reg(DM355_SD1_DATA2);
			davinci_cfg_reg(DM355_SD1_DATA3);
		} else if (cpu_is_davinci_dm365()) {
			/* Configure pull down control */
			unsigned v;

			v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
			__raw_writel(v & ~0xfc0,
					DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));

			mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
			mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
							SZ_4K - 1;
			mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
			davinci_mmcsd1_device.name = "da830-mmc";
		} else
			break;

		pdev = &davinci_mmcsd1_device;
		break;
	case 0:
		if (cpu_is_davinci_dm355()) {
			mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;

			/* expose all 6 MMC0 signals:  CLK, CMD, DATA[0..3] */
			davinci_cfg_reg(DM355_MMCSD0);

			/* enable RX EDMA */
			davinci_cfg_reg(DM355_EVT26_MMC0_RX);
		} else if (cpu_is_davinci_dm365()) {
			mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
							SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
			davinci_mmcsd0_device.name = "da830-mmc";
		} else if (cpu_is_davinci_dm644x()) {
			/* REVISIT: should this be in board-init code? */
			/* Power-on 3.3V IO cells */
			__raw_writel(0,
				DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
			/*Set up the pull regiter for MMC */
			davinci_cfg_reg(DM644X_MSTK);
		}

		pdev = &davinci_mmcsd0_device;
		break;
	}

	if (WARN_ON(!pdev))
		return;

	pdev->dev.platform_data = config;
	platform_device_register(pdev);
}

#else

void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
}

#endif

/*-------------------------------------------------------------------------*/

static struct resource wdt_resources[] = {
	{
		.start	= DAVINCI_WDOG_BASE,
		.end	= DAVINCI_WDOG_BASE + SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device davinci_wdt_device = {
	.name		= "watchdog",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

void davinci_restart(char mode, const char *cmd)
{
	davinci_watchdog_reset(&davinci_wdt_device);
}

static void davinci_init_wdt(void)
{
	platform_device_register(&davinci_wdt_device);
}

/*-------------------------------------------------------------------------*/

/*-------------------------------------------------------------------------*/

struct davinci_timer_instance davinci_timer_instance[2] = {
	{
		.base		= DAVINCI_TIMER0_BASE,
		.bottom_irq	= IRQ_TINT0_TINT12,
		.top_irq	= IRQ_TINT0_TINT34,
	},
	{
		.base		= DAVINCI_TIMER1_BASE,
		.bottom_irq	= IRQ_TINT1_TINT12,
		.top_irq	= IRQ_TINT1_TINT34,
	},
};

/*-------------------------------------------------------------------------*/

static int __init davinci_init_devices(void)
{
	/* please keep these calls, and their implementations above,
	 * in alphabetical order so they're easier to sort through.
	 */
	davinci_init_wdt();

	return 0;
}
arch_initcall(davinci_init_devices);
Commit	Line	Data
d395e6ad KS	1	/*
	2	* mach-davinci/devices.c
	3	*
	4	* DaVinci platform device setup/initialization
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
d395e6ad KS	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/dma-mapping.h>
	15	#include <linux/io.h>
	16
d395e6ad	17	#include <mach/hardware.h>
ec2a0833	18	#include <linux/platform_data/i2c-davinci.h>
80b02c17	19	#include <mach/irqs.h>
5526b3f7 KH	20	#include <mach/cputype.h>
5526b3f7 KH	21	#include <mach/mux.h>
ec2a0833	22	#include <linux/platform_data/mmc-davinci.h>
f64691b3	23	#include <mach/time.h>
3ad7a42d MP	24	#include <linux/platform_data/edma.h>
3ad7a42d MP	25
d395e6ad	26
5cfb19ac	27	#include "davinci.h"
28552c2e KH	28	#include "clock.h"
28552c2e KH	29
f5c122da	30	#define DAVINCI_I2C_BASE 0x01C21000
7a9978a1	31	#define DAVINCI_ATA_BASE 0x01C66000
2dbf56ae KH	32	#define DAVINCI_MMCSD0_BASE 0x01E10000
	33	#define DM355_MMCSD0_BASE 0x01E11000
	34	#define DM355_MMCSD1_BASE 0x01E00000
19ff3bf2 SP	35	#define DM365_MMCSD0_BASE 0x01D11000
19ff3bf2 SP	36	#define DM365_MMCSD1_BASE 0x01D00000
f5c122da	37
3ad7a42d MP	38	#define DAVINCI_DMA_MMCRXEVT 26
	39	#define DAVINCI_DMA_MMCTXEVT 27
	40
5cfb19ac MH	41	void __iomem *davinci_sysmod_base;
	42
	43	void davinci_map_sysmod(void)
	44	{
	45	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
	46	0x800);
	47	/*
	48	* Throw a bug since a lot of board initialization code depends
	49	* on system module availability. ioremap() failing this early
	50	* need careful looking into anyway.
	51	*/
	52	BUG_ON(!davinci_sysmod_base);
	53	}
1a717c00	54
d395e6ad KS	55	static struct resource i2c_resources[] = {
	56	{
	57	.start = DAVINCI_I2C_BASE,
	58	.end = DAVINCI_I2C_BASE + 0x40,
	59	.flags = IORESOURCE_MEM,
	60	},
	61	{
	62	.start = IRQ_I2C,
	63	.flags = IORESOURCE_IRQ,
	64	},
	65	};
	66
	67	static struct platform_device davinci_i2c_device = {
	68	.name = "i2c_davinci",
	69	.id = 1,
	70	.num_resources = ARRAY_SIZE(i2c_resources),
	71	.resource = i2c_resources,
	72	};
	73
	74	void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
	75	{
5526b3f7 KH	76	if (cpu_is_davinci_dm644x())
	77	davinci_cfg_reg(DM644X_I2C);
	78
d395e6ad KS	79	davinci_i2c_device.dev.platform_data = pdata;
	80	(void) platform_device_register(&davinci_i2c_device);
	81	}
	82
7a9978a1 SS	83	static struct resource ide_resources[] = {
	84	{
	85	.start = DAVINCI_ATA_BASE,
	86	.end = DAVINCI_ATA_BASE + 0x7ff,
	87	.flags = IORESOURCE_MEM,
	88	},
	89	{
	90	.start = IRQ_IDE,
	91	.end = IRQ_IDE,
	92	.flags = IORESOURCE_IRQ,
	93	},
	94	};
	95
	96	static u64 ide_dma_mask = DMA_BIT_MASK(32);
	97
	98	static struct platform_device ide_device = {
	99	.name = "palm_bk3710",
	100	.id = -1,
	101	.resource = ide_resources,
	102	.num_resources = ARRAY_SIZE(ide_resources),
	103	.dev = {
	104	.dma_mask = &ide_dma_mask,
	105	.coherent_dma_mask = DMA_BIT_MASK(32),
	106	},
	107	};
	108
	109	void __init davinci_init_ide(void)
	110	{
	111	if (cpu_is_davinci_dm644x()) {
	112	davinci_cfg_reg(DM644X_HPIEN_DISABLE);
	113	davinci_cfg_reg(DM644X_ATAEN);
	114	davinci_cfg_reg(DM644X_HDIREN);
	115	} else if (cpu_is_davinci_dm646x()) {
	116	/* IRQ_DM646X_IDE is the same as IRQ_IDE */
	117	davinci_cfg_reg(DM646X_ATAEN);
	118	} else {
	119	WARN_ON(1);
	120	return;
	121	}
	122
	123	platform_device_register(&ide_device);
	124	}
	125
a0a56db9	126	#if IS_ENABLED(CONFIG_MMC_DAVINCI)
2dbf56ae	127
b0958aed	128	static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	129
	130	static struct resource mmcsd0_resources[] = {
	131	{
	132	/* different on dm355 */
	133	.start = DAVINCI_MMCSD0_BASE,
	134	.end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
	135	.flags = IORESOURCE_MEM,
	136	},
	137	/* IRQs: MMC/SD, then SDIO */
	138	{
	139	.start = IRQ_MMCINT,
	140	.flags = IORESOURCE_IRQ,
	141	}, {
	142	/* different on dm355 */
	143	.start = IRQ_SDIOINT,
	144	.flags = IORESOURCE_IRQ,
	145	},
	146	/* DMA channels: RX, then TX */
	147	{
60902a2c	148	.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
2dbf56ae KH	149	.flags = IORESOURCE_DMA,
2dbf56ae KH	150	}, {
60902a2c	151	.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
2dbf56ae KH	152	.flags = IORESOURCE_DMA,
	153	},
	154	};
	155
	156	static struct platform_device davinci_mmcsd0_device = {
d7ca4c75	157	.name = "dm6441-mmc",
2dbf56ae KH	158	.id = 0,
	159	.dev = {
	160	.dma_mask = &mmcsd0_dma_mask,
b0958aed	161	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	162	},
	163	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	164	.resource = mmcsd0_resources,
	165	};
	166
b0958aed	167	static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	168
	169	static struct resource mmcsd1_resources[] = {
	170	{
	171	.start = DM355_MMCSD1_BASE,
	172	.end = DM355_MMCSD1_BASE + SZ_4K - 1,
	173	.flags = IORESOURCE_MEM,
	174	},
	175	/* IRQs: MMC/SD, then SDIO */
	176	{
	177	.start = IRQ_DM355_MMCINT1,
	178	.flags = IORESOURCE_IRQ,
	179	}, {
	180	.start = IRQ_DM355_SDIOINT1,
	181	.flags = IORESOURCE_IRQ,
	182	},
	183	/* DMA channels: RX, then TX */
	184	{
60902a2c	185	.start = EDMA_CTLR_CHAN(0, 30), /* rx */
2dbf56ae KH	186	.flags = IORESOURCE_DMA,
2dbf56ae KH	187	}, {
60902a2c	188	.start = EDMA_CTLR_CHAN(0, 31), /* tx */
2dbf56ae KH	189	.flags = IORESOURCE_DMA,
	190	},
	191	};
	192
	193	static struct platform_device davinci_mmcsd1_device = {
d7ca4c75	194	.name = "dm6441-mmc",
2dbf56ae KH	195	.id = 1,
	196	.dev = {
	197	.dma_mask = &mmcsd1_dma_mask,
b0958aed	198	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	199	},
	200	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	201	.resource = mmcsd1_resources,
	202	};
	203
	204
	205	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	206	{
	207	struct platform_device *pdev = NULL;
	208
	209	if (WARN_ON(cpu_is_davinci_dm646x()))
	210	return;
	211
	212	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	213	* for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	214	*
	215	* FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	216	* not handled right here ...
	217	*/
	218	switch (module) {
	219	case 1:
19ff3bf2 SP	220	if (cpu_is_davinci_dm355()) {
	221	/* REVISIT we may not need all these pins if e.g. this
	222	* is a hard-wired SDIO device...
	223	*/
	224	davinci_cfg_reg(DM355_SD1_CMD);
	225	davinci_cfg_reg(DM355_SD1_CLK);
	226	davinci_cfg_reg(DM355_SD1_DATA0);
	227	davinci_cfg_reg(DM355_SD1_DATA1);
	228	davinci_cfg_reg(DM355_SD1_DATA2);
	229	davinci_cfg_reg(DM355_SD1_DATA3);
	230	} else if (cpu_is_davinci_dm365()) {
19ff3bf2	231	/* Configure pull down control */
5cfb19ac MH	232	unsigned v;
	233
	234	v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
	235	__raw_writel(v & ~0xfc0,
	236	DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
19ff3bf2 SP	237
	238	mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
	239	mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
	240	SZ_4K - 1;
eb5ba378	241	mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
d7ca4c75	242	davinci_mmcsd1_device.name = "da830-mmc";
19ff3bf2	243	} else
2dbf56ae KH	244	break;
2dbf56ae KH	245
2dbf56ae KH	246	pdev = &davinci_mmcsd1_device;
	247	break;
	248	case 0:
	249	if (cpu_is_davinci_dm355()) {
	250	mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
	251	mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
	252	mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
	253
	254	/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
	255	davinci_cfg_reg(DM355_MMCSD0);
	256
	257	/* enable RX EDMA */
	258	davinci_cfg_reg(DM355_EVT26_MMC0_RX);
19ff3bf2 SP	259	} else if (cpu_is_davinci_dm365()) {
	260	mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
	261	mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
	262	SZ_4K - 1;
	263	mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
d7ca4c75	264	davinci_mmcsd0_device.name = "da830-mmc";
19ff3bf2	265	} else if (cpu_is_davinci_dm644x()) {
2dbf56ae	266	/* REVISIT: should this be in board-init code? */
2dbf56ae	267	/* Power-on 3.3V IO cells */
5cfb19ac MH	268	__raw_writel(0,
5cfb19ac MH	269	DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
2dbf56ae KH	270	/Set up the pull regiter for MMC /
	271	davinci_cfg_reg(DM644X_MSTK);
	272	}
	273
	274	pdev = &davinci_mmcsd0_device;
	275	break;
	276	}
	277
	278	if (WARN_ON(!pdev))
	279	return;
	280
	281	pdev->dev.platform_data = config;
	282	platform_device_register(pdev);
	283	}
	284
	285	#else
	286
	287	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	288	{
	289	}
	290
	291	#endif
	292
fb631387 KH	293	/-------------------------------------------------------------------------/
	294
	295	static struct resource wdt_resources[] = {
	296	{
5fcd294d KH	297	.start = DAVINCI_WDOG_BASE,
5fcd294d KH	298	.end = DAVINCI_WDOG_BASE + SZ_1K - 1,
fb631387 KH	299	.flags = IORESOURCE_MEM,
	300	},
	301	};
	302
	303	struct platform_device davinci_wdt_device = {
	304	.name = "watchdog",
	305	.id = -1,
	306	.num_resources = ARRAY_SIZE(wdt_resources),
	307	.resource = wdt_resources,
	308	};
	309
c6121ddd SN	310	void davinci_restart(char mode, const char *cmd)
	311	{
	312	davinci_watchdog_reset(&davinci_wdt_device);
	313	}
	314
fb631387 KH	315	static void davinci_init_wdt(void)
	316	{
	317	platform_device_register(&davinci_wdt_device);
	318	}
	319
	320	/-------------------------------------------------------------------------/
	321
f0fba2ad LG	322	/-------------------------------------------------------------------------/
f0fba2ad LG	323
f64691b3 MG	324	struct davinci_timer_instance davinci_timer_instance[2] = {
f64691b3 MG	325	{
1bcd38ad	326	.base = DAVINCI_TIMER0_BASE,
f64691b3 MG	327	.bottom_irq = IRQ_TINT0_TINT12,
	328	.top_irq = IRQ_TINT0_TINT34,
	329	},
	330	{
1bcd38ad	331	.base = DAVINCI_TIMER1_BASE,
f64691b3 MG	332	.bottom_irq = IRQ_TINT1_TINT12,
	333	.top_irq = IRQ_TINT1_TINT34,
	334	},
	335	};
	336
	337	/-------------------------------------------------------------------------/
	338
fb631387 KH	339	static int __init davinci_init_devices(void)
	340	{
	341	/* please keep these calls, and their implementations above,
	342	* in alphabetical order so they're easier to sort through.
	343	*/
	344	davinci_init_wdt();
	345
	346	return 0;
	347	}
	348	arch_initcall(davinci_init_devices);
	349