[deliverable/linux.git] / arch / arm / mach-davinci / devices.c

/*
 * mach-davinci/devices.c
 *
 * DaVinci platform device setup/initialization
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
#include <mach/edma.h>
#include <mach/mmc.h>
#include <mach/time.h>

#include "clock.h"

#define DAVINCI_I2C_BASE	     0x01C21000
#define DAVINCI_MMCSD0_BASE	     0x01E10000
#define DM355_MMCSD0_BASE	     0x01E11000
#define DM355_MMCSD1_BASE	     0x01E00000
#define DM365_MMCSD0_BASE	     0x01D11000
#define DM365_MMCSD1_BASE	     0x01D00000

static struct resource i2c_resources[] = {
	{
		.start		= DAVINCI_I2C_BASE,
		.end		= DAVINCI_I2C_BASE + 0x40,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_I2C,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_i2c_device = {
	.name           = "i2c_davinci",
	.id             = 1,
	.num_resources	= ARRAY_SIZE(i2c_resources),
	.resource	= i2c_resources,
};

void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
{
	if (cpu_is_davinci_dm644x())
		davinci_cfg_reg(DM644X_I2C);

	davinci_i2c_device.dev.platform_data = pdata;
	(void) platform_device_register(&davinci_i2c_device);
}

#if	defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)

static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd0_resources[] = {
	{
		/* different on dm355 */
		.start = DAVINCI_MMCSD0_BASE,
		.end   = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_MMCINT,
		.flags = IORESOURCE_IRQ,
	}, {
		/* different on dm355 */
		.start = IRQ_SDIOINT,
		.flags = IORESOURCE_IRQ,
	},
	/* DMA channels: RX, then TX */
	{
		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
		.flags = IORESOURCE_DMA,
	}, {
		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device davinci_mmcsd0_device = {
	.name = "davinci_mmc",
	.id = 0,
	.dev = {
		.dma_mask = &mmcsd0_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	.resource = mmcsd0_resources,
};

static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd1_resources[] = {
	{
		.start = DM355_MMCSD1_BASE,
		.end   = DM355_MMCSD1_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_DM355_MMCINT1,
		.flags = IORESOURCE_IRQ,
	}, {
		.start = IRQ_DM355_SDIOINT1,
		.flags = IORESOURCE_IRQ,
	},
	/* DMA channels: RX, then TX */
	{
		.start = EDMA_CTLR_CHAN(0, 30),	/* rx */
		.flags = IORESOURCE_DMA,
	}, {
		.start = EDMA_CTLR_CHAN(0, 31),	/* tx */
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device davinci_mmcsd1_device = {
	.name = "davinci_mmc",
	.id = 1,
	.dev = {
		.dma_mask = &mmcsd1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	.resource = mmcsd1_resources,
};


void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
	struct platform_device	*pdev = NULL;

	if (WARN_ON(cpu_is_davinci_dm646x()))
		return;

	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	 *
	 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	 * not handled right here ...
	 */
	switch (module) {
	case 1:
		if (cpu_is_davinci_dm355()) {
			/* REVISIT we may not need all these pins if e.g. this
			 * is a hard-wired SDIO device...
			 */
			davinci_cfg_reg(DM355_SD1_CMD);
			davinci_cfg_reg(DM355_SD1_CLK);
			davinci_cfg_reg(DM355_SD1_DATA0);
			davinci_cfg_reg(DM355_SD1_DATA1);
			davinci_cfg_reg(DM355_SD1_DATA2);
			davinci_cfg_reg(DM355_SD1_DATA3);
		} else if (cpu_is_davinci_dm365()) {
			void __iomem *pupdctl1 =
				IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);

			/* Configure pull down control */
			__raw_writel((__raw_readl(pupdctl1) & ~0x400),
					pupdctl1);

			mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
			mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
							SZ_4K - 1;
			mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
		} else
			break;

		pdev = &davinci_mmcsd1_device;
		break;
	case 0:
		if (cpu_is_davinci_dm355()) {
			mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;

			/* expose all 6 MMC0 signals:  CLK, CMD, DATA[0..3] */
			davinci_cfg_reg(DM355_MMCSD0);

			/* enable RX EDMA */
			davinci_cfg_reg(DM355_EVT26_MMC0_RX);
		} else if (cpu_is_davinci_dm365()) {
			mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
							SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
		} else if (cpu_is_davinci_dm644x()) {
			/* REVISIT: should this be in board-init code? */
			void __iomem *base =
				IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);

			/* Power-on 3.3V IO cells */
			__raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
			/*Set up the pull regiter for MMC */
			davinci_cfg_reg(DM644X_MSTK);
		}

		pdev = &davinci_mmcsd0_device;
		break;
	}

	if (WARN_ON(!pdev))
		return;

	pdev->dev.platform_data = config;
	platform_device_register(pdev);
}

#else

void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
}

#endif

/*-------------------------------------------------------------------------*/

static struct resource wdt_resources[] = {
	{
		.start	= DAVINCI_WDOG_BASE,
		.end	= DAVINCI_WDOG_BASE + SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device davinci_wdt_device = {
	.name		= "watchdog",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

static void davinci_init_wdt(void)
{
	platform_device_register(&davinci_wdt_device);
}

/*-------------------------------------------------------------------------*/

struct davinci_timer_instance davinci_timer_instance[2] = {
	{
		.base		= IO_ADDRESS(DAVINCI_TIMER0_BASE),
		.bottom_irq	= IRQ_TINT0_TINT12,
		.top_irq	= IRQ_TINT0_TINT34,
	},
	{
		.base		= IO_ADDRESS(DAVINCI_TIMER1_BASE),
		.bottom_irq	= IRQ_TINT1_TINT12,
		.top_irq	= IRQ_TINT1_TINT34,
	},
};

/*-------------------------------------------------------------------------*/

static int __init davinci_init_devices(void)
{
	/* please keep these calls, and their implementations above,
	 * in alphabetical order so they're easier to sort through.
	 */
	davinci_init_wdt();

	return 0;
}
arch_initcall(davinci_init_devices);
Commit	Line	Data
d395e6ad KS	1	/*
	2	* mach-davinci/devices.c
	3	*
	4	* DaVinci platform device setup/initialization
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
d395e6ad KS	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/dma-mapping.h>
	15	#include <linux/io.h>
	16
d395e6ad KS	17	#include <mach/hardware.h>
d395e6ad KS	18	#include <mach/i2c.h>
80b02c17	19	#include <mach/irqs.h>
5526b3f7 KH	20	#include <mach/cputype.h>
5526b3f7 KH	21	#include <mach/mux.h>
2dbf56ae KH	22	#include <mach/edma.h>
2dbf56ae KH	23	#include <mach/mmc.h>
f64691b3	24	#include <mach/time.h>
d395e6ad	25
28552c2e KH	26	#include "clock.h"
28552c2e KH	27
f5c122da	28	#define DAVINCI_I2C_BASE 0x01C21000
2dbf56ae KH	29	#define DAVINCI_MMCSD0_BASE 0x01E10000
	30	#define DM355_MMCSD0_BASE 0x01E11000
	31	#define DM355_MMCSD1_BASE 0x01E00000
19ff3bf2 SP	32	#define DM365_MMCSD0_BASE 0x01D11000
19ff3bf2 SP	33	#define DM365_MMCSD1_BASE 0x01D00000
f5c122da	34
d395e6ad KS	35	static struct resource i2c_resources[] = {
	36	{
	37	.start = DAVINCI_I2C_BASE,
	38	.end = DAVINCI_I2C_BASE + 0x40,
	39	.flags = IORESOURCE_MEM,
	40	},
	41	{
	42	.start = IRQ_I2C,
	43	.flags = IORESOURCE_IRQ,
	44	},
	45	};
	46
	47	static struct platform_device davinci_i2c_device = {
	48	.name = "i2c_davinci",
	49	.id = 1,
	50	.num_resources = ARRAY_SIZE(i2c_resources),
	51	.resource = i2c_resources,
	52	};
	53
	54	void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
	55	{
5526b3f7 KH	56	if (cpu_is_davinci_dm644x())
	57	davinci_cfg_reg(DM644X_I2C);
	58
d395e6ad KS	59	davinci_i2c_device.dev.platform_data = pdata;
	60	(void) platform_device_register(&davinci_i2c_device);
	61	}
	62
2dbf56ae KH	63	#if defined(CONFIG_MMC_DAVINCI) \|\| defined(CONFIG_MMC_DAVINCI_MODULE)
2dbf56ae KH	64
b0958aed	65	static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	66
	67	static struct resource mmcsd0_resources[] = {
	68	{
	69	/* different on dm355 */
	70	.start = DAVINCI_MMCSD0_BASE,
	71	.end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
	72	.flags = IORESOURCE_MEM,
	73	},
	74	/* IRQs: MMC/SD, then SDIO */
	75	{
	76	.start = IRQ_MMCINT,
	77	.flags = IORESOURCE_IRQ,
	78	}, {
	79	/* different on dm355 */
	80	.start = IRQ_SDIOINT,
	81	.flags = IORESOURCE_IRQ,
	82	},
	83	/* DMA channels: RX, then TX */
	84	{
60902a2c	85	.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
2dbf56ae KH	86	.flags = IORESOURCE_DMA,
2dbf56ae KH	87	}, {
60902a2c	88	.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
2dbf56ae KH	89	.flags = IORESOURCE_DMA,
	90	},
	91	};
	92
	93	static struct platform_device davinci_mmcsd0_device = {
	94	.name = "davinci_mmc",
	95	.id = 0,
	96	.dev = {
	97	.dma_mask = &mmcsd0_dma_mask,
b0958aed	98	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	99	},
	100	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	101	.resource = mmcsd0_resources,
	102	};
	103
b0958aed	104	static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	105
	106	static struct resource mmcsd1_resources[] = {
	107	{
	108	.start = DM355_MMCSD1_BASE,
	109	.end = DM355_MMCSD1_BASE + SZ_4K - 1,
	110	.flags = IORESOURCE_MEM,
	111	},
	112	/* IRQs: MMC/SD, then SDIO */
	113	{
	114	.start = IRQ_DM355_MMCINT1,
	115	.flags = IORESOURCE_IRQ,
	116	}, {
	117	.start = IRQ_DM355_SDIOINT1,
	118	.flags = IORESOURCE_IRQ,
	119	},
	120	/* DMA channels: RX, then TX */
	121	{
60902a2c	122	.start = EDMA_CTLR_CHAN(0, 30), /* rx */
2dbf56ae KH	123	.flags = IORESOURCE_DMA,
2dbf56ae KH	124	}, {
60902a2c	125	.start = EDMA_CTLR_CHAN(0, 31), /* tx */
2dbf56ae KH	126	.flags = IORESOURCE_DMA,
	127	},
	128	};
	129
	130	static struct platform_device davinci_mmcsd1_device = {
	131	.name = "davinci_mmc",
	132	.id = 1,
	133	.dev = {
	134	.dma_mask = &mmcsd1_dma_mask,
b0958aed	135	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	136	},
	137	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	138	.resource = mmcsd1_resources,
	139	};
	140
	141
	142	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	143	{
	144	struct platform_device *pdev = NULL;
	145
	146	if (WARN_ON(cpu_is_davinci_dm646x()))
	147	return;
	148
	149	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	150	* for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	151	*
	152	* FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	153	* not handled right here ...
	154	*/
	155	switch (module) {
	156	case 1:
19ff3bf2 SP	157	if (cpu_is_davinci_dm355()) {
	158	/* REVISIT we may not need all these pins if e.g. this
	159	* is a hard-wired SDIO device...
	160	*/
	161	davinci_cfg_reg(DM355_SD1_CMD);
	162	davinci_cfg_reg(DM355_SD1_CLK);
	163	davinci_cfg_reg(DM355_SD1_DATA0);
	164	davinci_cfg_reg(DM355_SD1_DATA1);
	165	davinci_cfg_reg(DM355_SD1_DATA2);
	166	davinci_cfg_reg(DM355_SD1_DATA3);
	167	} else if (cpu_is_davinci_dm365()) {
	168	void __iomem *pupdctl1 =
	169	IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
	170
	171	/* Configure pull down control */
	172	__raw_writel((__raw_readl(pupdctl1) & ~0x400),
	173	pupdctl1);
	174
	175	mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
	176	mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
	177	SZ_4K - 1;
eb5ba378	178	mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
19ff3bf2	179	} else
2dbf56ae KH	180	break;
2dbf56ae KH	181
2dbf56ae KH	182	pdev = &davinci_mmcsd1_device;
	183	break;
	184	case 0:
	185	if (cpu_is_davinci_dm355()) {
	186	mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
	187	mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
	188	mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
	189
	190	/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
	191	davinci_cfg_reg(DM355_MMCSD0);
	192
	193	/* enable RX EDMA */
	194	davinci_cfg_reg(DM355_EVT26_MMC0_RX);
19ff3bf2 SP	195	} else if (cpu_is_davinci_dm365()) {
	196	mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
	197	mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
	198	SZ_4K - 1;
	199	mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
	200	} else if (cpu_is_davinci_dm644x()) {
2dbf56ae KH	201	/* REVISIT: should this be in board-init code? */
	202	void __iomem *base =
	203	IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
	204
	205	/* Power-on 3.3V IO cells */
	206	__raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
	207	/Set up the pull regiter for MMC /
	208	davinci_cfg_reg(DM644X_MSTK);
	209	}
	210
	211	pdev = &davinci_mmcsd0_device;
	212	break;
	213	}
	214
	215	if (WARN_ON(!pdev))
	216	return;
	217
	218	pdev->dev.platform_data = config;
	219	platform_device_register(pdev);
	220	}
	221
	222	#else
	223
	224	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	225	{
	226	}
	227
	228	#endif
	229
fb631387 KH	230	/-------------------------------------------------------------------------/
	231
	232	static struct resource wdt_resources[] = {
	233	{
5fcd294d KH	234	.start = DAVINCI_WDOG_BASE,
5fcd294d KH	235	.end = DAVINCI_WDOG_BASE + SZ_1K - 1,
fb631387 KH	236	.flags = IORESOURCE_MEM,
	237	},
	238	};
	239
	240	struct platform_device davinci_wdt_device = {
	241	.name = "watchdog",
	242	.id = -1,
	243	.num_resources = ARRAY_SIZE(wdt_resources),
	244	.resource = wdt_resources,
	245	};
	246
	247	static void davinci_init_wdt(void)
	248	{
	249	platform_device_register(&davinci_wdt_device);
	250	}
	251
	252	/-------------------------------------------------------------------------/
	253
f64691b3 MG	254	struct davinci_timer_instance davinci_timer_instance[2] = {
	255	{
	256	.base = IO_ADDRESS(DAVINCI_TIMER0_BASE),
	257	.bottom_irq = IRQ_TINT0_TINT12,
	258	.top_irq = IRQ_TINT0_TINT34,
	259	},
	260	{
	261	.base = IO_ADDRESS(DAVINCI_TIMER1_BASE),
	262	.bottom_irq = IRQ_TINT1_TINT12,
	263	.top_irq = IRQ_TINT1_TINT34,
	264	},
	265	};
	266
	267	/-------------------------------------------------------------------------/
	268
fb631387 KH	269	static int __init davinci_init_devices(void)
	270	{
	271	/* please keep these calls, and their implementations above,
	272	* in alphabetical order so they're easier to sort through.
	273	*/
	274	davinci_init_wdt();
	275
	276	return 0;
	277	}
	278	arch_initcall(davinci_init_devices);
	279