[deliverable/linux.git] / arch / arm / mach-davinci / devices.c

/*
 * mach-davinci/devices.c
 *
 * DaVinci platform device setup/initialization
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
#include <mach/edma.h>
#include <mach/mmc.h>
#include <mach/time.h>

#include "davinci.h"
#include "clock.h"

#define DAVINCI_I2C_BASE	     0x01C21000
#define DAVINCI_ATA_BASE	     0x01C66000
#define DAVINCI_MMCSD0_BASE	     0x01E10000
#define DM355_MMCSD0_BASE	     0x01E11000
#define DM355_MMCSD1_BASE	     0x01E00000
#define DM365_MMCSD0_BASE	     0x01D11000
#define DM365_MMCSD1_BASE	     0x01D00000

void __iomem  *davinci_sysmod_base;

void davinci_map_sysmod(void)
{
	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
					      0x800);
	/*
	 * Throw a bug since a lot of board initialization code depends
	 * on system module availability. ioremap() failing this early
	 * need careful looking into anyway.
	 */
	BUG_ON(!davinci_sysmod_base);
}

static struct resource i2c_resources[] = {
	{
		.start		= DAVINCI_I2C_BASE,
		.end		= DAVINCI_I2C_BASE + 0x40,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_I2C,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_i2c_device = {
	.name           = "i2c_davinci",
	.id             = 1,
	.num_resources	= ARRAY_SIZE(i2c_resources),
	.resource	= i2c_resources,
};

void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
{
	if (cpu_is_davinci_dm644x())
		davinci_cfg_reg(DM644X_I2C);

	davinci_i2c_device.dev.platform_data = pdata;
	(void) platform_device_register(&davinci_i2c_device);
}

static struct resource ide_resources[] = {
	{
		.start		= DAVINCI_ATA_BASE,
		.end		= DAVINCI_ATA_BASE + 0x7ff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_IDE,
		.end		= IRQ_IDE,
		.flags		= IORESOURCE_IRQ,
	},
};

static u64 ide_dma_mask = DMA_BIT_MASK(32);

static struct platform_device ide_device = {
	.name           = "palm_bk3710",
	.id             = -1,
	.resource       = ide_resources,
	.num_resources  = ARRAY_SIZE(ide_resources),
	.dev = {
		.dma_mask		= &ide_dma_mask,
		.coherent_dma_mask      = DMA_BIT_MASK(32),
	},
};

void __init davinci_init_ide(void)
{
	if (cpu_is_davinci_dm644x()) {
		davinci_cfg_reg(DM644X_HPIEN_DISABLE);
		davinci_cfg_reg(DM644X_ATAEN);
		davinci_cfg_reg(DM644X_HDIREN);
	} else if (cpu_is_davinci_dm646x()) {
		/* IRQ_DM646X_IDE is the same as IRQ_IDE */
		davinci_cfg_reg(DM646X_ATAEN);
	} else {
		WARN_ON(1);
		return;
	}

	platform_device_register(&ide_device);
}

#if	defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)

static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd0_resources[] = {
	{
		/* different on dm355 */
		.start = DAVINCI_MMCSD0_BASE,
		.end   = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_MMCINT,
		.flags = IORESOURCE_IRQ,
	}, {
		/* different on dm355 */
		.start = IRQ_SDIOINT,
		.flags = IORESOURCE_IRQ,
	},
	/* DMA channels: RX, then TX */
	{
		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
		.flags = IORESOURCE_DMA,
	}, {
		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device davinci_mmcsd0_device = {
	.name = "davinci_mmc",
	.id = 0,
	.dev = {
		.dma_mask = &mmcsd0_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	.resource = mmcsd0_resources,
};

static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd1_resources[] = {
	{
		.start = DM355_MMCSD1_BASE,
		.end   = DM355_MMCSD1_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_DM355_MMCINT1,
		.flags = IORESOURCE_IRQ,
	}, {
		.start = IRQ_DM355_SDIOINT1,
		.flags = IORESOURCE_IRQ,
	},
	/* DMA channels: RX, then TX */
	{
		.start = EDMA_CTLR_CHAN(0, 30),	/* rx */
		.flags = IORESOURCE_DMA,
	}, {
		.start = EDMA_CTLR_CHAN(0, 31),	/* tx */
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device davinci_mmcsd1_device = {
	.name = "davinci_mmc",
	.id = 1,
	.dev = {
		.dma_mask = &mmcsd1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	.resource = mmcsd1_resources,
};


void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
	struct platform_device	*pdev = NULL;

	if (WARN_ON(cpu_is_davinci_dm646x()))
		return;

	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	 *
	 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	 * not handled right here ...
	 */
	switch (module) {
	case 1:
		if (cpu_is_davinci_dm355()) {
			/* REVISIT we may not need all these pins if e.g. this
			 * is a hard-wired SDIO device...
			 */
			davinci_cfg_reg(DM355_SD1_CMD);
			davinci_cfg_reg(DM355_SD1_CLK);
			davinci_cfg_reg(DM355_SD1_DATA0);
			davinci_cfg_reg(DM355_SD1_DATA1);
			davinci_cfg_reg(DM355_SD1_DATA2);
			davinci_cfg_reg(DM355_SD1_DATA3);
		} else if (cpu_is_davinci_dm365()) {
			/* Configure pull down control */
			unsigned v;

			v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
			__raw_writel(v & ~0xfc0,
					DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));

			mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
			mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
							SZ_4K - 1;
			mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
		} else
			break;

		pdev = &davinci_mmcsd1_device;
		break;
	case 0:
		if (cpu_is_davinci_dm355()) {
			mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;

			/* expose all 6 MMC0 signals:  CLK, CMD, DATA[0..3] */
			davinci_cfg_reg(DM355_MMCSD0);

			/* enable RX EDMA */
			davinci_cfg_reg(DM355_EVT26_MMC0_RX);
		} else if (cpu_is_davinci_dm365()) {
			mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
							SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
		} else if (cpu_is_davinci_dm644x()) {
			/* REVISIT: should this be in board-init code? */
			/* Power-on 3.3V IO cells */
			__raw_writel(0,
				DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
			/*Set up the pull regiter for MMC */
			davinci_cfg_reg(DM644X_MSTK);
		}

		pdev = &davinci_mmcsd0_device;
		break;
	}

	if (WARN_ON(!pdev))
		return;

	pdev->dev.platform_data = config;
	platform_device_register(pdev);
}

#else

void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
}

#endif

/*-------------------------------------------------------------------------*/

static struct resource wdt_resources[] = {
	{
		.start	= DAVINCI_WDOG_BASE,
		.end	= DAVINCI_WDOG_BASE + SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device davinci_wdt_device = {
	.name		= "watchdog",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

void davinci_restart(char mode, const char *cmd)
{
	davinci_watchdog_reset(&davinci_wdt_device);
}

static void davinci_init_wdt(void)
{
	platform_device_register(&davinci_wdt_device);
}

/*-------------------------------------------------------------------------*/

static struct platform_device davinci_pcm_device = {
	.name		= "davinci-pcm-audio",
	.id		= -1,
};

static void davinci_init_pcm(void)
{
	platform_device_register(&davinci_pcm_device);
}

/*-------------------------------------------------------------------------*/

struct davinci_timer_instance davinci_timer_instance[2] = {
	{
		.base		= DAVINCI_TIMER0_BASE,
		.bottom_irq	= IRQ_TINT0_TINT12,
		.top_irq	= IRQ_TINT0_TINT34,
	},
	{
		.base		= DAVINCI_TIMER1_BASE,
		.bottom_irq	= IRQ_TINT1_TINT12,
		.top_irq	= IRQ_TINT1_TINT34,
	},
};

/*-------------------------------------------------------------------------*/

static int __init davinci_init_devices(void)
{
	/* please keep these calls, and their implementations above,
	 * in alphabetical order so they're easier to sort through.
	 */
	davinci_init_pcm();
	davinci_init_wdt();

	return 0;
}
arch_initcall(davinci_init_devices);
Commit	Line	Data
d395e6ad KS	1	/*
	2	* mach-davinci/devices.c
	3	*
	4	* DaVinci platform device setup/initialization
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
d395e6ad KS	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/dma-mapping.h>
	15	#include <linux/io.h>
	16
d395e6ad KS	17	#include <mach/hardware.h>
d395e6ad KS	18	#include <mach/i2c.h>
80b02c17	19	#include <mach/irqs.h>
5526b3f7 KH	20	#include <mach/cputype.h>
5526b3f7 KH	21	#include <mach/mux.h>
2dbf56ae KH	22	#include <mach/edma.h>
2dbf56ae KH	23	#include <mach/mmc.h>
f64691b3	24	#include <mach/time.h>
d395e6ad	25
5cfb19ac	26	#include "davinci.h"
28552c2e KH	27	#include "clock.h"
28552c2e KH	28
f5c122da	29	#define DAVINCI_I2C_BASE 0x01C21000
7a9978a1	30	#define DAVINCI_ATA_BASE 0x01C66000
2dbf56ae KH	31	#define DAVINCI_MMCSD0_BASE 0x01E10000
	32	#define DM355_MMCSD0_BASE 0x01E11000
	33	#define DM355_MMCSD1_BASE 0x01E00000
19ff3bf2 SP	34	#define DM365_MMCSD0_BASE 0x01D11000
19ff3bf2 SP	35	#define DM365_MMCSD1_BASE 0x01D00000
f5c122da	36
5cfb19ac MH	37	void __iomem *davinci_sysmod_base;
	38
	39	void davinci_map_sysmod(void)
	40	{
	41	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
	42	0x800);
	43	/*
	44	* Throw a bug since a lot of board initialization code depends
	45	* on system module availability. ioremap() failing this early
	46	* need careful looking into anyway.
	47	*/
	48	BUG_ON(!davinci_sysmod_base);
	49	}
1a717c00	50
d395e6ad KS	51	static struct resource i2c_resources[] = {
	52	{
	53	.start = DAVINCI_I2C_BASE,
	54	.end = DAVINCI_I2C_BASE + 0x40,
	55	.flags = IORESOURCE_MEM,
	56	},
	57	{
	58	.start = IRQ_I2C,
	59	.flags = IORESOURCE_IRQ,
	60	},
	61	};
	62
	63	static struct platform_device davinci_i2c_device = {
	64	.name = "i2c_davinci",
	65	.id = 1,
	66	.num_resources = ARRAY_SIZE(i2c_resources),
	67	.resource = i2c_resources,
	68	};
	69
	70	void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
	71	{
5526b3f7 KH	72	if (cpu_is_davinci_dm644x())
	73	davinci_cfg_reg(DM644X_I2C);
	74
d395e6ad KS	75	davinci_i2c_device.dev.platform_data = pdata;
	76	(void) platform_device_register(&davinci_i2c_device);
	77	}
	78
7a9978a1 SS	79	static struct resource ide_resources[] = {
	80	{
	81	.start = DAVINCI_ATA_BASE,
	82	.end = DAVINCI_ATA_BASE + 0x7ff,
	83	.flags = IORESOURCE_MEM,
	84	},
	85	{
	86	.start = IRQ_IDE,
	87	.end = IRQ_IDE,
	88	.flags = IORESOURCE_IRQ,
	89	},
	90	};
	91
	92	static u64 ide_dma_mask = DMA_BIT_MASK(32);
	93
	94	static struct platform_device ide_device = {
	95	.name = "palm_bk3710",
	96	.id = -1,
	97	.resource = ide_resources,
	98	.num_resources = ARRAY_SIZE(ide_resources),
	99	.dev = {
	100	.dma_mask = &ide_dma_mask,
	101	.coherent_dma_mask = DMA_BIT_MASK(32),
	102	},
	103	};
	104
	105	void __init davinci_init_ide(void)
	106	{
	107	if (cpu_is_davinci_dm644x()) {
	108	davinci_cfg_reg(DM644X_HPIEN_DISABLE);
	109	davinci_cfg_reg(DM644X_ATAEN);
	110	davinci_cfg_reg(DM644X_HDIREN);
	111	} else if (cpu_is_davinci_dm646x()) {
	112	/* IRQ_DM646X_IDE is the same as IRQ_IDE */
	113	davinci_cfg_reg(DM646X_ATAEN);
	114	} else {
	115	WARN_ON(1);
	116	return;
	117	}
	118
	119	platform_device_register(&ide_device);
	120	}
	121
2dbf56ae KH	122	#if defined(CONFIG_MMC_DAVINCI) \|\| defined(CONFIG_MMC_DAVINCI_MODULE)
2dbf56ae KH	123
b0958aed	124	static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	125
	126	static struct resource mmcsd0_resources[] = {
	127	{
	128	/* different on dm355 */
	129	.start = DAVINCI_MMCSD0_BASE,
	130	.end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
	131	.flags = IORESOURCE_MEM,
	132	},
	133	/* IRQs: MMC/SD, then SDIO */
	134	{
	135	.start = IRQ_MMCINT,
	136	.flags = IORESOURCE_IRQ,
	137	}, {
	138	/* different on dm355 */
	139	.start = IRQ_SDIOINT,
	140	.flags = IORESOURCE_IRQ,
	141	},
	142	/* DMA channels: RX, then TX */
	143	{
60902a2c	144	.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
2dbf56ae KH	145	.flags = IORESOURCE_DMA,
2dbf56ae KH	146	}, {
60902a2c	147	.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
2dbf56ae KH	148	.flags = IORESOURCE_DMA,
	149	},
	150	};
	151
	152	static struct platform_device davinci_mmcsd0_device = {
	153	.name = "davinci_mmc",
	154	.id = 0,
	155	.dev = {
	156	.dma_mask = &mmcsd0_dma_mask,
b0958aed	157	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	158	},
	159	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	160	.resource = mmcsd0_resources,
	161	};
	162
b0958aed	163	static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	164
	165	static struct resource mmcsd1_resources[] = {
	166	{
	167	.start = DM355_MMCSD1_BASE,
	168	.end = DM355_MMCSD1_BASE + SZ_4K - 1,
	169	.flags = IORESOURCE_MEM,
	170	},
	171	/* IRQs: MMC/SD, then SDIO */
	172	{
	173	.start = IRQ_DM355_MMCINT1,
	174	.flags = IORESOURCE_IRQ,
	175	}, {
	176	.start = IRQ_DM355_SDIOINT1,
	177	.flags = IORESOURCE_IRQ,
	178	},
	179	/* DMA channels: RX, then TX */
	180	{
60902a2c	181	.start = EDMA_CTLR_CHAN(0, 30), /* rx */
2dbf56ae KH	182	.flags = IORESOURCE_DMA,
2dbf56ae KH	183	}, {
60902a2c	184	.start = EDMA_CTLR_CHAN(0, 31), /* tx */
2dbf56ae KH	185	.flags = IORESOURCE_DMA,
	186	},
	187	};
	188
	189	static struct platform_device davinci_mmcsd1_device = {
	190	.name = "davinci_mmc",
	191	.id = 1,
	192	.dev = {
	193	.dma_mask = &mmcsd1_dma_mask,
b0958aed	194	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	195	},
	196	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	197	.resource = mmcsd1_resources,
	198	};
	199
	200
	201	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	202	{
	203	struct platform_device *pdev = NULL;
	204
	205	if (WARN_ON(cpu_is_davinci_dm646x()))
	206	return;
	207
	208	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	209	* for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	210	*
	211	* FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	212	* not handled right here ...
	213	*/
	214	switch (module) {
	215	case 1:
19ff3bf2 SP	216	if (cpu_is_davinci_dm355()) {
	217	/* REVISIT we may not need all these pins if e.g. this
	218	* is a hard-wired SDIO device...
	219	*/
	220	davinci_cfg_reg(DM355_SD1_CMD);
	221	davinci_cfg_reg(DM355_SD1_CLK);
	222	davinci_cfg_reg(DM355_SD1_DATA0);
	223	davinci_cfg_reg(DM355_SD1_DATA1);
	224	davinci_cfg_reg(DM355_SD1_DATA2);
	225	davinci_cfg_reg(DM355_SD1_DATA3);
	226	} else if (cpu_is_davinci_dm365()) {
19ff3bf2	227	/* Configure pull down control */
5cfb19ac MH	228	unsigned v;
	229
	230	v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
	231	__raw_writel(v & ~0xfc0,
	232	DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
19ff3bf2 SP	233
	234	mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
	235	mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
	236	SZ_4K - 1;
eb5ba378	237	mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
19ff3bf2	238	} else
2dbf56ae KH	239	break;
2dbf56ae KH	240
2dbf56ae KH	241	pdev = &davinci_mmcsd1_device;
	242	break;
	243	case 0:
	244	if (cpu_is_davinci_dm355()) {
	245	mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
	246	mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
	247	mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
	248
	249	/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
	250	davinci_cfg_reg(DM355_MMCSD0);
	251
	252	/* enable RX EDMA */
	253	davinci_cfg_reg(DM355_EVT26_MMC0_RX);
19ff3bf2 SP	254	} else if (cpu_is_davinci_dm365()) {
	255	mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
	256	mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
	257	SZ_4K - 1;
	258	mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
	259	} else if (cpu_is_davinci_dm644x()) {
2dbf56ae	260	/* REVISIT: should this be in board-init code? */
2dbf56ae	261	/* Power-on 3.3V IO cells */
5cfb19ac MH	262	__raw_writel(0,
5cfb19ac MH	263	DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
2dbf56ae KH	264	/Set up the pull regiter for MMC /
	265	davinci_cfg_reg(DM644X_MSTK);
	266	}
	267
	268	pdev = &davinci_mmcsd0_device;
	269	break;
	270	}
	271
	272	if (WARN_ON(!pdev))
	273	return;
	274
	275	pdev->dev.platform_data = config;
	276	platform_device_register(pdev);
	277	}
	278
	279	#else
	280
	281	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	282	{
	283	}
	284
	285	#endif
	286
fb631387 KH	287	/-------------------------------------------------------------------------/
	288
	289	static struct resource wdt_resources[] = {
	290	{
5fcd294d KH	291	.start = DAVINCI_WDOG_BASE,
5fcd294d KH	292	.end = DAVINCI_WDOG_BASE + SZ_1K - 1,
fb631387 KH	293	.flags = IORESOURCE_MEM,
	294	},
	295	};
	296
	297	struct platform_device davinci_wdt_device = {
	298	.name = "watchdog",
	299	.id = -1,
	300	.num_resources = ARRAY_SIZE(wdt_resources),
	301	.resource = wdt_resources,
	302	};
	303
c6121ddd SN	304	void davinci_restart(char mode, const char *cmd)
	305	{
	306	davinci_watchdog_reset(&davinci_wdt_device);
	307	}
	308
fb631387 KH	309	static void davinci_init_wdt(void)
	310	{
	311	platform_device_register(&davinci_wdt_device);
	312	}
	313
	314	/-------------------------------------------------------------------------/
	315
7e9f1945	316	static struct platform_device davinci_pcm_device = {
f0fba2ad LG	317	.name = "davinci-pcm-audio",
	318	.id = -1,
	319	};
	320
	321	static void davinci_init_pcm(void)
	322	{
	323	platform_device_register(&davinci_pcm_device);
	324	}
	325
	326	/-------------------------------------------------------------------------/
	327
f64691b3 MG	328	struct davinci_timer_instance davinci_timer_instance[2] = {
f64691b3 MG	329	{
1bcd38ad	330	.base = DAVINCI_TIMER0_BASE,
f64691b3 MG	331	.bottom_irq = IRQ_TINT0_TINT12,
	332	.top_irq = IRQ_TINT0_TINT34,
	333	},
	334	{
1bcd38ad	335	.base = DAVINCI_TIMER1_BASE,
f64691b3 MG	336	.bottom_irq = IRQ_TINT1_TINT12,
	337	.top_irq = IRQ_TINT1_TINT34,
	338	},
	339	};
	340
	341	/-------------------------------------------------------------------------/
	342
fb631387 KH	343	static int __init davinci_init_devices(void)
	344	{
	345	/* please keep these calls, and their implementations above,
	346	* in alphabetical order so they're easier to sort through.
	347	*/
f0fba2ad	348	davinci_init_pcm();
fb631387 KH	349	davinci_init_wdt();
	350
	351	return 0;
	352	}
	353	arch_initcall(davinci_init_devices);
	354