davinci: dm365 evm cpld support: leds, card detect, other setup
[deliverable/linux.git] / arch / arm / mach-davinci / include / mach / irqs.h
CommitLineData
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1/*
2 * DaVinci interrupt controller definitions
3 *
4 * Copyright (C) 2006 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 */
27#ifndef __ASM_ARCH_IRQS_H
28#define __ASM_ARCH_IRQS_H
29
30/* Base address */
31#define DAVINCI_ARM_INTC_BASE 0x01C48000
32
673dd36f
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33#define DAVINCI_INTC_TYPE_AINTC 0
34#define DAVINCI_INTC_TYPE_CP_INTC 1
35
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36/* Interrupt lines */
37#define IRQ_VDINT0 0
38#define IRQ_VDINT1 1
39#define IRQ_VDINT2 2
40#define IRQ_HISTINT 3
41#define IRQ_H3AINT 4
42#define IRQ_PRVUINT 5
43#define IRQ_RSZINT 6
44#define IRQ_VFOCINT 7
45#define IRQ_VENCINT 8
46#define IRQ_ASQINT 9
47#define IRQ_IMXINT 10
48#define IRQ_VLCDINT 11
49#define IRQ_USBINT 12
50#define IRQ_EMACINT 13
51
52#define IRQ_CCINT0 16
53#define IRQ_CCERRINT 17
54#define IRQ_TCERRINT0 18
55#define IRQ_TCERRINT 19
56#define IRQ_PSCIN 20
57
58#define IRQ_IDE 22
59#define IRQ_HPIINT 23
60#define IRQ_MBXINT 24
61#define IRQ_MBRINT 25
62#define IRQ_MMCINT 26
63#define IRQ_SDIOINT 27
64#define IRQ_MSINT 28
65#define IRQ_DDRINT 29
66#define IRQ_AEMIFINT 30
67#define IRQ_VLQINT 31
68#define IRQ_TINT0_TINT12 32
69#define IRQ_TINT0_TINT34 33
70#define IRQ_TINT1_TINT12 34
71#define IRQ_TINT1_TINT34 35
72#define IRQ_PWMINT0 36
73#define IRQ_PWMINT1 37
74#define IRQ_PWMINT2 38
75#define IRQ_I2C 39
76#define IRQ_UARTINT0 40
77#define IRQ_UARTINT1 41
78#define IRQ_UARTINT2 42
79#define IRQ_SPINT0 43
80#define IRQ_SPINT1 44
81
82#define IRQ_DSP2ARM0 46
83#define IRQ_DSP2ARM1 47
84#define IRQ_GPIO0 48
85#define IRQ_GPIO1 49
86#define IRQ_GPIO2 50
87#define IRQ_GPIO3 51
88#define IRQ_GPIO4 52
89#define IRQ_GPIO5 53
90#define IRQ_GPIO6 54
91#define IRQ_GPIO7 55
92#define IRQ_GPIOBNK0 56
93#define IRQ_GPIOBNK1 57
94#define IRQ_GPIOBNK2 58
95#define IRQ_GPIOBNK3 59
96#define IRQ_GPIOBNK4 60
97#define IRQ_COMMTX 61
98#define IRQ_COMMRX 62
99#define IRQ_EMUINT 63
100
101#define DAVINCI_N_AINTC_IRQ 64
9e16469c 102#define DAVINCI_N_GPIO 104
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103
104#define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO)
105
106#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
107
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108/* DaVinci DM6467-specific Interrupts */
109#define IRQ_DM646X_VP_VERTINT0 0
110#define IRQ_DM646X_VP_VERTINT1 1
111#define IRQ_DM646X_VP_VERTINT2 2
112#define IRQ_DM646X_VP_VERTINT3 3
113#define IRQ_DM646X_VP_ERRINT 4
114#define IRQ_DM646X_RESERVED_1 5
115#define IRQ_DM646X_RESERVED_2 6
116#define IRQ_DM646X_WDINT 7
117#define IRQ_DM646X_CRGENINT0 8
118#define IRQ_DM646X_CRGENINT1 9
119#define IRQ_DM646X_TSIFINT0 10
120#define IRQ_DM646X_TSIFINT1 11
121#define IRQ_DM646X_VDCEINT 12
122#define IRQ_DM646X_USBINT 13
123#define IRQ_DM646X_USBDMAINT 14
124#define IRQ_DM646X_PCIINT 15
125#define IRQ_DM646X_TCERRINT2 20
126#define IRQ_DM646X_TCERRINT3 21
127#define IRQ_DM646X_IDE 22
128#define IRQ_DM646X_HPIINT 23
129#define IRQ_DM646X_EMACRXTHINT 24
130#define IRQ_DM646X_EMACRXINT 25
131#define IRQ_DM646X_EMACTXINT 26
132#define IRQ_DM646X_EMACMISCINT 27
133#define IRQ_DM646X_MCASP0TXINT 28
134#define IRQ_DM646X_MCASP0RXINT 29
135#define IRQ_DM646X_RESERVED_3 31
136#define IRQ_DM646X_MCASP1TXINT 32
137#define IRQ_DM646X_VLQINT 38
138#define IRQ_DM646X_UARTINT2 42
139#define IRQ_DM646X_SPINT0 43
140#define IRQ_DM646X_SPINT1 44
141#define IRQ_DM646X_DSP2ARMINT 45
142#define IRQ_DM646X_RESERVED_4 46
143#define IRQ_DM646X_PSCINT 47
144#define IRQ_DM646X_GPIO0 48
145#define IRQ_DM646X_GPIO1 49
146#define IRQ_DM646X_GPIO2 50
147#define IRQ_DM646X_GPIO3 51
148#define IRQ_DM646X_GPIO4 52
149#define IRQ_DM646X_GPIO5 53
150#define IRQ_DM646X_GPIO6 54
151#define IRQ_DM646X_GPIO7 55
152#define IRQ_DM646X_GPIOBNK0 56
153#define IRQ_DM646X_GPIOBNK1 57
154#define IRQ_DM646X_GPIOBNK2 58
155#define IRQ_DM646X_DDRINT 59
156#define IRQ_DM646X_AEMIFINT 60
157
f9337405 158/* DaVinci DM355-specific Interrupts */
159#define IRQ_DM355_CCDC_VDINT0 0
160#define IRQ_DM355_CCDC_VDINT1 1
161#define IRQ_DM355_CCDC_VDINT2 2
162#define IRQ_DM355_IPIPE_HST 3
163#define IRQ_DM355_H3AINT 4
164#define IRQ_DM355_IPIPE_SDR 5
165#define IRQ_DM355_IPIPEIFINT 6
166#define IRQ_DM355_OSDINT 7
167#define IRQ_DM355_VENCINT 8
168#define IRQ_DM355_IMCOPINT 11
169#define IRQ_DM355_RTOINT 13
170#define IRQ_DM355_TINT4 13
171#define IRQ_DM355_TINT2_TINT12 13
172#define IRQ_DM355_UARTINT2 14
173#define IRQ_DM355_TINT5 14
174#define IRQ_DM355_TINT2_TINT34 14
175#define IRQ_DM355_TINT6 15
176#define IRQ_DM355_TINT3_TINT12 15
177#define IRQ_DM355_SPINT1_0 17
178#define IRQ_DM355_SPINT1_1 18
179#define IRQ_DM355_SPINT2_0 19
180#define IRQ_DM355_SPINT2_1 21
181#define IRQ_DM355_TINT7 22
182#define IRQ_DM355_TINT3_TINT34 22
183#define IRQ_DM355_SDIOINT0 23
184#define IRQ_DM355_MMCINT0 26
185#define IRQ_DM355_MSINT 26
186#define IRQ_DM355_MMCINT1 27
187#define IRQ_DM355_PWMINT3 28
188#define IRQ_DM355_SDIOINT1 31
189#define IRQ_DM355_SPINT0_0 42
190#define IRQ_DM355_SPINT0_1 43
191#define IRQ_DM355_GPIO0 44
192#define IRQ_DM355_GPIO1 45
193#define IRQ_DM355_GPIO2 46
194#define IRQ_DM355_GPIO3 47
195#define IRQ_DM355_GPIO4 48
196#define IRQ_DM355_GPIO5 49
197#define IRQ_DM355_GPIO6 50
198#define IRQ_DM355_GPIO7 51
199#define IRQ_DM355_GPIO8 52
200#define IRQ_DM355_GPIO9 53
201#define IRQ_DM355_GPIOBNK0 54
202#define IRQ_DM355_GPIOBNK1 55
203#define IRQ_DM355_GPIOBNK2 56
204#define IRQ_DM355_GPIOBNK3 57
205#define IRQ_DM355_GPIOBNK4 58
206#define IRQ_DM355_GPIOBNK5 59
207#define IRQ_DM355_GPIOBNK6 60
208
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209/* DaVinci DM365-specific Interrupts */
210#define IRQ_DM365_INSFINT 7
211#define IRQ_DM365_IMCOPINT 11
212#define IRQ_DM365_RTOINT 13
213#define IRQ_DM365_TINT5 14
214#define IRQ_DM365_TINT6 15
215#define IRQ_DM365_SPINT2_1 21
216#define IRQ_DM365_TINT7 22
217#define IRQ_DM365_SDIOINT0 23
218#define IRQ_DM365_MMCINT1 27
219#define IRQ_DM365_PWMINT3 28
220#define IRQ_DM365_SDIOINT1 31
221#define IRQ_DM365_SPIINT0_0 42
222#define IRQ_DM365_SPIINT3_0 43
223#define IRQ_DM365_GPIO0 44
224#define IRQ_DM365_GPIO1 45
225#define IRQ_DM365_GPIO2 46
226#define IRQ_DM365_GPIO3 47
227#define IRQ_DM365_GPIO4 48
228#define IRQ_DM365_GPIO5 49
229#define IRQ_DM365_GPIO6 50
230#define IRQ_DM365_GPIO7 51
231#define IRQ_DM365_EMAC_RXTHRESH 52
232#define IRQ_DM365_EMAC_RXPULSE 53
233#define IRQ_DM365_EMAC_TXPULSE 54
234#define IRQ_DM365_EMAC_MISCPULSE 55
235#define IRQ_DM365_GPIO12 56
236#define IRQ_DM365_GPIO13 57
237#define IRQ_DM365_GPIO14 58
238#define IRQ_DM365_GPIO15 59
239#define IRQ_DM365_ADCINT 59
240#define IRQ_DM365_KEYINT 60
241#define IRQ_DM365_TCERRINT2 61
242#define IRQ_DM365_TCERRINT3 62
243#define IRQ_DM365_EMUINT 63
244
7c6337e2 245#endif /* __ASM_ARCH_IRQS_H */
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