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7c6337e2 KH |
1 | /* |
2 | * TI DaVinci serial driver | |
3 | * | |
4 | * Copyright (C) 2006 Texas Instruments. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/serial_8250.h> | |
25 | #include <linux/serial_reg.h> | |
26 | #include <linux/platform_device.h> | |
27 | #include <linux/delay.h> | |
28 | #include <linux/clk.h> | |
fced80c7 | 29 | #include <linux/io.h> |
7c6337e2 | 30 | |
7c6337e2 | 31 | #include <asm/irq.h> |
a09e64fb RK |
32 | #include <mach/hardware.h> |
33 | #include <mach/serial.h> | |
34 | #include <mach/irqs.h> | |
617b925f KH |
35 | #include <mach/cputype.h> |
36 | #include "clock.h" | |
7c6337e2 | 37 | |
617b925f KH |
38 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, |
39 | int offset) | |
7c6337e2 KH |
40 | { |
41 | offset <<= up->regshift; | |
617b925f | 42 | return (unsigned int)__raw_readl(IO_ADDRESS(up->mapbase) + offset); |
7c6337e2 KH |
43 | } |
44 | ||
617b925f KH |
45 | static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, |
46 | int value) | |
7c6337e2 KH |
47 | { |
48 | offset <<= p->regshift; | |
617b925f | 49 | __raw_writel(value, IO_ADDRESS(p->mapbase) + offset); |
7c6337e2 KH |
50 | } |
51 | ||
52 | static struct plat_serial8250_port serial_platform_data[] = { | |
53 | { | |
617b925f | 54 | .mapbase = DAVINCI_UART0_BASE, |
7c6337e2 | 55 | .irq = IRQ_UARTINT0, |
617b925f KH |
56 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | |
57 | UPF_IOREMAP, | |
58 | .iotype = UPIO_MEM, | |
59 | .regshift = 2, | |
60 | }, | |
61 | { | |
62 | .mapbase = DAVINCI_UART1_BASE, | |
63 | .irq = IRQ_UARTINT1, | |
64 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | |
65 | UPF_IOREMAP, | |
66 | .iotype = UPIO_MEM, | |
67 | .regshift = 2, | |
68 | }, | |
69 | { | |
70 | .mapbase = DAVINCI_UART2_BASE, | |
71 | .irq = IRQ_UARTINT2, | |
72 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | |
73 | UPF_IOREMAP, | |
7c6337e2 KH |
74 | .iotype = UPIO_MEM, |
75 | .regshift = 2, | |
7c6337e2 KH |
76 | }, |
77 | { | |
78 | .flags = 0 | |
79 | }, | |
80 | }; | |
81 | ||
82 | static struct platform_device serial_device = { | |
83 | .name = "serial8250", | |
84 | .id = PLAT8250_DEV_PLATFORM, | |
85 | .dev = { | |
86 | .platform_data = serial_platform_data, | |
87 | }, | |
88 | }; | |
89 | ||
90 | static void __init davinci_serial_reset(struct plat_serial8250_port *p) | |
91 | { | |
7c6337e2 KH |
92 | unsigned int pwremu = 0; |
93 | ||
617b925f | 94 | serial_write_reg(p, UART_IER, 0); /* disable all interrupts */ |
7c6337e2 | 95 | |
617b925f KH |
96 | /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */ |
97 | serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu); | |
7c6337e2 KH |
98 | mdelay(10); |
99 | ||
100 | pwremu |= (0x3 << 13); | |
101 | pwremu |= 0x1; | |
617b925f KH |
102 | serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu); |
103 | ||
104 | if (cpu_is_davinci_dm646x()) | |
105 | serial_write_reg(p, UART_DM646X_SCR, | |
106 | UART_DM646X_SCR_TX_WATERMARK); | |
107 | } | |
108 | ||
109 | void __init davinci_serial_init(struct davinci_uart_config *info) | |
110 | { | |
111 | int i; | |
112 | char name[16]; | |
113 | struct clk *uart_clk; | |
114 | struct device *dev = &serial_device.dev; | |
115 | ||
116 | /* | |
117 | * Make sure the serial ports are muxed on at this point. | |
118 | * You have to mux them off in device drivers later on | |
119 | * if not needed. | |
120 | */ | |
121 | for (i = 0; i < DAVINCI_MAX_NR_UARTS; i++) { | |
122 | struct plat_serial8250_port *p = serial_platform_data + i; | |
123 | ||
124 | if (!(info->enabled_uarts & (1 << i))) { | |
125 | p->flags = 0; | |
126 | continue; | |
127 | } | |
128 | ||
129 | if (cpu_is_davinci_dm646x()) | |
130 | p->iotype = UPIO_MEM32; | |
131 | ||
132 | if (cpu_is_davinci_dm355()) { | |
133 | if (i == 2) { | |
134 | p->mapbase = (unsigned long)DM355_UART2_BASE; | |
135 | p->irq = IRQ_DM355_UARTINT2; | |
136 | } | |
137 | } | |
138 | ||
139 | sprintf(name, "uart%d", i); | |
140 | uart_clk = clk_get(dev, name); | |
141 | if (IS_ERR(uart_clk)) | |
142 | printk(KERN_ERR "%s:%d: failed to get UART%d clock\n", | |
143 | __func__, __LINE__, i); | |
144 | else { | |
145 | clk_enable(uart_clk); | |
146 | p->uartclk = clk_get_rate(uart_clk); | |
147 | davinci_serial_reset(p); | |
148 | } | |
149 | } | |
7c6337e2 KH |
150 | } |
151 | ||
152 | static int __init davinci_init(void) | |
153 | { | |
7c6337e2 KH |
154 | return platform_device_register(&serial_device); |
155 | } | |
156 | ||
157 | arch_initcall(davinci_init); |