Commit | Line | Data |
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edabd38e SB |
1 | /* |
2 | * arch/arm/mach-dove/common.c | |
3 | * | |
4 | * Core functions for Marvell Dove 88AP510 System On Chip | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/delay.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/platform_device.h> | |
15 | #include <linux/pci.h> | |
edabd38e SB |
16 | #include <linux/clk.h> |
17 | #include <linux/mbus.h> | |
edabd38e | 18 | #include <linux/ata_platform.h> |
edabd38e SB |
19 | #include <linux/gpio.h> |
20 | #include <asm/page.h> | |
21 | #include <asm/setup.h> | |
22 | #include <asm/timex.h> | |
573a652f | 23 | #include <asm/hardware/cache-tauros2.h> |
edabd38e SB |
24 | #include <asm/mach/map.h> |
25 | #include <asm/mach/time.h> | |
26 | #include <asm/mach/pci.h> | |
27 | #include <mach/dove.h> | |
28 | #include <mach/bridge-regs.h> | |
29 | #include <asm/mach/arch.h> | |
30 | #include <linux/irq.h> | |
edabd38e | 31 | #include <plat/time.h> |
28a2b450 | 32 | #include <plat/common.h> |
45173d5e | 33 | #include <plat/addr-map.h> |
edabd38e SB |
34 | #include "common.h" |
35 | ||
28a2b450 AL |
36 | static int get_tclk(void); |
37 | ||
edabd38e SB |
38 | /***************************************************************************** |
39 | * I/O Address Mapping | |
40 | ****************************************************************************/ | |
41 | static struct map_desc dove_io_desc[] __initdata = { | |
42 | { | |
43 | .virtual = DOVE_SB_REGS_VIRT_BASE, | |
44 | .pfn = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE), | |
45 | .length = DOVE_SB_REGS_SIZE, | |
46 | .type = MT_DEVICE, | |
47 | }, { | |
48 | .virtual = DOVE_NB_REGS_VIRT_BASE, | |
49 | .pfn = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE), | |
50 | .length = DOVE_NB_REGS_SIZE, | |
51 | .type = MT_DEVICE, | |
52 | }, { | |
53 | .virtual = DOVE_PCIE0_IO_VIRT_BASE, | |
54 | .pfn = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE), | |
55 | .length = DOVE_PCIE0_IO_SIZE, | |
56 | .type = MT_DEVICE, | |
57 | }, { | |
58 | .virtual = DOVE_PCIE1_IO_VIRT_BASE, | |
59 | .pfn = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE), | |
60 | .length = DOVE_PCIE1_IO_SIZE, | |
61 | .type = MT_DEVICE, | |
62 | }, | |
63 | }; | |
64 | ||
65 | void __init dove_map_io(void) | |
66 | { | |
67 | iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc)); | |
68 | } | |
69 | ||
edabd38e SB |
70 | /***************************************************************************** |
71 | * EHCI0 | |
72 | ****************************************************************************/ | |
edabd38e SB |
73 | void __init dove_ehci0_init(void) |
74 | { | |
45173d5e | 75 | orion_ehci_init(&orion_mbus_dram_info, |
4fcd3f37 | 76 | DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0); |
edabd38e SB |
77 | } |
78 | ||
79 | /***************************************************************************** | |
80 | * EHCI1 | |
81 | ****************************************************************************/ | |
edabd38e SB |
82 | void __init dove_ehci1_init(void) |
83 | { | |
45173d5e | 84 | orion_ehci_1_init(&orion_mbus_dram_info, |
4fcd3f37 | 85 | DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1); |
edabd38e SB |
86 | } |
87 | ||
88 | /***************************************************************************** | |
89 | * GE00 | |
90 | ****************************************************************************/ | |
edabd38e SB |
91 | void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data) |
92 | { | |
45173d5e | 93 | orion_ge00_init(eth_data, &orion_mbus_dram_info, |
7e3819d8 AL |
94 | DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM, |
95 | 0, get_tclk()); | |
edabd38e SB |
96 | } |
97 | ||
98 | /***************************************************************************** | |
99 | * SoC RTC | |
100 | ****************************************************************************/ | |
edabd38e SB |
101 | void __init dove_rtc_init(void) |
102 | { | |
f6eaccb3 | 103 | orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC); |
edabd38e SB |
104 | } |
105 | ||
106 | /***************************************************************************** | |
107 | * SATA | |
108 | ****************************************************************************/ | |
edabd38e SB |
109 | void __init dove_sata_init(struct mv_sata_platform_data *sata_data) |
110 | { | |
45173d5e | 111 | orion_sata_init(sata_data, &orion_mbus_dram_info, |
9e613f8a AL |
112 | DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA); |
113 | ||
edabd38e SB |
114 | } |
115 | ||
116 | /***************************************************************************** | |
117 | * UART0 | |
118 | ****************************************************************************/ | |
edabd38e SB |
119 | void __init dove_uart0_init(void) |
120 | { | |
28a2b450 AL |
121 | orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE, |
122 | IRQ_DOVE_UART_0, get_tclk()); | |
edabd38e SB |
123 | } |
124 | ||
125 | /***************************************************************************** | |
126 | * UART1 | |
127 | ****************************************************************************/ | |
edabd38e SB |
128 | void __init dove_uart1_init(void) |
129 | { | |
28a2b450 AL |
130 | orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE, |
131 | IRQ_DOVE_UART_1, get_tclk()); | |
edabd38e SB |
132 | } |
133 | ||
134 | /***************************************************************************** | |
135 | * UART2 | |
136 | ****************************************************************************/ | |
edabd38e SB |
137 | void __init dove_uart2_init(void) |
138 | { | |
28a2b450 AL |
139 | orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE, |
140 | IRQ_DOVE_UART_2, get_tclk()); | |
edabd38e SB |
141 | } |
142 | ||
143 | /***************************************************************************** | |
144 | * UART3 | |
145 | ****************************************************************************/ | |
edabd38e SB |
146 | void __init dove_uart3_init(void) |
147 | { | |
28a2b450 AL |
148 | orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE, |
149 | IRQ_DOVE_UART_3, get_tclk()); | |
edabd38e SB |
150 | } |
151 | ||
152 | /***************************************************************************** | |
980f9f60 | 153 | * SPI |
edabd38e | 154 | ****************************************************************************/ |
edabd38e SB |
155 | void __init dove_spi0_init(void) |
156 | { | |
980f9f60 | 157 | orion_spi_init(DOVE_SPI0_PHYS_BASE, get_tclk()); |
edabd38e SB |
158 | } |
159 | ||
edabd38e SB |
160 | void __init dove_spi1_init(void) |
161 | { | |
72cc2056 | 162 | orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk()); |
edabd38e SB |
163 | } |
164 | ||
165 | /***************************************************************************** | |
166 | * I2C | |
167 | ****************************************************************************/ | |
edabd38e SB |
168 | void __init dove_i2c_init(void) |
169 | { | |
aac7ffa3 | 170 | orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10); |
edabd38e SB |
171 | } |
172 | ||
173 | /***************************************************************************** | |
174 | * Time handling | |
175 | ****************************************************************************/ | |
4ee1f6b5 LB |
176 | void __init dove_init_early(void) |
177 | { | |
178 | orion_time_set_base(TIMER_VIRT_BASE); | |
179 | } | |
180 | ||
edabd38e SB |
181 | static int get_tclk(void) |
182 | { | |
183 | /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */ | |
184 | return 166666667; | |
185 | } | |
186 | ||
187 | static void dove_timer_init(void) | |
188 | { | |
4ee1f6b5 LB |
189 | orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, |
190 | IRQ_DOVE_BRIDGE, get_tclk()); | |
edabd38e SB |
191 | } |
192 | ||
193 | struct sys_timer dove_timer = { | |
194 | .init = dove_timer_init, | |
195 | }; | |
196 | ||
edabd38e SB |
197 | /***************************************************************************** |
198 | * XOR 0 | |
199 | ****************************************************************************/ | |
edabd38e SB |
200 | void __init dove_xor0_init(void) |
201 | { | |
45173d5e | 202 | orion_xor0_init(&orion_mbus_dram_info, |
ee962723 AL |
203 | DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE, |
204 | IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01); | |
edabd38e SB |
205 | } |
206 | ||
207 | /***************************************************************************** | |
208 | * XOR 1 | |
209 | ****************************************************************************/ | |
edabd38e SB |
210 | void __init dove_xor1_init(void) |
211 | { | |
ee962723 AL |
212 | orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE, |
213 | IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11); | |
edabd38e SB |
214 | } |
215 | ||
16bc90af SB |
216 | /***************************************************************************** |
217 | * SDIO | |
218 | ****************************************************************************/ | |
219 | static u64 sdio_dmamask = DMA_BIT_MASK(32); | |
220 | ||
221 | static struct resource dove_sdio0_resources[] = { | |
222 | { | |
223 | .start = DOVE_SDIO0_PHYS_BASE, | |
224 | .end = DOVE_SDIO0_PHYS_BASE + 0xff, | |
225 | .flags = IORESOURCE_MEM, | |
226 | }, { | |
227 | .start = IRQ_DOVE_SDIO0, | |
228 | .end = IRQ_DOVE_SDIO0, | |
229 | .flags = IORESOURCE_IRQ, | |
230 | }, | |
231 | }; | |
232 | ||
233 | static struct platform_device dove_sdio0 = { | |
930e2fe7 | 234 | .name = "sdhci-dove", |
16bc90af SB |
235 | .id = 0, |
236 | .dev = { | |
237 | .dma_mask = &sdio_dmamask, | |
238 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
239 | }, | |
240 | .resource = dove_sdio0_resources, | |
241 | .num_resources = ARRAY_SIZE(dove_sdio0_resources), | |
242 | }; | |
243 | ||
244 | void __init dove_sdio0_init(void) | |
245 | { | |
246 | platform_device_register(&dove_sdio0); | |
247 | } | |
248 | ||
249 | static struct resource dove_sdio1_resources[] = { | |
250 | { | |
251 | .start = DOVE_SDIO1_PHYS_BASE, | |
252 | .end = DOVE_SDIO1_PHYS_BASE + 0xff, | |
253 | .flags = IORESOURCE_MEM, | |
254 | }, { | |
255 | .start = IRQ_DOVE_SDIO1, | |
256 | .end = IRQ_DOVE_SDIO1, | |
257 | .flags = IORESOURCE_IRQ, | |
258 | }, | |
259 | }; | |
260 | ||
261 | static struct platform_device dove_sdio1 = { | |
930e2fe7 | 262 | .name = "sdhci-dove", |
16bc90af SB |
263 | .id = 1, |
264 | .dev = { | |
265 | .dma_mask = &sdio_dmamask, | |
266 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
267 | }, | |
268 | .resource = dove_sdio1_resources, | |
269 | .num_resources = ARRAY_SIZE(dove_sdio1_resources), | |
270 | }; | |
271 | ||
272 | void __init dove_sdio1_init(void) | |
273 | { | |
274 | platform_device_register(&dove_sdio1); | |
275 | } | |
276 | ||
edabd38e SB |
277 | void __init dove_init(void) |
278 | { | |
279 | int tclk; | |
280 | ||
281 | tclk = get_tclk(); | |
282 | ||
283 | printk(KERN_INFO "Dove 88AP510 SoC, "); | |
284 | printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000); | |
285 | ||
573a652f LB |
286 | #ifdef CONFIG_CACHE_TAUROS2 |
287 | tauros2_init(); | |
288 | #endif | |
edabd38e SB |
289 | dove_setup_cpu_mbus(); |
290 | ||
edabd38e SB |
291 | /* internal devices that every board has */ |
292 | dove_rtc_init(); | |
293 | dove_xor0_init(); | |
294 | dove_xor1_init(); | |
295 | } |