Commit | Line | Data |
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e7736d47 LB |
1 | /* |
2 | * arch/arm/mach-ep93xx/core.c | |
3 | * Core routines for Cirrus EP93xx chips. | |
4 | * | |
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | |
3c9a071d | 6 | * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> |
e7736d47 LB |
7 | * |
8 | * Thanks go to Michael Burian and Ray Lehtiniemi for their key | |
9 | * role in the ep93xx linux community. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | */ | |
16 | ||
64d6882d HS |
17 | #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt |
18 | ||
e7736d47 LB |
19 | #include <linux/kernel.h> |
20 | #include <linux/init.h> | |
583ddafe | 21 | #include <linux/platform_device.h> |
e7736d47 | 22 | #include <linux/interrupt.h> |
63890a0e | 23 | #include <linux/dma-mapping.h> |
b19e11fb | 24 | #include <linux/sys_soc.h> |
6bd4b382 | 25 | #include <linux/irq.h> |
583ddafe HS |
26 | #include <linux/io.h> |
27 | #include <linux/gpio.h> | |
3aa7a9a3 | 28 | #include <linux/leds.h> |
aee85fe8 | 29 | #include <linux/termios.h> |
e7736d47 | 30 | #include <linux/amba/bus.h> |
aee85fe8 | 31 | #include <linux/amba/serial.h> |
16bcf78f | 32 | #include <linux/mtd/physmap.h> |
d52a26a9 HS |
33 | #include <linux/i2c.h> |
34 | #include <linux/i2c-gpio.h> | |
4fec9978 | 35 | #include <linux/spi/spi.h> |
dc28094b | 36 | #include <linux/export.h> |
9e47b8bf | 37 | #include <linux/irqchip/arm-vic.h> |
7b6d864b | 38 | #include <linux/reboot.h> |
e55f7cd2 | 39 | #include <linux/usb/ohci_pdriver.h> |
e8a7d2bb | 40 | #include <linux/random.h> |
e7736d47 | 41 | |
a09e64fb | 42 | #include <mach/hardware.h> |
a3b29245 AB |
43 | #include <linux/platform_data/video-ep93xx.h> |
44 | #include <linux/platform_data/keypad-ep93xx.h> | |
45 | #include <linux/platform_data/spi-ep93xx.h> | |
bd5f12a2 | 46 | #include <mach/gpio-ep93xx.h> |
e7736d47 | 47 | |
b19e11fb | 48 | #include <asm/mach/arch.h> |
e7736d47 | 49 | #include <asm/mach/map.h> |
e7736d47 | 50 | |
a05baf33 | 51 | #include "soc.h" |
e7736d47 LB |
52 | |
53 | /************************************************************************* | |
54 | * Static I/O mappings that are needed for all EP93xx platforms | |
55 | *************************************************************************/ | |
56 | static struct map_desc ep93xx_io_desc[] __initdata = { | |
57 | { | |
58 | .virtual = EP93XX_AHB_VIRT_BASE, | |
59 | .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE), | |
60 | .length = EP93XX_AHB_SIZE, | |
61 | .type = MT_DEVICE, | |
62 | }, { | |
63 | .virtual = EP93XX_APB_VIRT_BASE, | |
64 | .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE), | |
65 | .length = EP93XX_APB_SIZE, | |
66 | .type = MT_DEVICE, | |
67 | }, | |
68 | }; | |
69 | ||
70 | void __init ep93xx_map_io(void) | |
71 | { | |
72 | iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc)); | |
73 | } | |
74 | ||
e7736d47 LB |
75 | /************************************************************************* |
76 | * EP93xx IRQ handling | |
77 | *************************************************************************/ | |
78 | void __init ep93xx_init_irq(void) | |
79 | { | |
5396730b HS |
80 | vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0); |
81 | vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0); | |
e7736d47 LB |
82 | } |
83 | ||
84 | ||
02239f0a HS |
85 | /************************************************************************* |
86 | * EP93xx System Controller Software Locked register handling | |
87 | *************************************************************************/ | |
88 | ||
89 | /* | |
90 | * syscon_swlock prevents anything else from writing to the syscon | |
91 | * block while a software locked register is being written. | |
92 | */ | |
93 | static DEFINE_SPINLOCK(syscon_swlock); | |
94 | ||
fbeeea53 | 95 | void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg) |
02239f0a HS |
96 | { |
97 | unsigned long flags; | |
98 | ||
99 | spin_lock_irqsave(&syscon_swlock, flags); | |
100 | ||
101 | __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); | |
102 | __raw_writel(val, reg); | |
103 | ||
104 | spin_unlock_irqrestore(&syscon_swlock, flags); | |
105 | } | |
02239f0a HS |
106 | |
107 | void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits) | |
108 | { | |
109 | unsigned long flags; | |
110 | unsigned int val; | |
111 | ||
112 | spin_lock_irqsave(&syscon_swlock, flags); | |
113 | ||
114 | val = __raw_readl(EP93XX_SYSCON_DEVCFG); | |
02239f0a | 115 | val &= ~clear_bits; |
a0fb007b | 116 | val |= set_bits; |
02239f0a HS |
117 | __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); |
118 | __raw_writel(val, EP93XX_SYSCON_DEVCFG); | |
119 | ||
120 | spin_unlock_irqrestore(&syscon_swlock, flags); | |
121 | } | |
02239f0a | 122 | |
99e6a23a MW |
123 | /** |
124 | * ep93xx_chip_revision() - returns the EP93xx chip revision | |
125 | * | |
126 | * See <mach/platform.h> for more information. | |
127 | */ | |
128 | unsigned int ep93xx_chip_revision(void) | |
129 | { | |
130 | unsigned int v; | |
131 | ||
132 | v = __raw_readl(EP93XX_SYSCON_SYSCFG); | |
133 | v &= EP93XX_SYSCON_SYSCFG_REV_MASK; | |
134 | v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT; | |
135 | return v; | |
136 | } | |
67e108c5 | 137 | EXPORT_SYMBOL_GPL(ep93xx_chip_revision); |
02239f0a | 138 | |
1e4c8842 HS |
139 | /************************************************************************* |
140 | * EP93xx GPIO | |
141 | *************************************************************************/ | |
142 | static struct resource ep93xx_gpio_resource[] = { | |
ede55aaa | 143 | DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc), |
1e4c8842 HS |
144 | }; |
145 | ||
146 | static struct platform_device ep93xx_gpio_device = { | |
147 | .name = "gpio-ep93xx", | |
148 | .id = -1, | |
149 | .num_resources = ARRAY_SIZE(ep93xx_gpio_resource), | |
150 | .resource = ep93xx_gpio_resource, | |
151 | }; | |
152 | ||
e7736d47 LB |
153 | /************************************************************************* |
154 | * EP93xx peripheral handling | |
155 | *************************************************************************/ | |
aee85fe8 LB |
156 | #define EP93XX_UART_MCR_OFFSET (0x0100) |
157 | ||
158 | static void ep93xx_uart_set_mctrl(struct amba_device *dev, | |
159 | void __iomem *base, unsigned int mctrl) | |
160 | { | |
161 | unsigned int mcr; | |
162 | ||
163 | mcr = 0; | |
186dcaa4 | 164 | if (mctrl & TIOCM_RTS) |
aee85fe8 | 165 | mcr |= 2; |
186dcaa4 | 166 | if (mctrl & TIOCM_DTR) |
aee85fe8 LB |
167 | mcr |= 1; |
168 | ||
169 | __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); | |
170 | } | |
171 | ||
172 | static struct amba_pl010_data ep93xx_uart_data = { | |
173 | .set_mctrl = ep93xx_uart_set_mctrl, | |
174 | }; | |
175 | ||
0b26051b RK |
176 | static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, |
177 | { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); | |
aee85fe8 | 178 | |
0b26051b | 179 | static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, |
cc3874fe | 180 | { IRQ_EP93XX_UART2 }, NULL); |
aee85fe8 | 181 | |
0b26051b RK |
182 | static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, |
183 | { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); | |
41658132 | 184 | |
38f7b009 | 185 | static struct resource ep93xx_rtc_resource[] = { |
ede55aaa | 186 | DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c), |
38f7b009 HS |
187 | }; |
188 | ||
41658132 | 189 | static struct platform_device ep93xx_rtc_device = { |
38f7b009 HS |
190 | .name = "ep93xx-rtc", |
191 | .id = -1, | |
192 | .num_resources = ARRAY_SIZE(ep93xx_rtc_resource), | |
193 | .resource = ep93xx_rtc_resource, | |
41658132 LB |
194 | }; |
195 | ||
e55f7cd2 HS |
196 | /************************************************************************* |
197 | * EP93xx OHCI USB Host | |
198 | *************************************************************************/ | |
199 | ||
200 | static struct clk *ep93xx_ohci_host_clock; | |
201 | ||
202 | static int ep93xx_ohci_power_on(struct platform_device *pdev) | |
203 | { | |
204 | if (!ep93xx_ohci_host_clock) { | |
205 | ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL); | |
206 | if (IS_ERR(ep93xx_ohci_host_clock)) | |
207 | return PTR_ERR(ep93xx_ohci_host_clock); | |
208 | } | |
209 | ||
210 | return clk_enable(ep93xx_ohci_host_clock); | |
211 | } | |
212 | ||
213 | static void ep93xx_ohci_power_off(struct platform_device *pdev) | |
214 | { | |
215 | clk_disable(ep93xx_ohci_host_clock); | |
216 | } | |
217 | ||
218 | static struct usb_ohci_pdata ep93xx_ohci_pdata = { | |
219 | .power_on = ep93xx_ohci_power_on, | |
220 | .power_off = ep93xx_ohci_power_off, | |
221 | .power_suspend = ep93xx_ohci_power_off, | |
222 | }; | |
41658132 | 223 | |
1f64eb37 | 224 | static struct resource ep93xx_ohci_resources[] = { |
ede55aaa HS |
225 | DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000), |
226 | DEFINE_RES_IRQ(IRQ_EP93XX_USB), | |
1f64eb37 LB |
227 | }; |
228 | ||
e55f7cd2 | 229 | static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32); |
63890a0e | 230 | |
1f64eb37 | 231 | static struct platform_device ep93xx_ohci_device = { |
e55f7cd2 | 232 | .name = "ohci-platform", |
1f64eb37 | 233 | .id = -1, |
e55f7cd2 HS |
234 | .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), |
235 | .resource = ep93xx_ohci_resources, | |
1f64eb37 | 236 | .dev = { |
e55f7cd2 | 237 | .dma_mask = &ep93xx_ohci_dma_mask, |
63890a0e | 238 | .coherent_dma_mask = DMA_BIT_MASK(32), |
e55f7cd2 | 239 | .platform_data = &ep93xx_ohci_pdata, |
1f64eb37 | 240 | }, |
1f64eb37 LB |
241 | }; |
242 | ||
16bcf78f HS |
243 | /************************************************************************* |
244 | * EP93xx physmap'ed flash | |
245 | *************************************************************************/ | |
246 | static struct physmap_flash_data ep93xx_flash_data; | |
247 | ||
248 | static struct resource ep93xx_flash_resource = { | |
249 | .flags = IORESOURCE_MEM, | |
250 | }; | |
251 | ||
252 | static struct platform_device ep93xx_flash = { | |
253 | .name = "physmap-flash", | |
254 | .id = 0, | |
255 | .dev = { | |
256 | .platform_data = &ep93xx_flash_data, | |
257 | }, | |
258 | .num_resources = 1, | |
259 | .resource = &ep93xx_flash_resource, | |
260 | }; | |
261 | ||
262 | /** | |
263 | * ep93xx_register_flash() - Register the external flash device. | |
264 | * @width: bank width in octets | |
265 | * @start: resource start address | |
266 | * @size: resource size | |
267 | */ | |
268 | void __init ep93xx_register_flash(unsigned int width, | |
269 | resource_size_t start, resource_size_t size) | |
270 | { | |
271 | ep93xx_flash_data.width = width; | |
272 | ||
273 | ep93xx_flash_resource.start = start; | |
274 | ep93xx_flash_resource.end = start + size - 1; | |
275 | ||
276 | platform_device_register(&ep93xx_flash); | |
277 | } | |
278 | ||
279 | ||
b370e082 HS |
280 | /************************************************************************* |
281 | * EP93xx ethernet peripheral handling | |
282 | *************************************************************************/ | |
a0a08fdc HS |
283 | static struct ep93xx_eth_data ep93xx_eth_data; |
284 | ||
285 | static struct resource ep93xx_eth_resource[] = { | |
ede55aaa | 286 | DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000), |
011b2e84 | 287 | DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET), |
a0a08fdc HS |
288 | }; |
289 | ||
fa70cf47 MW |
290 | static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32); |
291 | ||
a0a08fdc HS |
292 | static struct platform_device ep93xx_eth_device = { |
293 | .name = "ep93xx-eth", | |
294 | .id = -1, | |
295 | .dev = { | |
fa70cf47 MW |
296 | .platform_data = &ep93xx_eth_data, |
297 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
298 | .dma_mask = &ep93xx_eth_dma_mask, | |
a0a08fdc HS |
299 | }, |
300 | .num_resources = ARRAY_SIZE(ep93xx_eth_resource), | |
301 | .resource = ep93xx_eth_resource, | |
302 | }; | |
303 | ||
b370e082 HS |
304 | /** |
305 | * ep93xx_register_eth - Register the built-in ethernet platform device. | |
306 | * @data: platform specific ethernet configuration (__initdata) | |
307 | * @copy_addr: flag indicating that the MAC address should be copied | |
308 | * from the IndAd registers (as programmed by the bootloader) | |
309 | */ | |
a0a08fdc HS |
310 | void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) |
311 | { | |
5b1c3c85 HS |
312 | if (copy_addr) |
313 | memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6); | |
a0a08fdc HS |
314 | |
315 | ep93xx_eth_data = *data; | |
316 | platform_device_register(&ep93xx_eth_device); | |
317 | } | |
318 | ||
6531a991 HS |
319 | |
320 | /************************************************************************* | |
321 | * EP93xx i2c peripheral handling | |
322 | *************************************************************************/ | |
323 | static struct i2c_gpio_platform_data ep93xx_i2c_data; | |
d52a26a9 HS |
324 | |
325 | static struct platform_device ep93xx_i2c_device = { | |
b370e082 HS |
326 | .name = "i2c-gpio", |
327 | .id = 0, | |
328 | .dev = { | |
329 | .platform_data = &ep93xx_i2c_data, | |
330 | }, | |
d52a26a9 HS |
331 | }; |
332 | ||
b370e082 HS |
333 | /** |
334 | * ep93xx_register_i2c - Register the i2c platform device. | |
335 | * @data: platform specific i2c-gpio configuration (__initdata) | |
336 | * @devices: platform specific i2c bus device information (__initdata) | |
337 | * @num: the number of devices on the i2c bus | |
338 | */ | |
6531a991 HS |
339 | void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data, |
340 | struct i2c_board_info *devices, int num) | |
d52a26a9 | 341 | { |
6531a991 HS |
342 | /* |
343 | * Set the EEPROM interface pin drive type control. | |
344 | * Defines the driver type for the EECLK and EEDAT pins as either | |
345 | * open drain, which will require an external pull-up, or a normal | |
346 | * CMOS driver. | |
347 | */ | |
348 | if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT) | |
64d6882d | 349 | pr_warning("sda != EEDAT, open drain has no effect\n"); |
6531a991 | 350 | if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK) |
64d6882d | 351 | pr_warning("scl != EECLK, open drain has no effect\n"); |
6531a991 HS |
352 | |
353 | __raw_writel((data->sda_is_open_drain << 1) | | |
354 | (data->scl_is_open_drain << 0), | |
355 | EP93XX_GPIO_EEDRIVE); | |
356 | ||
357 | ep93xx_i2c_data = *data; | |
d52a26a9 HS |
358 | i2c_register_board_info(0, devices, num); |
359 | platform_device_register(&ep93xx_i2c_device); | |
360 | } | |
361 | ||
4fec9978 MW |
362 | /************************************************************************* |
363 | * EP93xx SPI peripheral handling | |
364 | *************************************************************************/ | |
365 | static struct ep93xx_spi_info ep93xx_spi_master_data; | |
366 | ||
367 | static struct resource ep93xx_spi_resources[] = { | |
ede55aaa HS |
368 | DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18), |
369 | DEFINE_RES_IRQ(IRQ_EP93XX_SSP), | |
4fec9978 MW |
370 | }; |
371 | ||
626a96db MW |
372 | static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32); |
373 | ||
4fec9978 MW |
374 | static struct platform_device ep93xx_spi_device = { |
375 | .name = "ep93xx-spi", | |
376 | .id = 0, | |
377 | .dev = { | |
626a96db MW |
378 | .platform_data = &ep93xx_spi_master_data, |
379 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
380 | .dma_mask = &ep93xx_spi_dma_mask, | |
4fec9978 MW |
381 | }, |
382 | .num_resources = ARRAY_SIZE(ep93xx_spi_resources), | |
383 | .resource = ep93xx_spi_resources, | |
384 | }; | |
385 | ||
386 | /** | |
387 | * ep93xx_register_spi() - registers spi platform device | |
388 | * @info: ep93xx board specific spi master info (__initdata) | |
389 | * @devices: SPI devices to register (__initdata) | |
390 | * @num: number of SPI devices to register | |
391 | * | |
392 | * This function registers platform device for the EP93xx SPI controller and | |
393 | * also makes sure that SPI pins are muxed so that I2S is not using those pins. | |
394 | */ | |
395 | void __init ep93xx_register_spi(struct ep93xx_spi_info *info, | |
396 | struct spi_board_info *devices, int num) | |
397 | { | |
398 | /* | |
399 | * When SPI is used, we need to make sure that I2S is muxed off from | |
400 | * SPI pins. | |
401 | */ | |
402 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP); | |
403 | ||
404 | ep93xx_spi_master_data = *info; | |
405 | spi_register_board_info(devices, num); | |
406 | platform_device_register(&ep93xx_spi_device); | |
407 | } | |
3aa7a9a3 HS |
408 | |
409 | /************************************************************************* | |
410 | * EP93xx LEDs | |
411 | *************************************************************************/ | |
a1eacd79 | 412 | static const struct gpio_led ep93xx_led_pins[] __initconst = { |
3aa7a9a3 | 413 | { |
b370e082 HS |
414 | .name = "platform:grled", |
415 | .gpio = EP93XX_GPIO_LINE_GRLED, | |
3aa7a9a3 | 416 | }, { |
b370e082 HS |
417 | .name = "platform:rdled", |
418 | .gpio = EP93XX_GPIO_LINE_RDLED, | |
3aa7a9a3 HS |
419 | }, |
420 | }; | |
421 | ||
a1eacd79 | 422 | static const struct gpio_led_platform_data ep93xx_led_data __initconst = { |
3aa7a9a3 HS |
423 | .num_leds = ARRAY_SIZE(ep93xx_led_pins), |
424 | .leds = ep93xx_led_pins, | |
425 | }; | |
426 | ||
ef12379f HS |
427 | /************************************************************************* |
428 | * EP93xx pwm peripheral handling | |
429 | *************************************************************************/ | |
430 | static struct resource ep93xx_pwm0_resource[] = { | |
ede55aaa | 431 | DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10), |
ef12379f HS |
432 | }; |
433 | ||
434 | static struct platform_device ep93xx_pwm0_device = { | |
435 | .name = "ep93xx-pwm", | |
436 | .id = 0, | |
437 | .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource), | |
438 | .resource = ep93xx_pwm0_resource, | |
439 | }; | |
440 | ||
441 | static struct resource ep93xx_pwm1_resource[] = { | |
ede55aaa | 442 | DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10), |
ef12379f HS |
443 | }; |
444 | ||
445 | static struct platform_device ep93xx_pwm1_device = { | |
446 | .name = "ep93xx-pwm", | |
447 | .id = 1, | |
448 | .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource), | |
449 | .resource = ep93xx_pwm1_resource, | |
450 | }; | |
451 | ||
452 | void __init ep93xx_register_pwm(int pwm0, int pwm1) | |
453 | { | |
454 | if (pwm0) | |
455 | platform_device_register(&ep93xx_pwm0_device); | |
456 | ||
457 | /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */ | |
458 | if (pwm1) | |
459 | platform_device_register(&ep93xx_pwm1_device); | |
460 | } | |
461 | ||
462 | int ep93xx_pwm_acquire_gpio(struct platform_device *pdev) | |
463 | { | |
464 | int err; | |
465 | ||
466 | if (pdev->id == 0) { | |
467 | err = 0; | |
468 | } else if (pdev->id == 1) { | |
469 | err = gpio_request(EP93XX_GPIO_LINE_EGPIO14, | |
470 | dev_name(&pdev->dev)); | |
471 | if (err) | |
472 | return err; | |
473 | err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0); | |
474 | if (err) | |
475 | goto fail; | |
476 | ||
477 | /* PWM 1 output on EGPIO[14] */ | |
478 | ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG); | |
479 | } else { | |
480 | err = -ENODEV; | |
481 | } | |
482 | ||
483 | return err; | |
484 | ||
485 | fail: | |
486 | gpio_free(EP93XX_GPIO_LINE_EGPIO14); | |
487 | return err; | |
488 | } | |
489 | EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio); | |
490 | ||
491 | void ep93xx_pwm_release_gpio(struct platform_device *pdev) | |
492 | { | |
493 | if (pdev->id == 1) { | |
494 | gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14); | |
495 | gpio_free(EP93XX_GPIO_LINE_EGPIO14); | |
496 | ||
497 | /* EGPIO[14] used for GPIO */ | |
498 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG); | |
499 | } | |
500 | } | |
501 | EXPORT_SYMBOL(ep93xx_pwm_release_gpio); | |
502 | ||
503 | ||
c6012189 RM |
504 | /************************************************************************* |
505 | * EP93xx video peripheral handling | |
506 | *************************************************************************/ | |
507 | static struct ep93xxfb_mach_info ep93xxfb_data; | |
508 | ||
509 | static struct resource ep93xx_fb_resource[] = { | |
ede55aaa | 510 | DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800), |
c6012189 RM |
511 | }; |
512 | ||
513 | static struct platform_device ep93xx_fb_device = { | |
514 | .name = "ep93xx-fb", | |
515 | .id = -1, | |
516 | .dev = { | |
b370e082 | 517 | .platform_data = &ep93xxfb_data, |
c6012189 RM |
518 | .coherent_dma_mask = DMA_BIT_MASK(32), |
519 | .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask, | |
520 | }, | |
521 | .num_resources = ARRAY_SIZE(ep93xx_fb_resource), | |
522 | .resource = ep93xx_fb_resource, | |
523 | }; | |
524 | ||
0fd19580 RM |
525 | /* The backlight use a single register in the framebuffer's register space */ |
526 | #define EP93XX_RASTER_REG_BRIGHTNESS 0x20 | |
527 | ||
528 | static struct resource ep93xx_bl_resources[] = { | |
529 | DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE + | |
530 | EP93XX_RASTER_REG_BRIGHTNESS, 0x04), | |
531 | }; | |
532 | ||
6ea4b741 HS |
533 | static struct platform_device ep93xx_bl_device = { |
534 | .name = "ep93xx-bl", | |
535 | .id = -1, | |
0fd19580 RM |
536 | .num_resources = ARRAY_SIZE(ep93xx_bl_resources), |
537 | .resource = ep93xx_bl_resources, | |
6ea4b741 HS |
538 | }; |
539 | ||
b370e082 HS |
540 | /** |
541 | * ep93xx_register_fb - Register the framebuffer platform device. | |
542 | * @data: platform specific framebuffer configuration (__initdata) | |
543 | */ | |
c6012189 RM |
544 | void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) |
545 | { | |
546 | ep93xxfb_data = *data; | |
547 | platform_device_register(&ep93xx_fb_device); | |
6ea4b741 | 548 | platform_device_register(&ep93xx_bl_device); |
c6012189 RM |
549 | } |
550 | ||
12f56c68 HS |
551 | |
552 | /************************************************************************* | |
553 | * EP93xx matrix keypad peripheral handling | |
554 | *************************************************************************/ | |
b370e082 HS |
555 | static struct ep93xx_keypad_platform_data ep93xx_keypad_data; |
556 | ||
12f56c68 | 557 | static struct resource ep93xx_keypad_resource[] = { |
ede55aaa HS |
558 | DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c), |
559 | DEFINE_RES_IRQ(IRQ_EP93XX_KEY), | |
12f56c68 HS |
560 | }; |
561 | ||
562 | static struct platform_device ep93xx_keypad_device = { | |
b370e082 HS |
563 | .name = "ep93xx-keypad", |
564 | .id = -1, | |
565 | .dev = { | |
566 | .platform_data = &ep93xx_keypad_data, | |
567 | }, | |
568 | .num_resources = ARRAY_SIZE(ep93xx_keypad_resource), | |
569 | .resource = ep93xx_keypad_resource, | |
12f56c68 HS |
570 | }; |
571 | ||
b370e082 HS |
572 | /** |
573 | * ep93xx_register_keypad - Register the keypad platform device. | |
574 | * @data: platform specific keypad configuration (__initdata) | |
575 | */ | |
12f56c68 HS |
576 | void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data) |
577 | { | |
b370e082 | 578 | ep93xx_keypad_data = *data; |
12f56c68 HS |
579 | platform_device_register(&ep93xx_keypad_device); |
580 | } | |
581 | ||
582 | int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) | |
583 | { | |
584 | int err; | |
585 | int i; | |
586 | ||
587 | for (i = 0; i < 8; i++) { | |
588 | err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev)); | |
589 | if (err) | |
590 | goto fail_gpio_c; | |
591 | err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev)); | |
592 | if (err) | |
593 | goto fail_gpio_d; | |
594 | } | |
595 | ||
596 | /* Enable the keypad controller; GPIO ports C and D used for keypad */ | |
597 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS | | |
598 | EP93XX_SYSCON_DEVCFG_GONK); | |
599 | ||
600 | return 0; | |
601 | ||
602 | fail_gpio_d: | |
603 | gpio_free(EP93XX_GPIO_LINE_C(i)); | |
604 | fail_gpio_c: | |
5528a846 | 605 | for (--i; i >= 0; --i) { |
12f56c68 HS |
606 | gpio_free(EP93XX_GPIO_LINE_C(i)); |
607 | gpio_free(EP93XX_GPIO_LINE_D(i)); | |
608 | } | |
609 | return err; | |
610 | } | |
611 | EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio); | |
612 | ||
613 | void ep93xx_keypad_release_gpio(struct platform_device *pdev) | |
614 | { | |
615 | int i; | |
616 | ||
617 | for (i = 0; i < 8; i++) { | |
618 | gpio_free(EP93XX_GPIO_LINE_C(i)); | |
619 | gpio_free(EP93XX_GPIO_LINE_D(i)); | |
620 | } | |
621 | ||
622 | /* Disable the keypad controller; GPIO ports C and D used for GPIO */ | |
623 | ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | | |
624 | EP93XX_SYSCON_DEVCFG_GONK); | |
625 | } | |
626 | EXPORT_SYMBOL(ep93xx_keypad_release_gpio); | |
627 | ||
ed67ea82 RM |
628 | /************************************************************************* |
629 | * EP93xx I2S audio peripheral handling | |
630 | *************************************************************************/ | |
631 | static struct resource ep93xx_i2s_resource[] = { | |
ede55aaa | 632 | DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100), |
ed67ea82 RM |
633 | }; |
634 | ||
635 | static struct platform_device ep93xx_i2s_device = { | |
636 | .name = "ep93xx-i2s", | |
637 | .id = -1, | |
638 | .num_resources = ARRAY_SIZE(ep93xx_i2s_resource), | |
639 | .resource = ep93xx_i2s_resource, | |
640 | }; | |
641 | ||
f0fba2ad LG |
642 | static struct platform_device ep93xx_pcm_device = { |
643 | .name = "ep93xx-pcm-audio", | |
644 | .id = -1, | |
645 | }; | |
646 | ||
ed67ea82 RM |
647 | void __init ep93xx_register_i2s(void) |
648 | { | |
649 | platform_device_register(&ep93xx_i2s_device); | |
f0fba2ad | 650 | platform_device_register(&ep93xx_pcm_device); |
ed67ea82 RM |
651 | } |
652 | ||
653 | #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \ | |
654 | EP93XX_SYSCON_DEVCFG_I2SONAC97) | |
655 | ||
656 | #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \ | |
657 | EP93XX_SYSCON_I2SCLKDIV_SPOL) | |
658 | ||
f15855bf | 659 | int ep93xx_i2s_acquire(void) |
ed67ea82 RM |
660 | { |
661 | unsigned val; | |
662 | ||
f15855bf RM |
663 | ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97, |
664 | EP93XX_SYSCON_DEVCFG_I2S_MASK); | |
ed67ea82 RM |
665 | |
666 | /* | |
667 | * This is potentially racy with the clock api for i2s_mclk, sclk and | |
668 | * lrclk. Since the i2s driver is the only user of those clocks we | |
669 | * rely on it to prevent parallel use of this function and the | |
670 | * clock api for the i2s clocks. | |
671 | */ | |
672 | val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); | |
673 | val &= ~EP93XX_I2SCLKDIV_MASK; | |
f15855bf | 674 | val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL; |
ed67ea82 RM |
675 | ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); |
676 | ||
677 | return 0; | |
678 | } | |
679 | EXPORT_SYMBOL(ep93xx_i2s_acquire); | |
680 | ||
681 | void ep93xx_i2s_release(void) | |
682 | { | |
683 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK); | |
684 | } | |
685 | EXPORT_SYMBOL(ep93xx_i2s_release); | |
12f56c68 | 686 | |
534bc7fa MW |
687 | /************************************************************************* |
688 | * EP93xx AC97 audio peripheral handling | |
689 | *************************************************************************/ | |
690 | static struct resource ep93xx_ac97_resources[] = { | |
ede55aaa HS |
691 | DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac), |
692 | DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR), | |
534bc7fa MW |
693 | }; |
694 | ||
695 | static struct platform_device ep93xx_ac97_device = { | |
696 | .name = "ep93xx-ac97", | |
697 | .id = -1, | |
698 | .num_resources = ARRAY_SIZE(ep93xx_ac97_resources), | |
699 | .resource = ep93xx_ac97_resources, | |
700 | }; | |
701 | ||
702 | void __init ep93xx_register_ac97(void) | |
703 | { | |
704 | /* | |
705 | * Make sure that the AC97 pins are not used by I2S. | |
706 | */ | |
707 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97); | |
708 | ||
709 | platform_device_register(&ep93xx_ac97_device); | |
710 | platform_device_register(&ep93xx_pcm_device); | |
711 | } | |
712 | ||
73303d12 HS |
713 | /************************************************************************* |
714 | * EP93xx Watchdog | |
715 | *************************************************************************/ | |
716 | static struct resource ep93xx_wdt_resources[] = { | |
717 | DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08), | |
718 | }; | |
719 | ||
720 | static struct platform_device ep93xx_wdt_device = { | |
721 | .name = "ep93xx-wdt", | |
722 | .id = -1, | |
723 | .num_resources = ARRAY_SIZE(ep93xx_wdt_resources), | |
724 | .resource = ep93xx_wdt_resources, | |
725 | }; | |
726 | ||
eb774a09 RP |
727 | /************************************************************************* |
728 | * EP93xx IDE | |
729 | *************************************************************************/ | |
730 | static struct resource ep93xx_ide_resources[] = { | |
731 | DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38), | |
732 | DEFINE_RES_IRQ(IRQ_EP93XX_EXT3), | |
733 | }; | |
734 | ||
735 | static struct platform_device ep93xx_ide_device = { | |
736 | .name = "ep93xx-ide", | |
737 | .id = -1, | |
738 | .dev = { | |
739 | .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask, | |
740 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
741 | }, | |
742 | .num_resources = ARRAY_SIZE(ep93xx_ide_resources), | |
743 | .resource = ep93xx_ide_resources, | |
744 | }; | |
745 | ||
746 | void __init ep93xx_register_ide(void) | |
747 | { | |
748 | platform_device_register(&ep93xx_ide_device); | |
749 | } | |
750 | ||
751 | int ep93xx_ide_acquire_gpio(struct platform_device *pdev) | |
752 | { | |
753 | int err; | |
754 | int i; | |
755 | ||
756 | err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev)); | |
757 | if (err) | |
758 | return err; | |
759 | err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev)); | |
760 | if (err) | |
761 | goto fail_egpio15; | |
762 | for (i = 2; i < 8; i++) { | |
763 | err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev)); | |
764 | if (err) | |
765 | goto fail_gpio_e; | |
766 | } | |
767 | for (i = 4; i < 8; i++) { | |
768 | err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev)); | |
769 | if (err) | |
770 | goto fail_gpio_g; | |
771 | } | |
772 | for (i = 0; i < 8; i++) { | |
773 | err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev)); | |
774 | if (err) | |
775 | goto fail_gpio_h; | |
776 | } | |
777 | ||
778 | /* GPIO ports E[7:2], G[7:4] and H used by IDE */ | |
779 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE | | |
780 | EP93XX_SYSCON_DEVCFG_GONIDE | | |
781 | EP93XX_SYSCON_DEVCFG_HONIDE); | |
782 | return 0; | |
783 | ||
784 | fail_gpio_h: | |
785 | for (--i; i >= 0; --i) | |
786 | gpio_free(EP93XX_GPIO_LINE_H(i)); | |
787 | i = 8; | |
788 | fail_gpio_g: | |
789 | for (--i; i >= 4; --i) | |
790 | gpio_free(EP93XX_GPIO_LINE_G(i)); | |
791 | i = 8; | |
792 | fail_gpio_e: | |
793 | for (--i; i >= 2; --i) | |
794 | gpio_free(EP93XX_GPIO_LINE_E(i)); | |
795 | gpio_free(EP93XX_GPIO_LINE_EGPIO15); | |
796 | fail_egpio15: | |
797 | gpio_free(EP93XX_GPIO_LINE_EGPIO2); | |
798 | return err; | |
799 | } | |
800 | EXPORT_SYMBOL(ep93xx_ide_acquire_gpio); | |
801 | ||
802 | void ep93xx_ide_release_gpio(struct platform_device *pdev) | |
803 | { | |
804 | int i; | |
805 | ||
806 | for (i = 2; i < 8; i++) | |
807 | gpio_free(EP93XX_GPIO_LINE_E(i)); | |
808 | for (i = 4; i < 8; i++) | |
809 | gpio_free(EP93XX_GPIO_LINE_G(i)); | |
810 | for (i = 0; i < 8; i++) | |
811 | gpio_free(EP93XX_GPIO_LINE_H(i)); | |
812 | gpio_free(EP93XX_GPIO_LINE_EGPIO15); | |
813 | gpio_free(EP93XX_GPIO_LINE_EGPIO2); | |
814 | ||
815 | ||
816 | /* GPIO ports E[7:2], G[7:4] and H used by GPIO */ | |
817 | ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE | | |
818 | EP93XX_SYSCON_DEVCFG_GONIDE | | |
819 | EP93XX_SYSCON_DEVCFG_HONIDE); | |
820 | } | |
821 | EXPORT_SYMBOL(ep93xx_ide_release_gpio); | |
822 | ||
b19e11fb HS |
823 | /************************************************************************* |
824 | * EP93xx Security peripheral | |
825 | *************************************************************************/ | |
826 | ||
827 | /* | |
828 | * The Maverick Key is 256 bits of micro fuses blown at the factory during | |
829 | * manufacturing to uniquely identify a part. | |
830 | * | |
831 | * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key | |
832 | */ | |
833 | #define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x)) | |
834 | #define EP93XX_SECURITY_SECFLG EP93XX_SECURITY_REG(0x2400) | |
835 | #define EP93XX_SECURITY_FUSEFLG EP93XX_SECURITY_REG(0x2410) | |
836 | #define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440) | |
837 | #define EP93XX_SECURITY_UNIQCHK EP93XX_SECURITY_REG(0x2450) | |
838 | #define EP93XX_SECURITY_UNIQVAL EP93XX_SECURITY_REG(0x2460) | |
839 | #define EP93XX_SECURITY_SECID1 EP93XX_SECURITY_REG(0x2500) | |
840 | #define EP93XX_SECURITY_SECID2 EP93XX_SECURITY_REG(0x2504) | |
841 | #define EP93XX_SECURITY_SECCHK1 EP93XX_SECURITY_REG(0x2520) | |
842 | #define EP93XX_SECURITY_SECCHK2 EP93XX_SECURITY_REG(0x2524) | |
843 | #define EP93XX_SECURITY_UNIQID2 EP93XX_SECURITY_REG(0x2700) | |
844 | #define EP93XX_SECURITY_UNIQID3 EP93XX_SECURITY_REG(0x2704) | |
845 | #define EP93XX_SECURITY_UNIQID4 EP93XX_SECURITY_REG(0x2708) | |
846 | #define EP93XX_SECURITY_UNIQID5 EP93XX_SECURITY_REG(0x270c) | |
847 | ||
848 | static char ep93xx_soc_id[33]; | |
849 | ||
850 | static const char __init *ep93xx_get_soc_id(void) | |
e7736d47 | 851 | { |
b19e11fb HS |
852 | unsigned int id, id2, id3, id4, id5; |
853 | ||
854 | if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1) | |
855 | return "bad Hamming code"; | |
856 | ||
857 | id = __raw_readl(EP93XX_SECURITY_UNIQID); | |
858 | id2 = __raw_readl(EP93XX_SECURITY_UNIQID2); | |
859 | id3 = __raw_readl(EP93XX_SECURITY_UNIQID3); | |
860 | id4 = __raw_readl(EP93XX_SECURITY_UNIQID4); | |
861 | id5 = __raw_readl(EP93XX_SECURITY_UNIQID5); | |
862 | ||
863 | if (id != id2) | |
864 | return "invalid"; | |
865 | ||
e8a7d2bb LW |
866 | /* Toss the unique ID into the entropy pool */ |
867 | add_device_randomness(&id2, 4); | |
868 | add_device_randomness(&id3, 4); | |
869 | add_device_randomness(&id4, 4); | |
870 | add_device_randomness(&id5, 4); | |
871 | ||
b19e11fb HS |
872 | snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id), |
873 | "%08x%08x%08x%08x", id2, id3, id4, id5); | |
874 | ||
875 | return ep93xx_soc_id; | |
876 | } | |
877 | ||
878 | static const char __init *ep93xx_get_soc_rev(void) | |
879 | { | |
880 | int rev = ep93xx_chip_revision(); | |
881 | ||
882 | switch (rev) { | |
883 | case EP93XX_CHIP_REV_D0: | |
884 | return "D0"; | |
885 | case EP93XX_CHIP_REV_D1: | |
886 | return "D1"; | |
887 | case EP93XX_CHIP_REV_E0: | |
888 | return "E0"; | |
889 | case EP93XX_CHIP_REV_E1: | |
890 | return "E1"; | |
891 | case EP93XX_CHIP_REV_E2: | |
892 | return "E2"; | |
893 | default: | |
894 | return "unknown"; | |
895 | } | |
896 | } | |
897 | ||
898 | static const char __init *ep93xx_get_machine_name(void) | |
899 | { | |
900 | return kasprintf(GFP_KERNEL,"%s", machine_desc->name); | |
901 | } | |
902 | ||
903 | static struct device __init *ep93xx_init_soc(void) | |
904 | { | |
905 | struct soc_device_attribute *soc_dev_attr; | |
906 | struct soc_device *soc_dev; | |
907 | ||
908 | soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); | |
909 | if (!soc_dev_attr) | |
910 | return NULL; | |
911 | ||
912 | soc_dev_attr->machine = ep93xx_get_machine_name(); | |
913 | soc_dev_attr->family = "Cirrus Logic EP93xx"; | |
914 | soc_dev_attr->revision = ep93xx_get_soc_rev(); | |
915 | soc_dev_attr->soc_id = ep93xx_get_soc_id(); | |
916 | ||
917 | soc_dev = soc_device_register(soc_dev_attr); | |
918 | if (IS_ERR(soc_dev)) { | |
919 | kfree(soc_dev_attr->machine); | |
920 | kfree(soc_dev_attr); | |
921 | return NULL; | |
922 | } | |
923 | ||
924 | return soc_device_to_device(soc_dev); | |
925 | } | |
926 | ||
927 | struct device __init *ep93xx_init_devices(void) | |
928 | { | |
929 | struct device *parent; | |
930 | ||
02239f0a HS |
931 | /* Disallow access to MaverickCrunch initially */ |
932 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA); | |
aee85fe8 | 933 | |
08932d81 RM |
934 | /* Default all ports to GPIO */ |
935 | ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | | |
936 | EP93XX_SYSCON_DEVCFG_GONK | | |
937 | EP93XX_SYSCON_DEVCFG_EONIDE | | |
938 | EP93XX_SYSCON_DEVCFG_GONIDE | | |
939 | EP93XX_SYSCON_DEVCFG_HONIDE); | |
940 | ||
b19e11fb HS |
941 | parent = ep93xx_init_soc(); |
942 | ||
1e4c8842 HS |
943 | /* Get the GPIO working early, other devices need it */ |
944 | platform_device_register(&ep93xx_gpio_device); | |
b685004f | 945 | |
aee85fe8 LB |
946 | amba_device_register(&uart1_device, &iomem_resource); |
947 | amba_device_register(&uart2_device, &iomem_resource); | |
948 | amba_device_register(&uart3_device, &iomem_resource); | |
41658132 LB |
949 | |
950 | platform_device_register(&ep93xx_rtc_device); | |
1f64eb37 | 951 | platform_device_register(&ep93xx_ohci_device); |
73303d12 | 952 | platform_device_register(&ep93xx_wdt_device); |
a1eacd79 HS |
953 | |
954 | gpio_led_register_device(-1, &ep93xx_led_data); | |
b19e11fb HS |
955 | |
956 | return parent; | |
e7736d47 | 957 | } |
3275166e | 958 | |
7b6d864b | 959 | void ep93xx_restart(enum reboot_mode mode, const char *cmd) |
3275166e RK |
960 | { |
961 | /* | |
962 | * Set then clear the SWRST bit to initiate a software reset | |
963 | */ | |
964 | ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST); | |
965 | ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST); | |
966 | ||
967 | while (1) | |
968 | ; | |
969 | } | |
c914283f SG |
970 | |
971 | void __init ep93xx_init_late(void) | |
972 | { | |
973 | crunch_init(); | |
974 | } |