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ARM: ep93xx: remove memory configuration options
[deliverable/linux.git] / arch / arm / mach-ep93xx / core.c
CommitLineData
e7736d47
LB		 1/*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
3c9a071d 6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
e7736d47
LB		 7 *
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 */
16
64d6882d
HS		 17#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
e7736d47
LB		 19#include <linux/kernel.h>
20#include <linux/init.h>
583ddafe 21#include <linux/platform_device.h>
e7736d47 22#include <linux/interrupt.h>
63890a0e 23#include <linux/dma-mapping.h>
b19e11fb 24#include <linux/sys_soc.h>
6bd4b382 25#include <linux/irq.h>
583ddafe
HS		 26#include <linux/io.h>
27#include <linux/gpio.h>
3aa7a9a3 28#include <linux/leds.h>
aee85fe8 29#include <linux/termios.h>
e7736d47 30#include <linux/amba/bus.h>
aee85fe8 31#include <linux/amba/serial.h>
16bcf78f 32#include <linux/mtd/physmap.h>
d52a26a9
HS		 33#include <linux/i2c.h>
34#include <linux/i2c-gpio.h>
4fec9978 35#include <linux/spi/spi.h>
dc28094b 36#include <linux/export.h>
9e47b8bf 37#include <linux/irqchip/arm-vic.h>
7b6d864b 38#include <linux/reboot.h>
e55f7cd2 39#include <linux/usb/ohci_pdriver.h>
e7736d47 40
a09e64fb 41#include <mach/hardware.h>
a3b29245
AB		 42#include <linux/platform_data/video-ep93xx.h>
43#include <linux/platform_data/keypad-ep93xx.h>
44#include <linux/platform_data/spi-ep93xx.h>
bd5f12a2 45#include <mach/gpio-ep93xx.h>
e7736d47 46
b19e11fb 47#include <asm/mach/arch.h>
e7736d47 48#include <asm/mach/map.h>
e7736d47 49
a05baf33 50#include "soc.h"
e7736d47
LB		 51
52/*************************************************************************
53 * Static I/O mappings that are needed for all EP93xx platforms
54 *************************************************************************/
55static struct map_desc ep93xx_io_desc[] __initdata = {
56 {
57 .virtual = EP93XX_AHB_VIRT_BASE,
58 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
59 .length = EP93XX_AHB_SIZE,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = EP93XX_APB_VIRT_BASE,
63 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
64 .length = EP93XX_APB_SIZE,
65 .type = MT_DEVICE,
66 },
67};
68
69void __init ep93xx_map_io(void)
70{
71 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
72}
73
e7736d47
LB		 74/*************************************************************************
75 * EP93xx IRQ handling
76 *************************************************************************/
77void __init ep93xx_init_irq(void)
78{
5396730b
HS		 79 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
80 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
e7736d47
LB		 81}
82
83
02239f0a
HS		 84/*************************************************************************
85 * EP93xx System Controller Software Locked register handling
86 *************************************************************************/
87
88/*
89 * syscon_swlock prevents anything else from writing to the syscon
90 * block while a software locked register is being written.
91 */
92static DEFINE_SPINLOCK(syscon_swlock);
93
fbeeea53 94void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
02239f0a
HS		 95{
96 unsigned long flags;
97
98 spin_lock_irqsave(&syscon_swlock, flags);
99
100 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
101 __raw_writel(val, reg);
102
103 spin_unlock_irqrestore(&syscon_swlock, flags);
104}
02239f0a
HS		 105
106void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
107{
108 unsigned long flags;
109 unsigned int val;
110
111 spin_lock_irqsave(&syscon_swlock, flags);
112
113 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
02239f0a 114 val &= ~clear_bits;
a0fb007b 115 val |= set_bits;
02239f0a
HS		 116 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
117 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
118
119 spin_unlock_irqrestore(&syscon_swlock, flags);
120}
02239f0a 121
99e6a23a
MW		 122/**
123 * ep93xx_chip_revision() - returns the EP93xx chip revision
124 *
125 * See <mach/platform.h> for more information.
126 */
127unsigned int ep93xx_chip_revision(void)
128{
129 unsigned int v;
130
131 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
132 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
133 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
134 return v;
135}
67e108c5 136EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
02239f0a 137
1e4c8842
HS		 138/*************************************************************************
139 * EP93xx GPIO
140 *************************************************************************/
141static struct resource ep93xx_gpio_resource[] = {
ede55aaa 142 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
1e4c8842
HS		 143};
144
145static struct platform_device ep93xx_gpio_device = {
146 .name = "gpio-ep93xx",
147 .id = -1,
148 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
149 .resource = ep93xx_gpio_resource,
150};
151
e7736d47
LB		 152/*************************************************************************
153 * EP93xx peripheral handling
154 *************************************************************************/
aee85fe8
LB		 155#define EP93XX_UART_MCR_OFFSET (0x0100)
156
157static void ep93xx_uart_set_mctrl(struct amba_device *dev,
158 void __iomem *base, unsigned int mctrl)
159{
160 unsigned int mcr;
161
162 mcr = 0;
186dcaa4 163 if (mctrl & TIOCM_RTS)
aee85fe8 164 mcr |= 2;
186dcaa4 165 if (mctrl & TIOCM_DTR)
aee85fe8
LB		 166 mcr |= 1;
167
168 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
169}
170
171static struct amba_pl010_data ep93xx_uart_data = {
172 .set_mctrl = ep93xx_uart_set_mctrl,
173};
174
0b26051b
RK		 175static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
176 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
aee85fe8 177
0b26051b 178static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
cc3874fe 179 { IRQ_EP93XX_UART2 }, NULL);
aee85fe8 180
0b26051b
RK		 181static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
182 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
41658132 183
38f7b009 184static struct resource ep93xx_rtc_resource[] = {
ede55aaa 185 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
38f7b009
HS		 186};
187
41658132 188static struct platform_device ep93xx_rtc_device = {
38f7b009
HS		 189 .name = "ep93xx-rtc",
190 .id = -1,
191 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
192 .resource = ep93xx_rtc_resource,
41658132
LB		 193};
194
e55f7cd2
HS		 195/*************************************************************************
196 * EP93xx OHCI USB Host
197 *************************************************************************/
198
199static struct clk *ep93xx_ohci_host_clock;
200
201static int ep93xx_ohci_power_on(struct platform_device *pdev)
202{
203 if (!ep93xx_ohci_host_clock) {
204 ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
205 if (IS_ERR(ep93xx_ohci_host_clock))
206 return PTR_ERR(ep93xx_ohci_host_clock);
207 }
208
209 return clk_enable(ep93xx_ohci_host_clock);
210}
211
212static void ep93xx_ohci_power_off(struct platform_device *pdev)
213{
214 clk_disable(ep93xx_ohci_host_clock);
215}
216
217static struct usb_ohci_pdata ep93xx_ohci_pdata = {
218 .power_on = ep93xx_ohci_power_on,
219 .power_off = ep93xx_ohci_power_off,
220 .power_suspend = ep93xx_ohci_power_off,
221};
41658132 222
1f64eb37 223static struct resource ep93xx_ohci_resources[] = {
ede55aaa
HS		 224 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
225 DEFINE_RES_IRQ(IRQ_EP93XX_USB),
1f64eb37
LB		 226};
227
e55f7cd2 228static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
63890a0e 229
1f64eb37 230static struct platform_device ep93xx_ohci_device = {
e55f7cd2 231 .name = "ohci-platform",
1f64eb37 232 .id = -1,
e55f7cd2
HS		 233 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
234 .resource = ep93xx_ohci_resources,
1f64eb37 235 .dev = {
e55f7cd2 236 .dma_mask = &ep93xx_ohci_dma_mask,
63890a0e 237 .coherent_dma_mask = DMA_BIT_MASK(32),
e55f7cd2 238 .platform_data = &ep93xx_ohci_pdata,
1f64eb37 239 },
1f64eb37
LB		 240};
241
16bcf78f
HS		 242/*************************************************************************
243 * EP93xx physmap'ed flash
244 *************************************************************************/
245static struct physmap_flash_data ep93xx_flash_data;
246
247static struct resource ep93xx_flash_resource = {
248 .flags = IORESOURCE_MEM,
249};
250
251static struct platform_device ep93xx_flash = {
252 .name = "physmap-flash",
253 .id = 0,
254 .dev = {
255 .platform_data = &ep93xx_flash_data,
256 },
257 .num_resources = 1,
258 .resource = &ep93xx_flash_resource,
259};
260
261/**
262 * ep93xx_register_flash() - Register the external flash device.
263 * @width: bank width in octets
264 * @start: resource start address
265 * @size: resource size
266 */
267void __init ep93xx_register_flash(unsigned int width,
268 resource_size_t start, resource_size_t size)
269{
270 ep93xx_flash_data.width = width;
271
272 ep93xx_flash_resource.start = start;
273 ep93xx_flash_resource.end = start + size - 1;
274
275 platform_device_register(&ep93xx_flash);
276}
277
278
b370e082
HS		 279/*************************************************************************
280 * EP93xx ethernet peripheral handling
281 *************************************************************************/
a0a08fdc
HS		 282static struct ep93xx_eth_data ep93xx_eth_data;
283
284static struct resource ep93xx_eth_resource[] = {
ede55aaa 285 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
011b2e84 286 DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
a0a08fdc
HS		 287};
288
fa70cf47
MW		 289static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
290
a0a08fdc
HS		 291static struct platform_device ep93xx_eth_device = {
292 .name = "ep93xx-eth",
293 .id = -1,
294 .dev = {
fa70cf47
MW		 295 .platform_data = &ep93xx_eth_data,
296 .coherent_dma_mask = DMA_BIT_MASK(32),
297 .dma_mask = &ep93xx_eth_dma_mask,
a0a08fdc
HS		 298 },
299 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
300 .resource = ep93xx_eth_resource,
301};
302
b370e082
HS		 303/**
304 * ep93xx_register_eth - Register the built-in ethernet platform device.
305 * @data: platform specific ethernet configuration (__initdata)
306 * @copy_addr: flag indicating that the MAC address should be copied
307 * from the IndAd registers (as programmed by the bootloader)
308 */
a0a08fdc
HS		 309void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
310{
5b1c3c85
HS		 311 if (copy_addr)
312 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
a0a08fdc
HS		 313
314 ep93xx_eth_data = *data;
315 platform_device_register(&ep93xx_eth_device);
316}
317
6531a991
HS		 318
319/*************************************************************************
320 * EP93xx i2c peripheral handling
321 *************************************************************************/
322static struct i2c_gpio_platform_data ep93xx_i2c_data;
d52a26a9
HS		 323
324static struct platform_device ep93xx_i2c_device = {
b370e082
HS		 325 .name = "i2c-gpio",
326 .id = 0,
327 .dev = {
328 .platform_data = &ep93xx_i2c_data,
329 },
d52a26a9
HS		 330};
331
b370e082
HS		 332/**
333 * ep93xx_register_i2c - Register the i2c platform device.
334 * @data: platform specific i2c-gpio configuration (__initdata)
335 * @devices: platform specific i2c bus device information (__initdata)
336 * @num: the number of devices on the i2c bus
337 */
6531a991
HS		 338void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
339 struct i2c_board_info *devices, int num)
d52a26a9 340{
6531a991
HS		 341 /*
342 * Set the EEPROM interface pin drive type control.
343 * Defines the driver type for the EECLK and EEDAT pins as either
344 * open drain, which will require an external pull-up, or a normal
345 * CMOS driver.
346 */
347 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
64d6882d 348 pr_warning("sda != EEDAT, open drain has no effect\n");
6531a991 349 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
64d6882d 350 pr_warning("scl != EECLK, open drain has no effect\n");
6531a991
HS		 351
352 __raw_writel((data->sda_is_open_drain << 1) |
353 (data->scl_is_open_drain << 0),
354 EP93XX_GPIO_EEDRIVE);
355
356 ep93xx_i2c_data = *data;
d52a26a9
HS		 357 i2c_register_board_info(0, devices, num);
358 platform_device_register(&ep93xx_i2c_device);
359}
360
4fec9978
MW		 361/*************************************************************************
362 * EP93xx SPI peripheral handling
363 *************************************************************************/
364static struct ep93xx_spi_info ep93xx_spi_master_data;
365
366static struct resource ep93xx_spi_resources[] = {
ede55aaa
HS		 367 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
368 DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
4fec9978
MW		 369};
370
626a96db
MW		 371static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
372
4fec9978
MW		 373static struct platform_device ep93xx_spi_device = {
374 .name = "ep93xx-spi",
375 .id = 0,
376 .dev = {
626a96db
MW		 377 .platform_data = &ep93xx_spi_master_data,
378 .coherent_dma_mask = DMA_BIT_MASK(32),
379 .dma_mask = &ep93xx_spi_dma_mask,
4fec9978
MW		 380 },
381 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
382 .resource = ep93xx_spi_resources,
383};
384
385/**
386 * ep93xx_register_spi() - registers spi platform device
387 * @info: ep93xx board specific spi master info (__initdata)
388 * @devices: SPI devices to register (__initdata)
389 * @num: number of SPI devices to register
390 *
391 * This function registers platform device for the EP93xx SPI controller and
392 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
393 */
394void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
395 struct spi_board_info *devices, int num)
396{
397 /*
398 * When SPI is used, we need to make sure that I2S is muxed off from
399 * SPI pins.
400 */
401 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
402
403 ep93xx_spi_master_data = *info;
404 spi_register_board_info(devices, num);
405 platform_device_register(&ep93xx_spi_device);
406}
3aa7a9a3
HS		 407
408/*************************************************************************
409 * EP93xx LEDs
410 *************************************************************************/
a1eacd79 411static const struct gpio_led ep93xx_led_pins[] __initconst = {
3aa7a9a3 412 {
b370e082
HS		 413 .name = "platform:grled",
414 .gpio = EP93XX_GPIO_LINE_GRLED,
3aa7a9a3 415 }, {
b370e082
HS		 416 .name = "platform:rdled",
417 .gpio = EP93XX_GPIO_LINE_RDLED,
3aa7a9a3
HS		 418 },
419};
420
a1eacd79 421static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
3aa7a9a3
HS		 422 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
423 .leds = ep93xx_led_pins,
424};
425
ef12379f
HS		 426/*************************************************************************
427 * EP93xx pwm peripheral handling
428 *************************************************************************/
429static struct resource ep93xx_pwm0_resource[] = {
ede55aaa 430 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
ef12379f
HS		 431};
432
433static struct platform_device ep93xx_pwm0_device = {
434 .name = "ep93xx-pwm",
435 .id = 0,
436 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
437 .resource = ep93xx_pwm0_resource,
438};
439
440static struct resource ep93xx_pwm1_resource[] = {
ede55aaa 441 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
ef12379f
HS		 442};
443
444static struct platform_device ep93xx_pwm1_device = {
445 .name = "ep93xx-pwm",
446 .id = 1,
447 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
448 .resource = ep93xx_pwm1_resource,
449};
450
451void __init ep93xx_register_pwm(int pwm0, int pwm1)
452{
453 if (pwm0)
454 platform_device_register(&ep93xx_pwm0_device);
455
456 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
457 if (pwm1)
458 platform_device_register(&ep93xx_pwm1_device);
459}
460
461int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
462{
463 int err;
464
465 if (pdev->id == 0) {
466 err = 0;
467 } else if (pdev->id == 1) {
468 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
469 dev_name(&pdev->dev));
470 if (err)
471 return err;
472 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
473 if (err)
474 goto fail;
475
476 /* PWM 1 output on EGPIO[14] */
477 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
478 } else {
479 err = -ENODEV;
480 }
481
482 return err;
483
484fail:
485 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
486 return err;
487}
488EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
489
490void ep93xx_pwm_release_gpio(struct platform_device *pdev)
491{
492 if (pdev->id == 1) {
493 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
494 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
495
496 /* EGPIO[14] used for GPIO */
497 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
498 }
499}
500EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
501
502
c6012189
RM		 503/*************************************************************************
504 * EP93xx video peripheral handling
505 *************************************************************************/
506static struct ep93xxfb_mach_info ep93xxfb_data;
507
508static struct resource ep93xx_fb_resource[] = {
ede55aaa 509 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
c6012189
RM		 510};
511
512static struct platform_device ep93xx_fb_device = {
513 .name = "ep93xx-fb",
514 .id = -1,
515 .dev = {
b370e082 516 .platform_data = &ep93xxfb_data,
c6012189
RM		 517 .coherent_dma_mask = DMA_BIT_MASK(32),
518 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
519 },
520 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
521 .resource = ep93xx_fb_resource,
522};
523
0fd19580
RM		 524/* The backlight use a single register in the framebuffer's register space */
525#define EP93XX_RASTER_REG_BRIGHTNESS 0x20
526
527static struct resource ep93xx_bl_resources[] = {
528 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
529 EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
530};
531
6ea4b741
HS		 532static struct platform_device ep93xx_bl_device = {
533 .name = "ep93xx-bl",
534 .id = -1,
0fd19580
RM		 535 .num_resources = ARRAY_SIZE(ep93xx_bl_resources),
536 .resource = ep93xx_bl_resources,
6ea4b741
HS		 537};
538
b370e082
HS		 539/**
540 * ep93xx_register_fb - Register the framebuffer platform device.
541 * @data: platform specific framebuffer configuration (__initdata)
542 */
c6012189
RM		 543void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
544{
545 ep93xxfb_data = *data;
546 platform_device_register(&ep93xx_fb_device);
6ea4b741 547 platform_device_register(&ep93xx_bl_device);
c6012189
RM		 548}
549
12f56c68
HS		 550
551/*************************************************************************
552 * EP93xx matrix keypad peripheral handling
553 *************************************************************************/
b370e082
HS		 554static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
555
12f56c68 556static struct resource ep93xx_keypad_resource[] = {
ede55aaa
HS		 557 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
558 DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
12f56c68
HS		 559};
560
561static struct platform_device ep93xx_keypad_device = {
b370e082
HS		 562 .name = "ep93xx-keypad",
563 .id = -1,
564 .dev = {
565 .platform_data = &ep93xx_keypad_data,
566 },
567 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
568 .resource = ep93xx_keypad_resource,
12f56c68
HS		 569};
570
b370e082
HS		 571/**
572 * ep93xx_register_keypad - Register the keypad platform device.
573 * @data: platform specific keypad configuration (__initdata)
574 */
12f56c68
HS		 575void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
576{
b370e082 577 ep93xx_keypad_data = *data;
12f56c68
HS		 578 platform_device_register(&ep93xx_keypad_device);
579}
580
581int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
582{
583 int err;
584 int i;
585
586 for (i = 0; i < 8; i++) {
587 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
588 if (err)
589 goto fail_gpio_c;
590 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
591 if (err)
592 goto fail_gpio_d;
593 }
594
595 /* Enable the keypad controller; GPIO ports C and D used for keypad */
596 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
597 EP93XX_SYSCON_DEVCFG_GONK);
598
599 return 0;
600
601fail_gpio_d:
602 gpio_free(EP93XX_GPIO_LINE_C(i));
603fail_gpio_c:
5528a846 604 for (--i; i >= 0; --i) {
12f56c68
HS		 605 gpio_free(EP93XX_GPIO_LINE_C(i));
606 gpio_free(EP93XX_GPIO_LINE_D(i));
607 }
608 return err;
609}
610EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
611
612void ep93xx_keypad_release_gpio(struct platform_device *pdev)
613{
614 int i;
615
616 for (i = 0; i < 8; i++) {
617 gpio_free(EP93XX_GPIO_LINE_C(i));
618 gpio_free(EP93XX_GPIO_LINE_D(i));
619 }
620
621 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
622 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
623 EP93XX_SYSCON_DEVCFG_GONK);
624}
625EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
626
ed67ea82
RM		 627/*************************************************************************
628 * EP93xx I2S audio peripheral handling
629 *************************************************************************/
630static struct resource ep93xx_i2s_resource[] = {
ede55aaa 631 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
ed67ea82
RM		 632};
633
634static struct platform_device ep93xx_i2s_device = {
635 .name = "ep93xx-i2s",
636 .id = -1,
637 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
638 .resource = ep93xx_i2s_resource,
639};
640
f0fba2ad
LG		 641static struct platform_device ep93xx_pcm_device = {
642 .name = "ep93xx-pcm-audio",
643 .id = -1,
644};
645
ed67ea82
RM		 646void __init ep93xx_register_i2s(void)
647{
648 platform_device_register(&ep93xx_i2s_device);
f0fba2ad 649 platform_device_register(&ep93xx_pcm_device);
ed67ea82
RM		 650}
651
652#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
653 EP93XX_SYSCON_DEVCFG_I2SONAC97)
654
655#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
656 EP93XX_SYSCON_I2SCLKDIV_SPOL)
657
f15855bf 658int ep93xx_i2s_acquire(void)
ed67ea82
RM		 659{
660 unsigned val;
661
f15855bf
RM		 662 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
663 EP93XX_SYSCON_DEVCFG_I2S_MASK);
ed67ea82
RM		 664
665 /*
666 * This is potentially racy with the clock api for i2s_mclk, sclk and
667 * lrclk. Since the i2s driver is the only user of those clocks we
668 * rely on it to prevent parallel use of this function and the
669 * clock api for the i2s clocks.
670 */
671 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
672 val &= ~EP93XX_I2SCLKDIV_MASK;
f15855bf 673 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
ed67ea82
RM		 674 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
675
676 return 0;
677}
678EXPORT_SYMBOL(ep93xx_i2s_acquire);
679
680void ep93xx_i2s_release(void)
681{
682 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
683}
684EXPORT_SYMBOL(ep93xx_i2s_release);
12f56c68 685
534bc7fa
MW		 686/*************************************************************************
687 * EP93xx AC97 audio peripheral handling
688 *************************************************************************/
689static struct resource ep93xx_ac97_resources[] = {
ede55aaa
HS		 690 DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
691 DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
534bc7fa
MW		 692};
693
694static struct platform_device ep93xx_ac97_device = {
695 .name = "ep93xx-ac97",
696 .id = -1,
697 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
698 .resource = ep93xx_ac97_resources,
699};
700
701void __init ep93xx_register_ac97(void)
702{
703 /*
704 * Make sure that the AC97 pins are not used by I2S.
705 */
706 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
707
708 platform_device_register(&ep93xx_ac97_device);
709 platform_device_register(&ep93xx_pcm_device);
710}
711
73303d12
HS		 712/*************************************************************************
713 * EP93xx Watchdog
714 *************************************************************************/
715static struct resource ep93xx_wdt_resources[] = {
716 DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
717};
718
719static struct platform_device ep93xx_wdt_device = {
720 .name = "ep93xx-wdt",
721 .id = -1,
722 .num_resources = ARRAY_SIZE(ep93xx_wdt_resources),
723 .resource = ep93xx_wdt_resources,
724};
725
eb774a09
RP		 726/*************************************************************************
727 * EP93xx IDE
728 *************************************************************************/
729static struct resource ep93xx_ide_resources[] = {
730 DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
731 DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
732};
733
734static struct platform_device ep93xx_ide_device = {
735 .name = "ep93xx-ide",
736 .id = -1,
737 .dev = {
738 .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask,
739 .coherent_dma_mask = DMA_BIT_MASK(32),
740 },
741 .num_resources = ARRAY_SIZE(ep93xx_ide_resources),
742 .resource = ep93xx_ide_resources,
743};
744
745void __init ep93xx_register_ide(void)
746{
747 platform_device_register(&ep93xx_ide_device);
748}
749
750int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
751{
752 int err;
753 int i;
754
755 err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
756 if (err)
757 return err;
758 err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
759 if (err)
760 goto fail_egpio15;
761 for (i = 2; i < 8; i++) {
762 err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
763 if (err)
764 goto fail_gpio_e;
765 }
766 for (i = 4; i < 8; i++) {
767 err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
768 if (err)
769 goto fail_gpio_g;
770 }
771 for (i = 0; i < 8; i++) {
772 err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
773 if (err)
774 goto fail_gpio_h;
775 }
776
777 /* GPIO ports E[7:2], G[7:4] and H used by IDE */
778 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
779 EP93XX_SYSCON_DEVCFG_GONIDE |
780 EP93XX_SYSCON_DEVCFG_HONIDE);
781 return 0;
782
783fail_gpio_h:
784 for (--i; i >= 0; --i)
785 gpio_free(EP93XX_GPIO_LINE_H(i));
786 i = 8;
787fail_gpio_g:
788 for (--i; i >= 4; --i)
789 gpio_free(EP93XX_GPIO_LINE_G(i));
790 i = 8;
791fail_gpio_e:
792 for (--i; i >= 2; --i)
793 gpio_free(EP93XX_GPIO_LINE_E(i));
794 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
795fail_egpio15:
796 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
797 return err;
798}
799EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
800
801void ep93xx_ide_release_gpio(struct platform_device *pdev)
802{
803 int i;
804
805 for (i = 2; i < 8; i++)
806 gpio_free(EP93XX_GPIO_LINE_E(i));
807 for (i = 4; i < 8; i++)
808 gpio_free(EP93XX_GPIO_LINE_G(i));
809 for (i = 0; i < 8; i++)
810 gpio_free(EP93XX_GPIO_LINE_H(i));
811 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
812 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
813
814
815 /* GPIO ports E[7:2], G[7:4] and H used by GPIO */
816 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
817 EP93XX_SYSCON_DEVCFG_GONIDE |
818 EP93XX_SYSCON_DEVCFG_HONIDE);
819}
820EXPORT_SYMBOL(ep93xx_ide_release_gpio);
821
b19e11fb
HS		 822/*************************************************************************
823 * EP93xx Security peripheral
824 *************************************************************************/
825
826/*
827 * The Maverick Key is 256 bits of micro fuses blown at the factory during
828 * manufacturing to uniquely identify a part.
829 *
830 * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
831 */
832#define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x))
833#define EP93XX_SECURITY_SECFLG EP93XX_SECURITY_REG(0x2400)
834#define EP93XX_SECURITY_FUSEFLG EP93XX_SECURITY_REG(0x2410)
835#define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440)
836#define EP93XX_SECURITY_UNIQCHK EP93XX_SECURITY_REG(0x2450)
837#define EP93XX_SECURITY_UNIQVAL EP93XX_SECURITY_REG(0x2460)
838#define EP93XX_SECURITY_SECID1 EP93XX_SECURITY_REG(0x2500)
839#define EP93XX_SECURITY_SECID2 EP93XX_SECURITY_REG(0x2504)
840#define EP93XX_SECURITY_SECCHK1 EP93XX_SECURITY_REG(0x2520)
841#define EP93XX_SECURITY_SECCHK2 EP93XX_SECURITY_REG(0x2524)
842#define EP93XX_SECURITY_UNIQID2 EP93XX_SECURITY_REG(0x2700)
843#define EP93XX_SECURITY_UNIQID3 EP93XX_SECURITY_REG(0x2704)
844#define EP93XX_SECURITY_UNIQID4 EP93XX_SECURITY_REG(0x2708)
845#define EP93XX_SECURITY_UNIQID5 EP93XX_SECURITY_REG(0x270c)
846
847static char ep93xx_soc_id[33];
848
849static const char __init *ep93xx_get_soc_id(void)
e7736d47 850{
b19e11fb
HS		 851 unsigned int id, id2, id3, id4, id5;
852
853 if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
854 return "bad Hamming code";
855
856 id = __raw_readl(EP93XX_SECURITY_UNIQID);
857 id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
858 id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
859 id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
860 id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
861
862 if (id != id2)
863 return "invalid";
864
865 snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
866 "%08x%08x%08x%08x", id2, id3, id4, id5);
867
868 return ep93xx_soc_id;
869}
870
871static const char __init *ep93xx_get_soc_rev(void)
872{
873 int rev = ep93xx_chip_revision();
874
875 switch (rev) {
876 case EP93XX_CHIP_REV_D0:
877 return "D0";
878 case EP93XX_CHIP_REV_D1:
879 return "D1";
880 case EP93XX_CHIP_REV_E0:
881 return "E0";
882 case EP93XX_CHIP_REV_E1:
883 return "E1";
884 case EP93XX_CHIP_REV_E2:
885 return "E2";
886 default:
887 return "unknown";
888 }
889}
890
891static const char __init *ep93xx_get_machine_name(void)
892{
893 return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
894}
895
896static struct device __init *ep93xx_init_soc(void)
897{
898 struct soc_device_attribute *soc_dev_attr;
899 struct soc_device *soc_dev;
900
901 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
902 if (!soc_dev_attr)
903 return NULL;
904
905 soc_dev_attr->machine = ep93xx_get_machine_name();
906 soc_dev_attr->family = "Cirrus Logic EP93xx";
907 soc_dev_attr->revision = ep93xx_get_soc_rev();
908 soc_dev_attr->soc_id = ep93xx_get_soc_id();
909
910 soc_dev = soc_device_register(soc_dev_attr);
911 if (IS_ERR(soc_dev)) {
912 kfree(soc_dev_attr->machine);
913 kfree(soc_dev_attr);
914 return NULL;
915 }
916
917 return soc_device_to_device(soc_dev);
918}
919
920struct device __init *ep93xx_init_devices(void)
921{
922 struct device *parent;
923
02239f0a
HS		 924 /* Disallow access to MaverickCrunch initially */
925 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
aee85fe8 926
08932d81
RM		 927 /* Default all ports to GPIO */
928 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
929 EP93XX_SYSCON_DEVCFG_GONK |
930 EP93XX_SYSCON_DEVCFG_EONIDE |
931 EP93XX_SYSCON_DEVCFG_GONIDE |
932 EP93XX_SYSCON_DEVCFG_HONIDE);
933
b19e11fb
HS		 934 parent = ep93xx_init_soc();
935
1e4c8842
HS		 936 /* Get the GPIO working early, other devices need it */
937 platform_device_register(&ep93xx_gpio_device);
b685004f 938
aee85fe8
LB		 939 amba_device_register(&uart1_device, &iomem_resource);
940 amba_device_register(&uart2_device, &iomem_resource);
941 amba_device_register(&uart3_device, &iomem_resource);
41658132
LB		 942
943 platform_device_register(&ep93xx_rtc_device);
1f64eb37 944 platform_device_register(&ep93xx_ohci_device);
73303d12 945 platform_device_register(&ep93xx_wdt_device);
a1eacd79
HS		 946
947 gpio_led_register_device(-1, &ep93xx_led_data);
b19e11fb
HS		 948
949 return parent;
e7736d47 950}
3275166e 951
7b6d864b 952void ep93xx_restart(enum reboot_mode mode, const char *cmd)
3275166e
RK		 953{
954 /*
955 * Set then clear the SWRST bit to initiate a software reset
956 */
957 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
958 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
959
960 while (1)
961 ;
962}
c914283f
SG		 963
964void __init ep93xx_init_late(void)
965{
966 crunch_init();
967}
Linux kernel - Deliverables
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