[deliverable/linux.git] / arch / arm / mach-ep93xx / ts72xx.c

/*
 * arch/arm/mach-ep93xx/ts72xx.c
 * Technologic Systems TS72xx SBC support.
 *
 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/m48t86.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>

#include <mach/hardware.h>
#include <mach/ts72xx.h>

#include <asm/hardware/vic.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/mach/arch.h>

#include "soc.h"

static struct map_desc ts72xx_io_desc[] __initdata = {
	{
		.virtual	= TS72XX_MODEL_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
		.length		= TS72XX_MODEL_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= TS72XX_OPTIONS_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
		.length		= TS72XX_OPTIONS_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= TS72XX_OPTIONS2_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
		.length		= TS72XX_OPTIONS2_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= TS72XX_RTC_INDEX_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_RTC_INDEX_PHYS_BASE),
		.length		= TS72XX_RTC_INDEX_SIZE,
		.type		= MT_DEVICE,
	}, {
		.virtual	= TS72XX_RTC_DATA_VIRT_BASE,
		.pfn		= __phys_to_pfn(TS72XX_RTC_DATA_PHYS_BASE),
		.length		= TS72XX_RTC_DATA_SIZE,
		.type		= MT_DEVICE,
	}
};

static void __init ts72xx_map_io(void)
{
	ep93xx_map_io();
	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
}


/*************************************************************************
 * NAND flash
 *************************************************************************/
#define TS72XX_NAND_CONTROL_ADDR_LINE	22	/* 0xN0400000 */
#define TS72XX_NAND_BUSY_ADDR_LINE	23	/* 0xN0800000 */

static void ts72xx_nand_hwcontrol(struct mtd_info *mtd,
				  int cmd, unsigned int ctrl)
{
	struct nand_chip *chip = mtd->priv;

	if (ctrl & NAND_CTRL_CHANGE) {
		void __iomem *addr = chip->IO_ADDR_R;
		unsigned char bits;

		addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);

		bits = __raw_readb(addr) & ~0x07;
		bits |= (ctrl & NAND_NCE) << 2;	/* bit 0 -> bit 2 */
		bits |= (ctrl & NAND_CLE);	/* bit 1 -> bit 1 */
		bits |= (ctrl & NAND_ALE) >> 2;	/* bit 2 -> bit 0 */

		__raw_writeb(bits, addr);
	}

	if (cmd != NAND_CMD_NONE)
		__raw_writeb(cmd, chip->IO_ADDR_W);
}

static int ts72xx_nand_device_ready(struct mtd_info *mtd)
{
	struct nand_chip *chip = mtd->priv;
	void __iomem *addr = chip->IO_ADDR_R;

	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);

	return !!(__raw_readb(addr) & 0x20);
}

static const char *ts72xx_nand_part_probes[] = { "cmdlinepart", NULL };

#define TS72XX_BOOTROM_PART_SIZE	(SZ_16K)
#define TS72XX_REDBOOT_PART_SIZE	(SZ_2M + SZ_1M)

static struct mtd_partition ts72xx_nand_parts[] = {
	{
		.name		= "TS-BOOTROM",
		.offset		= 0,
		.size		= TS72XX_BOOTROM_PART_SIZE,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	}, {
		.name		= "Linux",
		.offset		= MTDPART_OFS_RETAIN,
		.size		= TS72XX_REDBOOT_PART_SIZE,
				/* leave so much for last partition */
	}, {
		.name		= "RedBoot",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
};

static struct platform_nand_data ts72xx_nand_data = {
	.chip = {
		.nr_chips	= 1,
		.chip_offset	= 0,
		.chip_delay	= 15,
		.part_probe_types = ts72xx_nand_part_probes,
		.partitions	= ts72xx_nand_parts,
		.nr_partitions	= ARRAY_SIZE(ts72xx_nand_parts),
	},
	.ctrl = {
		.cmd_ctrl	= ts72xx_nand_hwcontrol,
		.dev_ready	= ts72xx_nand_device_ready,
	},
};

static struct resource ts72xx_nand_resource[] = {
	{
		.start		= 0,			/* filled in later */
		.end		= 0,			/* filled in later */
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device ts72xx_nand_flash = {
	.name			= "gen_nand",
	.id			= -1,
	.dev.platform_data	= &ts72xx_nand_data,
	.resource		= ts72xx_nand_resource,
	.num_resources		= ARRAY_SIZE(ts72xx_nand_resource),
};


static void __init ts72xx_register_flash(void)
{
	/*
	 * TS7200 has NOR flash all other TS72xx board have NAND flash.
	 */
	if (board_is_ts7200()) {
		ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
	} else {
		resource_size_t start;

		if (is_ts9420_installed())
			start = EP93XX_CS7_PHYS_BASE;
		else
			start = EP93XX_CS6_PHYS_BASE;

		ts72xx_nand_resource[0].start = start;
		ts72xx_nand_resource[0].end = start + SZ_16M - 1;

		platform_device_register(&ts72xx_nand_flash);
	}
}


static unsigned char ts72xx_rtc_readbyte(unsigned long addr)
{
	__raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
	return __raw_readb(TS72XX_RTC_DATA_VIRT_BASE);
}

static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr)
{
	__raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
	__raw_writeb(value, TS72XX_RTC_DATA_VIRT_BASE);
}

static struct m48t86_ops ts72xx_rtc_ops = {
	.readbyte	= ts72xx_rtc_readbyte,
	.writebyte	= ts72xx_rtc_writebyte,
};

static struct platform_device ts72xx_rtc_device = {
	.name		= "rtc-m48t86",
	.id		= -1,
	.dev		= {
		.platform_data	= &ts72xx_rtc_ops,
	},
	.num_resources	= 0,
};

static struct resource ts72xx_wdt_resources[] = {
	{
		.start	= TS72XX_WDT_CONTROL_PHYS_BASE,
		.end	= TS72XX_WDT_CONTROL_PHYS_BASE + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= TS72XX_WDT_FEED_PHYS_BASE,
		.end	= TS72XX_WDT_FEED_PHYS_BASE + SZ_4K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device ts72xx_wdt_device = {
	.name		= "ts72xx-wdt",
	.id		= -1,
	.num_resources 	= ARRAY_SIZE(ts72xx_wdt_resources),
	.resource	= ts72xx_wdt_resources,
};

static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
	.phy_id		= 1,
};

static void __init ts72xx_init_machine(void)
{
	ep93xx_init_devices();
	ts72xx_register_flash();
	platform_device_register(&ts72xx_rtc_device);
	platform_device_register(&ts72xx_wdt_device);

	ep93xx_register_eth(&ts72xx_eth_data, 1);
}

MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
	.atag_offset	= 0x100,
	.map_io		= ts72xx_map_io,
	.init_irq	= ep93xx_init_irq,
	.handle_irq	= vic_handle_irq,
	.timer		= &ep93xx_timer,
	.init_machine	= ts72xx_init_machine,
	.restart	= ep93xx_restart,
MACHINE_END
Commit	Line	Data
e7736d47 LB	1	/*
	2	* arch/arm/mach-ep93xx/ts72xx.c
	3	* Technologic Systems TS72xx SBC support.
	4	*
	5	* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or (at
	10	* your option) any later version.
	11	*/
	12
030d2dd4 HS	13	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
030d2dd4 HS	14
e7736d47 LB	15	#include <linux/kernel.h>
e7736d47 LB	16	#include <linux/init.h>
7ba01f97	17	#include <linux/platform_device.h>
fced80c7	18	#include <linux/io.h>
583ddafe	19	#include <linux/m48t86.h>
030d2dd4 HS	20	#include <linux/mtd/nand.h>
030d2dd4 HS	21	#include <linux/mtd/partitions.h>
583ddafe	22
a09e64fb	23	#include <mach/hardware.h>
583ddafe HS	24	#include <mach/ts72xx.h>
583ddafe HS	25
9a6879bd	26	#include <asm/hardware/vic.h>
e7736d47	27	#include <asm/mach-types.h>
e7736d47	28	#include <asm/mach/map.h>
583ddafe HS	29	#include <asm/mach/arch.h>
583ddafe HS	30
258249ec	31	#include "soc.h"
e7736d47 LB	32
	33	static struct map_desc ts72xx_io_desc[] __initdata = {
	34	{
	35	.virtual = TS72XX_MODEL_VIRT_BASE,
	36	.pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
	37	.length = TS72XX_MODEL_SIZE,
	38	.type = MT_DEVICE,
	39	}, {
	40	.virtual = TS72XX_OPTIONS_VIRT_BASE,
	41	.pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
	42	.length = TS72XX_OPTIONS_SIZE,
	43	.type = MT_DEVICE,
	44	}, {
	45	.virtual = TS72XX_OPTIONS2_VIRT_BASE,
	46	.pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
	47	.length = TS72XX_OPTIONS2_SIZE,
	48	.type = MT_DEVICE,
7ba01f97 LB	49	}, {
	50	.virtual = TS72XX_RTC_INDEX_VIRT_BASE,
	51	.pfn = __phys_to_pfn(TS72XX_RTC_INDEX_PHYS_BASE),
	52	.length = TS72XX_RTC_INDEX_SIZE,
	53	.type = MT_DEVICE,
	54	}, {
	55	.virtual = TS72XX_RTC_DATA_VIRT_BASE,
	56	.pfn = __phys_to_pfn(TS72XX_RTC_DATA_PHYS_BASE),
	57	.length = TS72XX_RTC_DATA_SIZE,
	58	.type = MT_DEVICE,
e7736d47 LB	59	}
	60	};
	61
030d2dd4 HS	62	static void __init ts72xx_map_io(void)
	63	{
	64	ep93xx_map_io();
	65	iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
	66	}
	67
	68
	69	/*************************************************************************
	70	* NAND flash
	71	*************************************************************************/
	72	#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
	73	#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
	74
	75	static void ts72xx_nand_hwcontrol(struct mtd_info *mtd,
	76	int cmd, unsigned int ctrl)
	77	{
	78	struct nand_chip *chip = mtd->priv;
	79
	80	if (ctrl & NAND_CTRL_CHANGE) {
	81	void __iomem *addr = chip->IO_ADDR_R;
	82	unsigned char bits;
	83
	84	addr += (1 << TS72XX_NAND_CONTROL_ADDR_LINE);
	85
	86	bits = __raw_readb(addr) & ~0x07;
	87	bits \|= (ctrl & NAND_NCE) << 2; /* bit 0 -> bit 2 */
	88	bits \|= (ctrl & NAND_CLE); /* bit 1 -> bit 1 */
	89	bits \|= (ctrl & NAND_ALE) >> 2; /* bit 2 -> bit 0 */
	90
	91	__raw_writeb(bits, addr);
e7736d47	92	}
e7736d47	93
030d2dd4 HS	94	if (cmd != NAND_CMD_NONE)
	95	__raw_writeb(cmd, chip->IO_ADDR_W);
	96	}
	97
	98	static int ts72xx_nand_device_ready(struct mtd_info *mtd)
	99	{
	100	struct nand_chip *chip = mtd->priv;
	101	void __iomem *addr = chip->IO_ADDR_R;
	102
	103	addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
	104
	105	return !!(__raw_readb(addr) & 0x20);
	106	}
	107
	108	static const char *ts72xx_nand_part_probes[] = { "cmdlinepart", NULL };
	109
	110	#define TS72XX_BOOTROM_PART_SIZE (SZ_16K)
	111	#define TS72XX_REDBOOT_PART_SIZE (SZ_2M + SZ_1M)
	112
	113	static struct mtd_partition ts72xx_nand_parts[] = {
e7736d47	114	{
030d2dd4 HS	115	.name = "TS-BOOTROM",
	116	.offset = 0,
	117	.size = TS72XX_BOOTROM_PART_SIZE,
	118	.mask_flags = MTD_WRITEABLE, /* force read-only */
e7736d47	119	}, {
030d2dd4	120	.name = "Linux",
78dd9e35 DES	121	.offset = MTDPART_OFS_RETAIN,
	122	.size = TS72XX_REDBOOT_PART_SIZE,
	123	/* leave so much for last partition */
e7736d47	124	}, {
030d2dd4 HS	125	.name = "RedBoot",
	126	.offset = MTDPART_OFS_APPEND,
	127	.size = MTDPART_SIZ_FULL,
	128	.mask_flags = MTD_WRITEABLE, /* force read-only */
	129	},
e7736d47 LB	130	};
e7736d47 LB	131
030d2dd4 HS	132	static struct platform_nand_data ts72xx_nand_data = {
	133	.chip = {
	134	.nr_chips = 1,
	135	.chip_offset = 0,
	136	.chip_delay = 15,
	137	.part_probe_types = ts72xx_nand_part_probes,
78dd9e35 DES	138	.partitions = ts72xx_nand_parts,
78dd9e35 DES	139	.nr_partitions = ARRAY_SIZE(ts72xx_nand_parts),
030d2dd4 HS	140	},
	141	.ctrl = {
	142	.cmd_ctrl = ts72xx_nand_hwcontrol,
	143	.dev_ready = ts72xx_nand_device_ready,
	144	},
	145	};
	146
	147	static struct resource ts72xx_nand_resource[] = {
	148	{
	149	.start = 0, /* filled in later */
	150	.end = 0, /* filled in later */
	151	.flags = IORESOURCE_MEM,
	152	},
	153	};
	154
	155	static struct platform_device ts72xx_nand_flash = {
	156	.name = "gen_nand",
	157	.id = -1,
	158	.dev.platform_data = &ts72xx_nand_data,
	159	.resource = ts72xx_nand_resource,
	160	.num_resources = ARRAY_SIZE(ts72xx_nand_resource),
	161	};
	162
	163
3174c88a HS	164	static void __init ts72xx_register_flash(void)
3174c88a HS	165	{
16bcf78f HS	166	/*
	167	* TS7200 has NOR flash all other TS72xx board have NAND flash.
	168	*/
030d2dd4	169	if (board_is_ts7200()) {
16bcf78f	170	ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
030d2dd4 HS	171	} else {
	172	resource_size_t start;
	173
	174	if (is_ts9420_installed())
	175	start = EP93XX_CS7_PHYS_BASE;
	176	else
	177	start = EP93XX_CS6_PHYS_BASE;
	178
	179	ts72xx_nand_resource[0].start = start;
	180	ts72xx_nand_resource[0].end = start + SZ_16M - 1;
	181
	182	platform_device_register(&ts72xx_nand_flash);
	183	}
3174c88a HS	184	}
3174c88a HS	185
030d2dd4	186
fd0a0ac1	187	static unsigned char ts72xx_rtc_readbyte(unsigned long addr)
7ba01f97 LB	188	{
	189	__raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
	190	return __raw_readb(TS72XX_RTC_DATA_VIRT_BASE);
	191	}
	192
fd0a0ac1	193	static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr)
7ba01f97 LB	194	{
	195	__raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
	196	__raw_writeb(value, TS72XX_RTC_DATA_VIRT_BASE);
	197	}
	198
	199	static struct m48t86_ops ts72xx_rtc_ops = {
e48f3fa3 HS	200	.readbyte = ts72xx_rtc_readbyte,
e48f3fa3 HS	201	.writebyte = ts72xx_rtc_writebyte,
7ba01f97 LB	202	};
	203
	204	static struct platform_device ts72xx_rtc_device = {
e48f3fa3 HS	205	.name = "rtc-m48t86",
	206	.id = -1,
	207	.dev = {
	208	.platform_data = &ts72xx_rtc_ops,
7ba01f97	209	},
e48f3fa3	210	.num_resources = 0,
7ba01f97 LB	211	};
7ba01f97 LB	212
12926dc4 MW	213	static struct resource ts72xx_wdt_resources[] = {
	214	{
	215	.start = TS72XX_WDT_CONTROL_PHYS_BASE,
	216	.end = TS72XX_WDT_CONTROL_PHYS_BASE + SZ_4K - 1,
	217	.flags = IORESOURCE_MEM,
	218	},
	219	{
	220	.start = TS72XX_WDT_FEED_PHYS_BASE,
	221	.end = TS72XX_WDT_FEED_PHYS_BASE + SZ_4K - 1,
	222	.flags = IORESOURCE_MEM,
	223	},
	224	};
	225
	226	static struct platform_device ts72xx_wdt_device = {
	227	.name = "ts72xx-wdt",
	228	.id = -1,
	229	.num_resources = ARRAY_SIZE(ts72xx_wdt_resources),
	230	.resource = ts72xx_wdt_resources,
	231	};
	232
b370e082	233	static struct ep93xx_eth_data __initdata ts72xx_eth_data = {
e48f3fa3	234	.phy_id = 1,
730ee9f3 LB	235	};
730ee9f3 LB	236
e7736d47 LB	237	static void __init ts72xx_init_machine(void)
	238	{
	239	ep93xx_init_devices();
3174c88a	240	ts72xx_register_flash();
7ba01f97	241	platform_device_register(&ts72xx_rtc_device);
12926dc4	242	platform_device_register(&ts72xx_wdt_device);
730ee9f3	243
a0a08fdc	244	ep93xx_register_eth(&ts72xx_eth_data, 1);
e7736d47 LB	245	}
	246
	247	MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
	248	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
e562cf17	249	.atag_offset = 0x100,
e7736d47 LB	250	.map_io = ts72xx_map_io,
e7736d47 LB	251	.init_irq = ep93xx_init_irq,
9a6879bd	252	.handle_irq = vic_handle_irq,
e7736d47 LB	253	.timer = &ep93xx_timer,
e7736d47 LB	254	.init_machine = ts72xx_init_machine,
3275166e	255	.restart = ep93xx_restart,
e7736d47	256	MACHINE_END